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| author | Maxime Coquelin <mcoquelin.stm32@gmail.com> | 2016-02-23 17:11:42 +0100 |
|---|---|---|
| committer | Maxime Coquelin <mcoquelin.stm32@gmail.com> | 2016-02-25 10:41:16 +0100 |
| commit | c8cc1b727f989a46cb8823ae3c152b7e69aed028 (patch) | |
| tree | 71eafcedefa4ac317f133ad78ca655b537caa17e /arch/arm/boot/dts/stm32f429.dtsi | |
| parent | a985b66ae55838897234f69cab737e17e75c7420 (diff) | |
| download | linux-0-day-c8cc1b727f989a46cb8823ae3c152b7e69aed028.tar.gz linux-0-day-c8cc1b727f989a46cb8823ae3c152b7e69aed028.tar.xz | |
ARM: dts: stm32429i-eval: Add USB HS host mode support
This patch adds USB HS support in host mode only.
This port supports OTG mode, but the device more is not working
properly as of now.
Once the device mode fixed, the node will be updated to support OTG.
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32f429.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stm32f429.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 598362efaf011..ee8275645127a 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -278,6 +278,26 @@ bias-disable; }; }; + + usbotg_hs_pins_a: usbotg_hs@0 { + pins { + pinmux = <STM32F429_PH4_FUNC_OTG_HS_ULPI_NXT>, + <STM32F429_PI11_FUNC_OTG_HS_ULPI_DIR>, + <STM32F429_PC0_FUNC_OTG_HS_ULPI_STP>, + <STM32F429_PA5_FUNC_OTG_HS_ULPI_CK>, + <STM32F429_PA3_FUNC_OTG_HS_ULPI_D0>, + <STM32F429_PB0_FUNC_OTG_HS_ULPI_D1>, + <STM32F429_PB1_FUNC_OTG_HS_ULPI_D2>, + <STM32F429_PB10_FUNC_OTG_HS_ULPI_D3>, + <STM32F429_PB11_FUNC_OTG_HS_ULPI_D4>, + <STM32F429_PB12_FUNC_OTG_HS_ULPI_D5>, + <STM32F429_PB13_FUNC_OTG_HS_ULPI_D6>, + <STM32F429_PB5_FUNC_OTG_HS_ULPI_D7>; + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; }; rcc: rcc@40023810 { @@ -318,6 +338,16 @@ st,mem2mem; }; + usbotg_hs: usb@40040000 { + compatible = "snps,dwc2"; + dma-ranges; + reg = <0x40040000 0x40000>; + interrupts = <77>; + clocks = <&rcc 0 29>; + clock-names = "otg"; + status = "disabled"; + }; + rng: rng@50060800 { compatible = "st,stm32-rng"; reg = <0x50060800 0x400>; |