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| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2018-08-30 14:50:06 +0300 |
|---|---|---|
| committer | Sebastian Reichel <sre@kernel.org> | 2018-09-16 12:31:48 +0200 |
| commit | 9f7195da31fb0b0f83dbd6bbe7aa98c889fb865a (patch) | |
| tree | b2e2bf2d4a306afc2fc84de7cbebae3fa1106062 /arch/arm/mach-at91 | |
| parent | 5b394b2ddf0347bef56e50c69a58773c94343ff3 (diff) | |
| download | linux-0-day-9f7195da31fb0b0f83dbd6bbe7aa98c889fb865a.tar.gz linux-0-day-9f7195da31fb0b0f83dbd6bbe7aa98c889fb865a.tar.xz | |
power: reset: at91-poweroff: switch to slow clock before shutdown
The SAMA5D2 NRST input signal is resynchronized with the SLCK clock and it
can take up to 2 SLCK cycles (about 90us) for the internal reset to be
effective. During this delay, the VDDCORE current consumption may still be
high (application-dependent) with the VDDCORE regulator already OFF. Under
such conditions, VDDCORE may operate below its operating range leading to
potential register corruption.
To prevent such situation, it is recommended to decrease significantly the
power consumption of the device once the voltage regulator is turned-off.
This can be achieved by operating the device at a much lower low frequency.
To solve this switch the master clock to slock clock just before writing
shutdown command to shutdown controller.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Suggested-by: Patrice Vilchez <patrice.vilchez@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Diffstat (limited to 'arch/arm/mach-at91')
| -rw-r--r-- | arch/arm/mach-at91/pm_suspend.S | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S index a7c6ae13c9453..bfe1c4d069010 100644 --- a/arch/arm/mach-at91/pm_suspend.S +++ b/arch/arm/mach-at91/pm_suspend.S @@ -149,6 +149,14 @@ exit_suspend: ENDPROC(at91_pm_suspend_in_sram) ENTRY(at91_backup_mode) + /* Switch the master clock source to slow clock. */ + ldr pmc, .pmc_base + ldr tmp1, [pmc, #AT91_PMC_MCKR] + bic tmp1, tmp1, #AT91_PMC_CSS + str tmp1, [pmc, #AT91_PMC_MCKR] + + wait_mckrdy + /*BUMEN*/ ldr r0, .sfr mov tmp1, #0x1 |