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| author | Adam Buchbinder <adam.buchbinder@gmail.com> | 2016-02-23 15:28:52 -0800 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2016-04-18 12:45:53 +0200 |
| commit | 0398b95fe4b3c90fbabfb39b77e635ec863ac040 (patch) | |
| tree | 4e2e95cccfe64898ad945c74c0e6e828637a6416 /arch/c6x/include | |
| parent | e0b1c817d85d1611b4f44f9c5b3e6426886206e0 (diff) | |
| download | linux-0-day-0398b95fe4b3c90fbabfb39b77e635ec863ac040.tar.gz linux-0-day-0398b95fe4b3c90fbabfb39b77e635ec863ac040.tar.xz | |
c6x: Fix misspellings in comments.
Signed-off-by: Adam Buchbinder <adam.buchbinder@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'arch/c6x/include')
| -rw-r--r-- | arch/c6x/include/asm/clock.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/c6x/include/asm/clock.h b/arch/c6x/include/asm/clock.h index bcf42b2b4b1e7..e2f818a7a1d1b 100644 --- a/arch/c6x/include/asm/clock.h +++ b/arch/c6x/include/asm/clock.h @@ -101,7 +101,7 @@ struct clk { #define CLK_PLL BIT(2) /* PLL-derived clock */ #define PRE_PLL BIT(3) /* source is before PLL mult/div */ #define FIXED_DIV_PLL BIT(4) /* fixed divisor from PLL */ -#define FIXED_RATE_PLL BIT(5) /* fixed ouput rate PLL */ +#define FIXED_RATE_PLL BIT(5) /* fixed output rate PLL */ #define MAX_PLL_SYSCLKS 16 |