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| author | Aaro Koskinen <aaro.koskinen@iki.fi> | 2019-02-05 00:41:49 +0200 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-02-07 15:22:38 -0800 |
| commit | 3d2521810ec990b67b4d0e1f9aa5380e7b3c6a18 (patch) | |
| tree | bb3327bb8346182e5c8eeacbd69543919d93ce6b /arch/mips/boot | |
| parent | 1836c2b2462fb56f10ce596033f2f24f16941a2a (diff) | |
| download | linux-0-day-3d2521810ec990b67b4d0e1f9aa5380e7b3c6a18.tar.gz linux-0-day-3d2521810ec990b67b4d0e1f9aa5380e7b3c6a18.tar.xz | |
MIPS: OCTEON: program rx/tx-delay always from DT
Program rx/tx-delay always from DT.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Diffstat (limited to 'arch/mips/boot')
| -rw-r--r-- | arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts | 6 | ||||
| -rw-r--r-- | arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts b/arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts index 1c50cca4ea53f..dda0559cef50e 100644 --- a/arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts +++ b/arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dts @@ -180,6 +180,8 @@ ethernet@0 { phy-handle = <&phy2>; cavium,alt-phy-handle = <&phy100>; + rx-delay = <0>; + tx-delay = <0>; fixed-link { speed = <1000>; full-duplex; @@ -188,6 +190,8 @@ ethernet@1 { phy-handle = <&phy3>; cavium,alt-phy-handle = <&phy101>; + rx-delay = <0>; + tx-delay = <0>; fixed-link { speed = <1000>; full-duplex; @@ -196,6 +200,8 @@ ethernet@2 { phy-handle = <&phy4>; cavium,alt-phy-handle = <&phy102>; + rx-delay = <0>; + tx-delay = <0>; }; ethernet@3 { compatible = "cavium,octeon-3860-pip-port"; diff --git a/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts b/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts index 243e5dc444fb1..962f37fbc7db8 100644 --- a/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts +++ b/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts @@ -33,12 +33,18 @@ interface@0 { ethernet@0 { phy-handle = <&phy7>; + rx-delay = <0>; + tx-delay = <0x10>; }; ethernet@1 { phy-handle = <&phy6>; + rx-delay = <0>; + tx-delay = <0x10>; }; ethernet@2 { phy-handle = <&phy5>; + rx-delay = <0>; + tx-delay = <0x10>; }; }; }; |