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authorMarkos Chandras <markos.chandras@imgtec.com>2015-01-15 10:34:00 +0000
committerMarkos Chandras <markos.chandras@imgtec.com>2015-02-17 15:37:29 +0000
commitfee313d4b880d4f68cd9d1ed013b128f836d3f21 (patch)
treeb65c495c0a78be66c144099a156a4b5f2d9157d1 /arch/mips/kernel/syscall.c
parent0593a44c6403d0b2afdac94a261ad474719e8322 (diff)
downloadlinux-0-day-fee313d4b880d4f68cd9d1ed013b128f836d3f21.tar.gz
linux-0-day-fee313d4b880d4f68cd9d1ed013b128f836d3f21.tar.xz
MIPS: kernel: syscall: Set the appropriate ISA level for MIPS R6
MIPS R6 changed the opcodes for LL/SC instructions so we need to set the appropriate ISA level. Cc: Matthew Fortune <Matthew.Fortune@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips/kernel/syscall.c')
-rw-r--r--arch/mips/kernel/syscall.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 604b558809c4c..53a7ef9a8f320 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -136,7 +136,7 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new)
: "memory");
} else if (cpu_has_llsc) {
__asm__ __volatile__ (
- " .set arch=r4000 \n"
+ " .set "MIPS_ISA_ARCH_LEVEL" \n"
" li %[err], 0 \n"
"1: ll %[old], (%[addr]) \n"
" move %[tmp], %[new] \n"