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authorWill Deacon <will.deacon@arm.com>2013-09-04 11:34:08 +0100
committerWill Deacon <will.deacon@arm.com>2014-10-20 18:49:18 +0100
commitcbc908ef8e6babc40cb929f46ea1b8a26cbdbce0 (patch)
tree7c91adbb4ed5947af5cef085905ee19e119f9bcf /arch/x86/include/asm/io.h
parent579cadee96542200b69efa3bda7ec4898c8153f6 (diff)
downloadlinux-0-day-cbc908ef8e6babc40cb929f46ea1b8a26cbdbce0.tar.gz
linux-0-day-cbc908ef8e6babc40cb929f46ea1b8a26cbdbce0.tar.xz
x86: io: implement dummy relaxed accessor macros for writes
write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds dummy macros for the write accessors to x86, in the same vein as the dummy definitions for the relaxed read accessors. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/x86/include/asm/io.h')
-rw-r--r--arch/x86/include/asm/io.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index b8237d8a1e0c8..2ea07f5ec7b77 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -74,6 +74,9 @@ build_mmio_write(__writel, "l", unsigned int, "r", )
#define __raw_readw __readw
#define __raw_readl __readl
+#define writeb_relaxed(v, a) __writeb(v, a)
+#define writew_relaxed(v, a) __writew(v, a)
+#define writel_relaxed(v, a) __writel(v, a)
#define __raw_writeb __writeb
#define __raw_writew __writew
#define __raw_writel __writel
@@ -86,6 +89,7 @@ build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
#define readq_relaxed(a) readq(a)
+#define writeq_relaxed(v, a) writeq(v, a)
#define __raw_readq(a) readq(a)
#define __raw_writeq(val, addr) writeq(val, addr)