path: root/arch/x86/kernel/cpu/mce/apei.c
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authorLinus Torvalds <>2019-03-08 09:07:07 -0800
committerLinus Torvalds <>2019-03-08 09:07:07 -0800
commit1b37b8c48d2c2d8553f116ec2a75d21056f1fb35 (patch)
treeadf2855d311440fb4c48b2a96a13bdaae28d2b63 /arch/x86/kernel/cpu/mce/apei.c
parentc6400e5cef5eafc259e649ceedc4c7eecc9069d8 (diff)
parent580b5cf50ca8f4781961382d54959683341b3126 (diff)
Merge tag 'edac_for_5.1' of git://
Pull EDAC updates from Borislav Petkov: - A new EDAC AST 2500 SoC driver (Stefan M Schaeckeler) - New i10nm EDAC driver for Intel 10nm CPUs (Qiuxu Zhuo and Tony Luck) - Altera SDRAM functionality carveout for separate enablement of RAS and SDRAM capabilities on some Altera chips. (Thor Thayer) - The usual round of cleanups and fixes And last but not least: recruit James Morse as a reviewer for the ARM side. * tag 'edac_for_5.1' of git:// EDAC/altera: Add separate SDRAM EDAC config EDAC, altera: Add missing of_node_put() EDAC, skx_common: Add code to recognise new compound error code EDAC, i10nm: Fix randconfig builds EDAC, i10nm: Add a driver for Intel 10nm server processors EDAC, skx_edac: Delete duplicated code EDAC, skx_common: Separate common code out from skx_edac EDAC: Do not check return value of debugfs_create() functions EDAC: Add James Morse as a reviewer dt-bindings, EDAC: Add Aspeed AST2500 EDAC, aspeed: Add an Aspeed AST2500 EDAC driver
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