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authorThomas Gleixner <tglx@linutronix.de>2016-12-18 15:09:29 +0100
committerThomas Gleixner <tglx@linutronix.de>2016-12-18 16:37:04 +0100
commit8c9b9d87b855226a823b41a77a05f42324497603 (patch)
treea7c523bcdbf1d0ff9a6b48ca09a3b0e745f15859 /arch/x86/power
parent16588f659257495212ac6b9beaf008d9b19e8165 (diff)
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x86/tsc: Limit the adjust value further
Adjust value 0x80000000 and other values larger than that render the TSC deadline timer disfunctional. We have not yet any information about this from Intel, but experimentation clearly proves that this is a 32/64 bit and sign extension issue. If adjust values larger than that are actually required, which might be the case for physical CPU hotplug, then we need to disable the deadline timer on the affected package/CPUs and use the local APIC timer instead. That requires some surgery in the APIC setup code, so we just limit the ADJUST register value into the known to work range for now and revisit this when Intel comes forth with proper information. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Roland Scheidegger <rscheidegger_lists@hispeed.ch> Cc: Bruce Schlobohm <bruce.schlobohm@intel.com> Cc: Kevin Stanton <kevin.b.stanton@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Borislav Petkov <bp@alien8.de>
Diffstat (limited to 'arch/x86/power')
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