diff options
| author | Nick Hu <nickhu@andestech.com> | 2018-10-24 18:14:32 +0800 |
|---|---|---|
| committer | Greentime Hu <greentime@andestech.com> | 2018-11-06 18:01:41 +0800 |
| commit | 7938e6315c9af3d4a40185b537733bbce842305a (patch) | |
| tree | 4239f342490d2a7c1c2753ab3e3bcbea20bcde8b /drivers/irqchip | |
| parent | cf26edd840dc65b122a0f5e22d2d81ad05eccb2d (diff) | |
| download | linux-0-day-7938e6315c9af3d4a40185b537733bbce842305a.tar.gz linux-0-day-7938e6315c9af3d4a40185b537733bbce842305a.tar.xz | |
nds32: Power management for nds32
There are three sleep states in nds32:
suspend to idle,
suspend to standby,
suspend to ram
In suspend to ram, we use the 'standby' instruction to emulate
power management device to hang the system util wakeup source
send wakeup events to break the loop.
First, we push the general purpose registers and system registers
to stack. Second, we translate stack pointer to physical address
and store to memory to save the stack pointer. Third, after write
back and invalid the cache we hang in 'standby' intruction.
When wakeup source trigger wake up events, the loop will be break
and resume the system.
Signed-off-by: Nick Hu <nickhu@andestech.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Greentime Hu <greentime@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
Diffstat (limited to 'drivers/irqchip')
| -rw-r--r-- | drivers/irqchip/irq-ativic32.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-ativic32.c b/drivers/irqchip/irq-ativic32.c index f69a8588521c9..85cf6e0e0e52b 100644 --- a/drivers/irqchip/irq-ativic32.c +++ b/drivers/irqchip/irq-ativic32.c @@ -10,6 +10,8 @@ #include <linux/irqchip.h> #include <nds32_intrinsic.h> +unsigned long wake_mask; + static void ativic32_ack_irq(struct irq_data *data) { __nds32__mtsr_dsb(BIT(data->hwirq), NDS32_SR_INT_PEND2); @@ -27,11 +29,40 @@ static void ativic32_unmask_irq(struct irq_data *data) __nds32__mtsr_dsb(int_mask2 | (BIT(data->hwirq)), NDS32_SR_INT_MASK2); } +static int nointc_set_wake(struct irq_data *data, unsigned int on) +{ + unsigned long int_mask = __nds32__mfsr(NDS32_SR_INT_MASK); + static unsigned long irq_orig_bit; + u32 bit = 1 << data->hwirq; + + if (on) { + if (int_mask & bit) + __assign_bit(data->hwirq, &irq_orig_bit, true); + else + __assign_bit(data->hwirq, &irq_orig_bit, false); + + __assign_bit(data->hwirq, &int_mask, true); + __assign_bit(data->hwirq, &wake_mask, true); + + } else { + if (!(irq_orig_bit & bit)) + __assign_bit(data->hwirq, &int_mask, false); + + __assign_bit(data->hwirq, &wake_mask, false); + __assign_bit(data->hwirq, &irq_orig_bit, false); + } + + __nds32__mtsr_dsb(int_mask, NDS32_SR_INT_MASK); + + return 0; +} + static struct irq_chip ativic32_chip = { .name = "ativic32", .irq_ack = ativic32_ack_irq, .irq_mask = ativic32_mask_irq, .irq_unmask = ativic32_unmask_irq, + .irq_set_wake = nointc_set_wake, }; static unsigned int __initdata nivic_map[6] = { 6, 2, 10, 16, 24, 32 }; |