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| author | Sean Wang <sean.wang@mediatek.com> | 2017-08-07 15:24:37 +0800 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2017-08-14 17:28:40 +0200 |
| commit | 52510ee934885ec846faaa5d029329c9ba0e6ecc (patch) | |
| tree | 73d15f37edc4114d0cf6e11df10eb2cd7aa46598 /include/linux/soc | |
| parent | 4f04ff03dc48b81b436abf4f8600f9553825e39f (diff) | |
| download | linux-0-day-52510ee934885ec846faaa5d029329c9ba0e6ecc.tar.gz linux-0-day-52510ee934885ec846faaa5d029329c9ba0e6ecc.tar.xz | |
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
Add SCPSYS power domain driver for MT7622 SoC having four power domains
which are respectively ETHSYS for Ethernet including embedded switch,
WBSYS for WIFI and Bluetooth, HIF0SYS for PCI-E and SATA, and HIF1SYS for
USB. Those functions could be selectively powered gated when the
corresponding function is no longer to use in order to reach more minimal
power dissipation.
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'include/linux/soc')
| -rw-r--r-- | include/linux/soc/mediatek/infracfg.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h index a5714e93fb341..a0182ec2a621c 100644 --- a/include/linux/soc/mediatek/infracfg.h +++ b/include/linux/soc/mediatek/infracfg.h @@ -20,6 +20,13 @@ #define MT8173_TOP_AXI_PROT_EN_MFG_M1 BIT(22) #define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT BIT(23) +#define MT7622_TOP_AXI_PROT_EN_ETHSYS (BIT(3) | BIT(17)) +#define MT7622_TOP_AXI_PROT_EN_HIF0 (BIT(24) | BIT(25)) +#define MT7622_TOP_AXI_PROT_EN_HIF1 (BIT(26) | BIT(27) | \ + BIT(28)) +#define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \ + BIT(7) | BIT(8)) + int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask); int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask); |