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| author | Atish Patra <atish.patra@wdc.com> | 2019-08-02 21:27:20 -0700 |
|---|---|---|
| committer | Paul Walmsley <paul.walmsley@sifive.com> | 2019-08-06 14:37:58 -0700 |
| commit | 713203e303ca9f75be8c729b533bf1559e442f6e (patch) | |
| tree | d5035a28e1995015be4e7d926e18d846f6b5f1dc /security | |
| parent | e21a712a9685488f5ce80495b37b9fdbe96c230d (diff) | |
| download | linux-0-day-713203e303ca9f75be8c729b533bf1559e442f6e.tar.gz linux-0-day-713203e303ca9f75be8c729b533bf1559e442f6e.tar.xz | |
RISC-V: Remove per cpu clocksource
There is only one clocksource in RISC-V. The boot cpu initializes
that clocksource. No need to keep a percpu data structure.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'security')
0 files changed, 0 insertions, 0 deletions