diff options
Diffstat (limited to 'drivers/infiniband/hw/hfi1/pcie.c')
| -rw-r--r-- | drivers/infiniband/hw/hfi1/pcie.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/infiniband/hw/hfi1/pcie.c b/drivers/infiniband/hw/hfi1/pcie.c index c1c982908b4bb..4d4371bf2c7c8 100644 --- a/drivers/infiniband/hw/hfi1/pcie.c +++ b/drivers/infiniband/hw/hfi1/pcie.c @@ -56,11 +56,6 @@ #include "chip_registers.h" #include "aspm.h" -/* link speed vector for Gen3 speed - not in Linux headers */ -#define GEN1_SPEED_VECTOR 0x1 -#define GEN2_SPEED_VECTOR 0x2 -#define GEN3_SPEED_VECTOR 0x3 - /* * This file contains PCIe utility routines. */ @@ -183,6 +178,14 @@ int hfi1_pcie_ddinit(struct hfi1_devdata *dd, struct pci_dev *pdev) return -ENOMEM; } dd_dev_info(dd, "UC base1: %p for %x\n", dd->kregbase1, RCV_ARRAY); + + /* verify that reads actually work, save revision for reset check */ + dd->revision = readq(dd->kregbase1 + CCE_REVISION); + if (dd->revision == ~(u64)0) { + dd_dev_err(dd, "Cannot read chip CSRs\n"); + goto nomem; + } + dd->chip_rcv_array_count = readq(dd->kregbase1 + RCV_ARRAY_CNT); dd_dev_info(dd, "RcvArray count: %u\n", dd->chip_rcv_array_count); dd->base2_start = RCV_ARRAY + dd->chip_rcv_array_count * 8; @@ -262,7 +265,7 @@ static u32 extract_speed(u16 linkstat) case PCI_EXP_LNKSTA_CLS_5_0GB: speed = 5000; /* Gen 2, 5GHz */ break; - case GEN3_SPEED_VECTOR: + case PCI_EXP_LNKSTA_CLS_8_0GB: speed = 8000; /* Gen 3, 8GHz */ break; } @@ -317,7 +320,7 @@ int pcie_speeds(struct hfi1_devdata *dd) return ret; } - if ((linkcap & PCI_EXP_LNKCAP_SLS) != GEN3_SPEED_VECTOR) { + if ((linkcap & PCI_EXP_LNKCAP_SLS) != PCI_EXP_LNKCAP_SLS_8_0GB) { dd_dev_info(dd, "This HFI is not Gen3 capable, max speed 0x%x, need 0x3\n", linkcap & PCI_EXP_LNKCAP_SLS); @@ -694,9 +697,6 @@ const struct pci_error_handlers hfi1_pci_err_handler = { /* gasket block secondary bus reset delay */ #define SBR_DELAY_US 200000 /* 200ms */ -/* mask for PCIe capability register lnkctl2 target link speed */ -#define LNKCTL2_TARGET_LINK_SPEED_MASK 0xf - static uint pcie_target = 3; module_param(pcie_target, uint, S_IRUGO); MODULE_PARM_DESC(pcie_target, "PCIe target speed (0 skip, 1-3 Gen1-3)"); @@ -1045,13 +1045,13 @@ int do_pcie_gen3_transition(struct hfi1_devdata *dd) return 0; if (pcie_target == 1) { /* target Gen1 */ - target_vector = GEN1_SPEED_VECTOR; + target_vector = PCI_EXP_LNKCTL2_TLS_2_5GT; target_speed = 2500; } else if (pcie_target == 2) { /* target Gen2 */ - target_vector = GEN2_SPEED_VECTOR; + target_vector = PCI_EXP_LNKCTL2_TLS_5_0GT; target_speed = 5000; } else if (pcie_target == 3) { /* target Gen3 */ - target_vector = GEN3_SPEED_VECTOR; + target_vector = PCI_EXP_LNKCTL2_TLS_8_0GT; target_speed = 8000; } else { /* off or invalid target - skip */ @@ -1290,8 +1290,8 @@ retry: dd_dev_info(dd, "%s: ..old link control2: 0x%x\n", __func__, (u32)lnkctl2); /* only write to parent if target is not as high as ours */ - if ((lnkctl2 & LNKCTL2_TARGET_LINK_SPEED_MASK) < target_vector) { - lnkctl2 &= ~LNKCTL2_TARGET_LINK_SPEED_MASK; + if ((lnkctl2 & PCI_EXP_LNKCTL2_TLS) < target_vector) { + lnkctl2 &= ~PCI_EXP_LNKCTL2_TLS; lnkctl2 |= target_vector; dd_dev_info(dd, "%s: ..new link control2: 0x%x\n", __func__, (u32)lnkctl2); @@ -1316,7 +1316,7 @@ retry: dd_dev_info(dd, "%s: ..old link control2: 0x%x\n", __func__, (u32)lnkctl2); - lnkctl2 &= ~LNKCTL2_TARGET_LINK_SPEED_MASK; + lnkctl2 &= ~PCI_EXP_LNKCTL2_TLS; lnkctl2 |= target_vector; dd_dev_info(dd, "%s: ..new link control2: 0x%x\n", __func__, (u32)lnkctl2); |