| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | dt-bindings: net: dsa: lantiq, xrx200-gswip: Fix minor style fixes | Hauke Mehrtens | 2018-09-17 | 1 | -8/+10 |
| | | | | | | | | | | | | | | | | | * Use one compatible line per line in the documentation * Remove SoC revision depended compatible lines, we can detect that in the driver * Use lower case letters in hex addresses * Fix the size of the address ranges in the example, this now matches the sizes used by the SoC. The old ones will also work, this just adds some empty address space. * Change the reg size of the gphy-fw node Fixes: 86ce2bc73c7a ("dt-bindings: net: dsa: Add lantiq, xrx200-gswip DT bindings") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: devicetree@vger.kernel.org Signed-off-by: David S. Miller <davem@davemloft.net> | ||||
| * | dt-bindings: net: dsa: Add lantiq, xrx200-gswip DT bindings | Hauke Mehrtens | 2018-09-13 | 1 | -0/+141 |
| This adds the binding for the GSWIP (Gigabit switch) core found in the xrx200 / VR9 Lantiq / Intel SoC. This part takes care of the switch, MDIO bus, and loading the FW into the embedded GPHYs. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: devicetree@vger.kernel.org Signed-off-by: David S. Miller <davem@davemloft.net> | |||||
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