summaryrefslogtreecommitdiffstats
path: root/arch/arc/plat-axs10x
Commit message (Expand)AuthorAgeFilesLines
* PCI: consolidate PCI config entry in drivers/pciChristoph Hellwig2018-11-231-1/+1
* ARC: [plat-axs103] refactor the quad core DT quirk codeEugeniy Paltsev2017-12-201-4/+6
* ARC: [plat-axs103]: Set initial core pll output frequencyEugeniy Paltsev2017-12-201-6/+2
* ARC: [plat-axs10x] DTS: Add reset controller node to manage ethernet resetEugeniy Paltsev2017-11-151-7/+0
* ARC: [plat-axs10x] auto-select AXS101 or AXS103 given the ISA configVineet Gupta2017-10-291-0/+2
* ARC: [plat-axs103] Add temporary quirk to reset ethernet IPEugeniy Paltsev2017-10-031-0/+7
* ARC: [plat-axs103] refactor the DT fudging codeVineet Gupta2017-09-011-24/+22
* ARC: [plat-axs103] use clk driver #1: Get rid of platform specific cpu clk se...Eugeniy Paltsev2017-09-011-113/+5
* ARC: move mcip.h into include/soc and adjust the includesVineet Gupta2016-11-301-1/+1
* Merge tag 'arc-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgup...Linus Torvalds2016-05-191-7/+20
|\
| * arc: axs103_smp: Fix CPU frequency to 100MHz for dual-coreAlexey Brodkin2016-05-181-2/+0
| * ARC: Don't try to use value of top level clock-frequency in DTAlexey Brodkin2016-05-091-2/+0
| * ARC: [dts] Add clk feeding into timers to DTsVineet Gupta2016-05-091-1/+13
| * ARC: [plat-axs] Refactor core freq get/setVineet Gupta2016-05-091-5/+10
* | arc: select GPIOLIB directlyLinus Walleij2016-04-261-1/+1
|/
* ARC: Add PCI supportJoao Pinto2016-03-101-0/+1
* ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_smp()Vineet Gupta2015-10-281-3/+0
* ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_early_smp()Vineet Gupta2015-10-281-5/+0
* ARCv2: [axs103_smp] Reduce clk for SMP FPGA configsVineet Gupta2015-09-111-0/+2
* ARC: add/fix some comments in code - no functional changeVineet Gupta2015-08-201-1/+1
* ARCv2: [axs103_smp] Reduce clk for Quad FPGA configsVineet Gupta2015-08-041-0/+15
* ARCv2: [vdk] dts files and defconfig for HS38 VDKRuud Derwig2015-06-251-0/+8
* ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x coresVineet Gupta2015-06-252-11/+200
* ARC: [axs101] Add missing __init annotationsVineet Gupta2015-06-191-6/+6
* ARC: [axs101] Tweak DDR port aperture mappings for performanceVineet Gupta2015-06-191-4/+4
* ARC: [axs101] Add support for AXS101 SDP (software development platform)Alexey Brodkin2015-06-193-0/+342
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-25 13:13:38 +0000