linux-0-day - Check Linux patches

	Commit message (Expand)	Author	Age	Files	Lines
*	RISC-V: Free-up initrd in free_initrd_mem()	Anup Patel	2019-02-21	1	-1/+2
*	RISC-V: Implement compile-time fixed mappings	Anup Patel	2019-02-21	1	-0/+34
*	RISC-V: Move setup_vm() to mm/init.c	Anup Patel	2019-02-21	1	-0/+49
*	RISC-V: Move setup_bootmem() to mm/init.c	Anup Patel	2019-02-21	1	-0/+70
*	riscv: fixup max_low_pfn with PFN_DOWN.	Guo Ren	2019-01-23	1	-1/+2
*	mm: remove include/linux/bootmem.h	Mike Rapoport	2018-10-31	1	-2/+1
*	memblock: rename free_all_bootmem to memblock_free_all	Mike Rapoport	2018-10-31	1	-1/+1
*	RISC-V: Avoid corrupting the upper 32-bit of phys_addr_t in ioremap	Vincent Chen	2018-10-22	1	-1/+1
*	mm: convert return type of handle_mm_fault() caller to vm_fault_t	Souptick Joarder	2018-08-17	1	-1/+2
*	RISC-V: Add conditional macro for zone of DMA32	Zong Li	2018-07-04	1	-0/+2
*	Merge tag 'riscv-for-linus-4.16-merge_window' of git://git.kernel.org/pub/scm...	Linus Torvalds	2018-02-07	2	-6/+10
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\| *	riscv: rename sptbr to satp	Christoph Hellwig	2018-01-30	1	-0/+4
\| *	riscv: don't read back satp in paging_init	Christoph Hellwig	2018-01-30	1	-2/+0
\| *	riscv: add ZONE_DMA32	Christoph Hellwig	2018-01-30	1	-4/+6
* \|	Merge branch 'work.whack-a-mole' of git://git.kernel.org/pub/scm/linux/kernel...	Linus Torvalds	2018-01-31	1	-1/+0
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\| *	riscv: use linux/uaccess.h, not asm/uaccess.h...	Al Viro	2017-12-04	1	-1/+0
* \|	riscv: rename SR_* constants to match the spec	Christoph Hellwig	2018-01-07	1	-1/+1
* \|	RISC-V: Fixes for clean allmodconfig build	Palmer Dabbelt	2017-12-01	1	-1/+1
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\| * \|	RISC-V: io.h: type fixes for warnings	Olof Johansson	2017-11-30	1	-1/+1
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* /	RISC-V: Flush I$ when making a dirty page executable	Andrew Waterman	2017-11-30	2	-0/+24
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*	RISC-V: Build Infrastructure	Palmer Dabbelt	2017-09-26	1	-0/+4
*	RISC-V: Paging and MMU	Palmer Dabbelt	2017-09-26	1	-0/+282
*	RISC-V: Device, timer, IRQs, and the SBI	Palmer Dabbelt	2017-09-26	1	-0/+92
*	RISC-V: ELF and module implementation	Palmer Dabbelt	2017-09-26	1	-0/+37
*	RISC-V: Init and Halt Code	Palmer Dabbelt	2017-09-26	1	-0/+70