summaryrefslogtreecommitdiffstats
path: root/arch/x86/include/asm/msr-index.h
Commit message (Expand)AuthorAgeFilesLines
* Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2018-12-261-0/+37
|\
| * KVM: x86: Add Intel PT virtualization work modeChao Peng2018-12-211-0/+1
| * perf/x86/intel/pt: Add new bit definitions for PT MSRsLuwei Kang2018-12-211-0/+3
| * perf/x86/intel/pt: Move Intel PT MSRs bit defines to global headerChao Peng2018-12-211-0/+33
* | kvm: x86: Add AMD's EX_CFG to the list of ignored MSRsEduardo Habkost2018-12-181-0/+1
|/
* x86/speculation: Prepare for per task indirect branch speculation controlTim Chen2018-11-281-2/+3
* perf/x86/intel: Add a separate Arch Perfmon v4 PMI handlerAndi Kleen2018-10-021-0/+1
* x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentryPaolo Bonzini2018-08-051-0/+1
* x86/KVM/VMX: Add L1D MSR based flushPaolo Bonzini2018-07-041-0/+6
* x86: msr-index.h: Correct SNB_C1/C3_AUTO_UNDEMOTE definesMatt Turner2018-06-011-2/+2
* x86/bugs: Rename SSBD_NO to SSB_NOKonrad Rzeszutek Wilk2018-05-181-1/+1
* x86/speculation: Add virtualized speculative store bypass disable supportTom Lendacky2018-05-171-0/+2
* x86/bugs: Rename _RDS to _SSBDKonrad Rzeszutek Wilk2018-05-091-5/+5
* x86/process: Allow runtime control of Speculative Store BypassThomas Gleixner2018-05-031-1/+2
* x86/bugs/intel: Set proper CPU features and setup RDSKonrad Rzeszutek Wilk2018-05-031-0/+6
* x86/msr: Add AMD Core Perf Extension MSRsJanakarajan Natarajan2018-03-161-0/+14
* Merge branch 'x86/hyperv' of git://git.kernel.org/pub/scm/linux/kernel/git/ti...Radim Krčmář2018-02-011-0/+15
|\
| * Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2018-01-291-0/+12
| |\
| | * x86/msr: Add definitions for new speculation control MSRsDavid Woodhouse2018-01-261-0/+12
| * | Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2018-01-141-0/+3
| |\|
| | * x86/cpu/AMD: Use LFENCE_RDTSC in preference to MFENCE_RDTSCTom Lendacky2018-01-091-0/+1
| | * x86/cpu/AMD: Make LFENCE a serializing instructionTom Lendacky2018-01-091-0/+2
* | | x86/CPU/AMD: Add the Secure Encrypted Virtualization CPU featureTom Lendacky2017-12-041-0/+2
|/ /
* / x86/boot: Add early boot support when running with SEV activeTom Lendacky2017-11-071-0/+3
|/
* License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman2017-11-021-0/+1
* x86/cpu/AMD: Add the Secure Memory Encryption CPU featureTom Lendacky2017-07-181-0/+2
* Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2017-07-061-0/+2
|\
| * kvm: vmx: Check value written to IA32_BNDCFGSJim Mattson2017-06-071-0/+2
* | Merge tag 'pm-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafa...Linus Torvalds2017-07-041-6/+12
|\ \
| * \ Merge branch 'utilities' of git://git.kernel.org/pub/scm/linux/kernel/git/len...Rafael J. Wysocki2017-05-161-6/+12
| |\ \ | | |/ | |/|
| | * x86: msr-index.h: fix shifts to ULL results in HWP macros.Len Brown2017-04-291-3/+3
| | * x86: msr-index.h: define HWP.EPP valuesLen Brown2017-04-291-0/+4
| | * x86: msr-index.h: define EPB mid-pointsLen Brown2017-02-251-3/+5
* | | perf/x86: Add sysfs entry to freeze counters on SMIKan Liang2017-05-231-0/+2
|/ /
* | x86/arch_prctl: Add ARCH_[GET|SET]_CPUIDKyle Huey2017-03-201-0/+2
* | x86/cpufeature: Detect CPUID faulting supportKyle Huey2017-03-201-0/+2
* | x86/msr: Rename MISC_FEATURE_ENABLES to MISC_FEATURES_ENABLESKyle Huey2017-03-201-3/+3
* | x86/process: Correct and optimize TIF_BLOCKSTEP switchKyle Huey2017-03-111-0/+1
* | Merge branch 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/len...Rafael J. Wysocki2017-03-011-1/+10
|\ \
| * | x86 msr_index.h: Define MSR_MISC_FEATURE_CONTROLLen Brown2017-03-011-0/+1
| * | x86 msr-index.h: Define Atom specific core ratio MSR locationsLen Brown2017-03-011-0/+6
| * | tools/power turbostat: Baytrail c-state supportLen Brown2017-03-011-0/+2
| * | x86: msr-index.h: Remove unused MSR_NHM_SNB_PKG_CST_CFG_CTLLen Brown2017-03-011-1/+0
| * | x86: msr-index.h: Define MSR_PKG_CST_CONFIG_CONTROLLen Brown2017-03-011-0/+1
| |/
* / x86/msr: Add MSR_MISC_FEATURE_ENABLES and RING3MWAIT bitGrzegorz Andrejczuk2017-02-041-0/+5
|/
* x86/mce: Include the PPIN in MCE records when availableTony Luck2016-11-231-0/+4
* x86: Remove duplicate rtit status MSR macroLongpeng(Mike)2016-10-141-1/+0
* x86: remove duplicate turbo ratio limit MSRsSrinivas Pandruvada2016-07-071-2/+0
* perf/x86/intel/pt: Add IP filtering register/CPUID bitsAlexander Shishkin2016-05-051-0/+9
* perf/x86/intel/pt: Move PT specific MSR bit definitions to a private headerAlexander Shishkin2016-05-051-20/+0
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-19 03:47:52 +0000