summaryrefslogtreecommitdiffstats
path: root/drivers/pwm
Commit message (Collapse)AuthorAgeFilesLines
* Merge tag 'pwm/for-4.11-rc1' of ↵Linus Torvalds2017-03-0123-275/+445
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This set contains mostly fixes to existing drivers as well as cleanup of code that's not been in active use for a while" * tag 'pwm/for-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (27 commits) acpi: lpss: call pwm_add_table() for BSW PWM device pwm: Try to load modules during pwm_get() pwm: Don't hold pwm_lookup_lock longer than necessary pwm: Make the PWM_POLARITY flag in DTB optional pwm: Print error messages with pr_err() instead of pr_debug() pwm: imx: Add polarity inversion support to i.MX's PWMv2 pwm: imx: doc: Update imx-pwm.txt documentation entry pwm: imx: Remove redundant i.MX PWMv2 code pwm: imx: Provide atomic PWM support for i.MX PWMv2 pwm: imx: Move PWMv2 wait for fifo slot code to a separate function pwm: imx: Move PWMv2 software reset code to a separate function pwm: imx: Rewrite v1 code to facilitate switch to atomic PWM pwm: imx: Add separate set of PWM ops for v1 and v2 pwm: imx: Remove ipg clock and enable per clock when required pwm: lpss: Add Intel Gemini Lake PCI ID pwm: lpss: Do not export board infos for different PWM types pwm: lpss: Avoid reconfiguring while UPDATE bit is still enabled pwm: lpss: Switch to new atomic API pwm: lpss: Allow duty cycle to be 0 pwm: lpss: Avoid potential overflow of base_unit ...
| * Merge branch 'for-4.11/drivers' into for-nextThierry Reding2017-02-1010-227/+408
| |\
| | * pwm: imx: Add polarity inversion support to i.MX's PWMv2Lukasz Majewski2017-01-301-5/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With this patch the polarity settings for i.MX's PWMv2 is now supported on top of atomic PWM setting Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: imx: Remove redundant i.MX PWMv2 codeLukasz Majewski2017-01-301-127/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code providing functionality surpassed by the atomic PWM is not needed anymore and hence can be removed. Suggested-by: Stefan Agner <stefan@agner.ch> Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: imx: Provide atomic PWM support for i.MX PWMv2Lukasz Majewski2017-01-301-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit provides apply() callback implementation for i.MX's PWMv2. Suggested-by: Stefan Agner <stefan@agner.ch> Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: imx: Move PWMv2 wait for fifo slot code to a separate functionLukasz Majewski2017-01-301-18/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code, which waits for fifo slot, has been extracted from imx_pwm_config_v2 function and moved to new one - imx_pwm_wait_fifo_slot(). This change reduces the overall size of imx_pwm_config_v2() and prepares it for atomic PWM operation. Suggested-by: Stefan Agner <stefan@agner.ch> Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: imx: Move PWMv2 software reset code to a separate functionLukasz Majewski2017-01-301-10/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The software reset code has been extracted from imx_pwm_config_v2 function and moved to new one - imx_pwm_sw_reset(). This change reduces the overall size of imx_pwm_config_v2() and prepares it for atomic PWM operation. Suggested-by: Stefan Agner <stefan@agner.ch> Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: imx: Rewrite v1 code to facilitate switch to atomic PWMLukasz Majewski2017-01-301-10/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code has been rewritten to remove "generic" calls to imx_pwm_{enable|disable|config}. Such approach would facilitate switch to atomic PWM (a.k.a ->apply()) implementation. Suggested-by: Stefan Agner <stefan@agner.ch> Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: imx: Add separate set of PWM ops for v1 and v2Lukasz Majewski2017-01-301-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides separate set of PWM operations utilized by i.MX's v1 and v2 of the PWM hardware. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Acked-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: imx: Remove ipg clock and enable per clock when requiredSascha Hauer2017-01-301-10/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The use of the ipg clock was introduced with commit 7b27c160c681 ("pwm: i.MX: fix clock lookup"). In the commit message it was claimed that the ipg clock is enabled for register accesses. This is true for the ->config() callback, but not for the ->set_enable() callback. Given that the ipg clock is not consistently enabled for all register accesses we can assume that either it is not required at all or that the current code does not work. Remove the ipg clock code for now so that it's no longer in the way of refactoring the driver. On the other hand, the i.MX 7 IP requires the peripheral clock to be enabled before accessing its registers. Since ->config() can be called when the PWM is disabled (in which case, the peripheral clock is also disabled), we need to surround the imx->config() with clk_prepare_enable(per_clk)/clk_disable_unprepare(per_clk) calls. Note that the driver was working fine for the i.MX 7 IP so far because the ipg and peripheral clock use the same hardware clock gate, which guaranteed peripheral clock activation even when ->config() was called when the PWM was disabled. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Stefan Agner <stefan@agner.ch> Tested-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: lpss: Add Intel Gemini Lake PCI IDMika Westerberg2017-01-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Gemini Lake PWM is pretty much same as used in Intel Broxton. Add this new PCI ID to the list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: lpss: Do not export board infos for different PWM typesAndy Shevchenko2017-01-304-28/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PWM LPSS probe drivers just pass a pointer to the exported board info structures to pwm_lpss_probe() based on device PCI or ACPI ID. In order to remove the knowledge of specific devices from library part of the driver and reduce noise in exported namespace just duplicate the board info structures and stop exporting them. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: lpss: Avoid reconfiguring while UPDATE bit is still enabledIlkka Koskinen2017-01-301-9/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PWM Configuration register has SW_UPDATE bit that is set when a new configuration is written to the register. The bit is automatically cleared at the start of the next output cycle by the IP block. If one writes a new configuration to the register while it still has the bit enabled, PWM may freeze. That is, while one can still write to the register, it won't have an effect. Thus, we try to sleep long enough that the bit gets cleared and make sure the bit is not enabled while we update the configuration. Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Richard Griffiths <richard.a.griffiths@intel.com> Signed-off-by: Ilkka Koskinen <ilkka.koskinen@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: lpss: Switch to new atomic APIAndy Shevchenko2017-01-301-35/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of doing things separately, which is not so reliable on some platforms, switch the driver to use new atomic API, i.e. ->apply() callback. The change has been tested on Intel platforms such as Broxton, BayTrail, and Merrifield. Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: lpss: Allow duty cycle to be 0Andy Shevchenko2017-01-301-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A duty cycle is represented by values [0..<period>] which reflects [0%..100%]. 0% of the duty cycle means always off (logical "0") on output. Allow this in the driver. Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: lpss: Avoid potential overflow of base_unitAndy Shevchenko2017-01-301-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The resolution of base_unit is derived from base_unit_bits and thus must be equal to (2^base_unit_bits - 1). Otherwise frequency and therefore base_unit might potentially overflow. Prevent the above by substracting 1 in all cases where base_unit_bits or derivative is used. Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: pca9685: Fix period change with same duty cycleClemens Gruber2017-01-201-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When first implementing support for changing the output frequency, an optimization was added to continue the PWM after changing the prescaler without having to reprogram the ON and OFF registers for the duty cycle, in case the duty cycle stayed the same. This was flawed, because we compared the absolute value of the duty cycle in nanoseconds instead of the ratio to the period. Fix the problem by removing the shortcut. Fixes: 01ec8472009c9 ("pwm-pca9685: Support changing the output frequency") Cc: <stable@vger.kernel.org> # v4.3+ Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: constify pwm_ops structuresBhumika Goyal2017-01-194-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Declare pwm_ops structures as const as they are only stored in the ops field of a pwm_chip structure. This field is of type const struct pwm_ops *, so pwm_ops structures having this property can be declared as const. Done using Coccinelle: @r1 disable optional_qualifier@ identifier i; position p; @@ static struct pwm_ops i@p={...}; @ok1@ identifier r1.i; position p; struct pxa_pwm_chip pwm; struct bfin_pwm_chip bwm; struct vt8500_chip vp; struct imx_chip icp; @@ ( pwm.chip.ops=&i@p | bwm.chip.ops=&i@p | vp.chip.ops=&i@p | icp.chip.ops=&i@p ) @bad@ position p!={r1.p,ok1.p}; identifier r1.i; @@ i@p @depends on !bad disable optional_qualifier@ identifier r1.i; @@ +const struct pwm_ops i; File size details: text data bss dec hex filename 1646 328 0 1974 7b6 drivers/pwm/pwm-imx.o 1742 224 0 1966 7ae drivers/pwm/pwm-imx.o 1941 296 0 2237 8bd drivers/pwm/pwm-pxa.o 2037 192 0 2229 8b5 drivers/pwm/pwm-pxa.o 1946 296 0 2242 8c2 drivers/pwm/pwm-vt8500.o 2050 192 0 2242 8c2 drivers/pwm/pwm-vt8500.o The drivers/pwm/pwm-bfin.o file did not compile. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: bcm-iproc: Update dependencies for compile-testScott Branden2017-01-191-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add dependency on COMMON_CLK and allow COMPILE_TEST for broader compile coverage. Default to Y for IPROC SoCs. This allows the driver to simply be enabled by selecting PWM. Signed-off-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> [thierry.reding@gmail.com: reword commit message] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| | * pwm: pca9685: Allow any of the 16 PWMs to be used as a GPIOMika Westerberg2017-01-191-1/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCA9685 controller has full on/off bit for each PWM channel. Setting this bit bypasses the PWM control and the line works just as it would be a GPIO. Furthermore in Intel Galileo it is actually used as GPIO output for discreet muxes on the board. This patch adds GPIO output only support for the driver so that we can control the muxes on Galileo using standard GPIO interfaces available in the kernel. GPIO and PWM functionality is exclusive so only one can be active at a time on a single PWM channel. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | pwm: Try to load modules during pwm_get()Hans de Goede2017-01-301-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a module name string to the pwm_lookup struct and if specified try to load the module using request_module() if pwmchip_find_by_name() is unable to find the PWM chip. This is a last resort to work around drivers that can't - and can't be made to - deal with deferred probe. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [thierry.reding@gmail.com: rename new macro, reword commit message] [thierry.reding@gmail.com: add comment explaining use-case] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | pwm: Don't hold pwm_lookup_lock longer than necessaryHans de Goede2017-01-301-10/+8
| | | | | | | | | | | | | | | | | | | | | | | | There is no need to hold pwm_lookup_lock after we're done with looping over pwm_lookup_list, so release it earlier. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | pwm: Make the PWM_POLARITY flag in DTB optionalLothar Wassmann2017-01-301-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the PWM chip driver registration so that a chip driver that supports polarity inversion can still be used with DTBs that don't provide the polarity flag as part of the specifier. This is done to provide polarity inversion support for the pwm-imx driver without having to modify all existing DTS files. Signed-off-by: Lothar Wassmann <LW@KARO-electronics.de> Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Suggested-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | pwm: Print error messages with pr_err() instead of pr_debug()Lothar Wassmann2017-01-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the messages that are printed in case of fatal errors actually visible to the user without having to recompile the driver with debugging enabled. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | pwm: Remove .can_sleep from struct pwm_chipThierry Reding2017-01-0414-14/+1
| | | | | | | | | | | | | | | | | | | | | All PWM devices have been marked as "might sleep" since v4.5, there is no longer a need to differentiate on a per-chip basis. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | pwm: Remove pwm_can_sleep()Thierry Reding2017-01-041-12/+0
| |/ | | | | | | | | | | | | The last user of this function has been removed, so it is no longer needed. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* / pwm: Add driver for STM32 plaftormBenjamin Gaignard2017-01-253-0/+407
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver adds support for PWM driver on STM32 platform. The SoC have multiple instances of the hardware IP and each of them could have small differences: number of channels, complementary output, auto reload register size... version 9: - fix commit message header - remove one space MODULE_ALIAS version 8: - fix comments done by Thierry on version 7 version 6: - change st,breakinput parameter to make it usuable for stm32f7 too. version 4: - detect at probe time hardware capabilities - fix comments done on v2 and v3 - use PWM atomic ops version 2: - only keep one comptatible - use DT parameters to discover hardware block configuration Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* Merge tag 'pwm/for-4.10-rc1' of ↵Linus Torvalds2016-12-154-1/+281
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This is a very tiny pull request, with just a new driver for HiSilicon BVT SoCs and a cleanup for the Amlogic Meson driver. There are other patches on the list, but my timing was really bad this time and I ended up not having the time to look at them in enough detail to be comfortable merging them" * tag 'pwm/for-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: Add PWM driver for HiSilicon BVT SOCs pwm: meson: Remove unneeded platform MODULE_ALIAS
| * pwm: Add PWM driver for HiSilicon BVT SOCsyuanjian2016-11-293-0/+281
| | | | | | | | | | | | | | | | | | | | | | Add PWM driver for the PWM controller found on HiSilicon BVT SoCs such as Hi3519V100, Hi3516CV300, etc. The PWM controller is primarily in charge of controlling the P-Iris lens. Reviewed-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Signed-off-by: Jian Yuan <yuanjian12@hisilicon.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: meson: Remove unneeded platform MODULE_ALIASJavier Martinez Canillas2016-10-211-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | The Amlogic Meson is a DT-only platform, which means the devices are registered via OF and not using the legacy platform devices support. So there's no need to have a MODULE_ALIAS("platform:meson-pwm") since the reported uevent MODALIAS to user-space will always be the OF one. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* | pwm: Fix device reference leakJohan Hovold2016-11-291-0/+2
| | | | | | | | | | | | | | | | | | | | Make sure to drop the reference to the parent device taken by class_find_device() after "unexporting" any children when deregistering a PWM chip. Fixes: 0733424c9ba9 ("pwm: Unexport children before chip removal") Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* | pwm: meson: Add missing spin_lock_init()Axel Lin2016-10-211-0/+1
|/ | | | | | | | The driver uses the spin_lock but does not initialize it. Fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* Merge branch 'for-4.9/drivers' into for-nextThierry Reding2016-09-0812-141/+1127
|\
| * pwm: meson: Handle unknown ID valuesArnd Bergmann2016-09-081-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When building with -Wmaybe-uninitialized, we get a couple of harmless warnings about three functions in this new driver that don't look safe to the compiler: drivers/pwm/pwm-meson.c: In function 'meson_pwm_get_state': drivers/pwm/pwm-meson.c:355:26: error: 'mask' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c: In function 'meson_pwm_disable': drivers/pwm/pwm-meson.c:263:13: error: 'enable' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c: In function 'meson_pwm_apply': drivers/pwm/pwm-meson.c:231:13: error: 'clk_shift' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c:231:36: error: 'enable' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c:231:24: error: 'clk_enable' may be used uninitialized in this function [-Werror=maybe-uninitialized] Specifically, if we have a device with an ID other than 0 or 1, this would result in undefined behavior. This is currently not possible, but the compiler cannot be expected to know this. This patch adds a 'default' clause to let the compiler know what to do instead, which shuts up the warning and makes the code slightly more resiliant in case it gets extended to other identifiers. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Take the opportunity to conduct a little house keepingLee Jones2016-09-081-72/+81
| | | | | | | | | | | | | | | | | | This includes fixing some Coding Style issues and re-ordering and/or simplifying a little code. Signed-off-by: Lee Jones <lee.jones@linaro.org> [thierry.reding@gmail.com: applied some bikeshedding> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: It's now valid for number of PWM channels to be zeroLee Jones2016-09-081-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | Setting up the STI PWM IP as capture only, with zero PWM output devices is a perfectly valid configuration. It is no longer okay to assume that there must be at least 1 PWM output device. In this patch we make the default number of PWM output devices zero and only configure channels explicitly requested. Reported-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Add PWM capture callbackLee Jones2016-09-081-0/+88
| | | | | | | | | | | | | | | | | | | | | | Once a PWM capture has been initiated, the capture call enables a rising edge detection interrupt, then waits. Once each of the 3 phase changes have been recorded the thread then wakes. The remaining part of the call carries out the relevant calculations and returns a structure filled out with the capture data. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Add support for PWM capture interruptsLee Jones2016-09-081-1/+91
| | | | | | | | | | | | | | | | Here we're requesting the PWM capture IRQ and supplying the handler that will be called in the event of an interrupt to handle it. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Initialise PWM capture device dataLee Jones2016-09-081-7/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each PWM capture device is allocated a structure to hold its own state. During a capture the device may be partaking in one of 3 phases. Initial (rising) phase change, a subsequent (falling) phase change indicating end of the duty-cycle phase and finally a final (rising) phase change indicating the end of the period. The timer value snapshot each event is held in a variable of the same name, and the phase number (0, 1, 2) is contained in the index variable. Other device specific information, such as GPIO pin, the IRQ wait queue and locking is also contained in the structure. This patch initialises this structure for each of the available devices. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Supply PWM Capture clock handlingLee Jones2016-09-081-0/+25
| | | | | | | | | | | | | | | | | | ST's PWM IP is supplied by 2 different clocks. One for PWM output and the other for capture. This patch provides clock handling for the latter. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Supply PWM capture register addresses and bit locationsLee Jones2016-09-081-0/+25
| | | | | | | | | | | | | | | | This is in preparation for subsequent patches that add support for PWM capture to this driver. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Only request clock rate when neededLee Jones2016-09-081-8/+8
| | | | | | | | | | | | | | | | | | | | In the original code the clock rate was only obtained during initialisation; however, the rate may change between then and its use. This patch ensures the correct rate is acquired just before use. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Reorganise register names in preparation for new functionalityLee Jones2016-09-081-35/+41
| | | | | | | | | | | | | | | | | | Exciting functionality is on the way to this device. But before we can add it, we need to do some basic housekeeping so the additions can be added cleanly. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Rename channel => deviceLee Jones2016-09-081-16/+16
| | | | | | | | | | | | | | | | This is to bring the terminology used in the STi PWM driver more into line with the PWM subsystem. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpc-18xx: use pwm_set_chip_dataoliver@schinagl.nl2016-09-081-4/+8
| | | | | | | | | | | | | | | | | | | | | | The lpc-18xx driver currently manipulates the pwm_device struct directly rather than using the pwm_set_chip_data() function. While the current method may save a clock cycle or two, using the explicit function call makes it more obvious that data is set to the local chip data pointer. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Reviewed-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sunxi: Add H3 supportMilo Kim2016-09-081-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | H3 PWM controller has same register layout as sun4i driver, so it works by adding H3 specific data. Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: linux-pwm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: Add support for Meson PWM ControllerNeil Armstrong2016-09-083-0/+530
| | | | | | | | | | | | | | | | | | | | Add support for the PWM controller found in the Amlogic SoCs. This driver supports the Meson8b and GXBB SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: samsung: Fix to use lowest div for large enough modulation bitsSeung-Woo Kim2016-09-061-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From pwm_samsung_calc_tin(), there is routine to find the lowest divider possible to generate lower frequency than requested one. But it is always possible to generate requested frequency with large enough modulation bits except on s3c24xx, so this patch fixes to use lowest div for the case. This patch removes following UBSAN warning: UBSAN: Undefined behaviour in drivers/pwm/pwm-samsung.c:197:13 shift exponent 32 is too large for 32-bit type 'long unsigned int' [...] [<c0670248>] (ubsan_epilogue) from [<c06707b4>] (__ubsan_handle_shift_out_of_bounds+0xd8/0x120) [<c06707b4>] (__ubsan_handle_shift_out_of_bounds) from [<c0694b28>] (pwm_samsung_config+0x508/0x6a4) [<c0694b28>] (pwm_samsung_config) from [<c069286c>] (pwm_apply_state+0x174/0x40c) [<c069286c>] (pwm_apply_state) from [<c0b2e070>] (pwm_fan_probe+0xc8/0x488) [<c0b2e070>] (pwm_fan_probe) from [<c07ba8b0>] (platform_drv_probe+0x70/0x150) [...] Cc: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: pwm-tipwmss: Remove all runtime PM gets/putsJyri Sarha2016-09-061-19/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove all pm_runtime_get_sync() and pm_runtime_put_sync() call as well as the dummy pm_ops from the pwm-tipwmss driver. No registers are being modified. The runtime PM still needs to be enabled, so that the runtime PM framework can take care of enabling/disabling the PWMSS clock when submodules of PWMSS (ECAP or EHRPWM) call runtime PM APIs. With this change PWMSS clock goes to idle when none of the submodules are in use. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: cros-ec: Add __packed to prevent paddingBrian Norris2016-09-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the particular usage in question is likely safe (struct cros_ec_command is 32-bit aligned, followed by <= 32-bit fields), it's been suggested this is not a great pattern to follow for the general case -- for example, if we follow a 'struct cros_ec_command' (which is 32-bit- but not 64-bit-aligned) with a struct that starts with a 64-bit type (e.g., u64), the compiler may add padding. Let's add __packed, to inform the compiler of our true intention -- to have no padding between these struct elements -- and to future proof for any refactorings that might occur. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-09 08:47:31 +0000