From f98fe47ce51dee6d97dd91bbeccdde23f043c754 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Mon, 19 Mar 2018 20:26:08 +0900
Subject: kbuild: link $(real-obj-y) instead of $(obj-y) into built-in.a

In Kbuild, Makefiles can add the same object to obj-y multiple
times.  So,

   obj-y += foo.o
   obj-y += foo.o

is fine.

However, this is not true when the same object is added multiple
times via composite objects.  For example,

   obj-y    += foo.o bar.o
   foo-objs := foo-bar-common.o foo-only.o
   bar-objs := foo-bar-common.o bar-only.o

causes build error because two instances of foo-bar-common.o are
linked into the vmlinux.

Makefiles tend to invent ugly work-around, for example
  - lib/zstd/Makefile
  - drivers/net/ethernet/cavium/liquidio/Makefile

The technique used in Kbuild to avoid the multiple definition error
is to use $(filter $(obj-y), $^).  Here, $^ lists the names of all
the prerequisites with duplicated names removed.

By replacing it with $(filter $(real-obj-y), $^) we can do likewise
for composite objects.  For built-in objects, we do not need to keep
the composite object structure.  We can simply expand them, and link
$(real-obj-y) to built-in.a.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 scripts/Makefile.build | 21 +++++++--------------
 1 file changed, 7 insertions(+), 14 deletions(-)

(limited to 'scripts/Makefile.build')

diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 8c1287f04bed5..316cb95d7ff2f 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -73,10 +73,10 @@ endif
 
 ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
 lib-target := $(obj)/lib.a
-obj-y += $(obj)/lib-ksyms.o
+real-obj-y += $(obj)/lib-ksyms.o
 endif
 
-ifneq ($(strip $(obj-y) $(need-builtin)),)
+ifneq ($(strip $(real-obj-y) $(need-builtin)),)
 builtin-target := $(obj)/built-in.a
 endif
 
@@ -412,7 +412,7 @@ endif
 $(obj)/%.o: $(src)/%.S $(objtool_dep) FORCE
 	$(call if_changed_rule,as_o_S)
 
-targets += $(real-obj-y) $(real-obj-m) $(lib-y)
+targets += $(filter-out $(subdir-obj-y), $(real-obj-y)) $(real-obj-m) $(lib-y)
 targets += $(extra-y) $(MAKECMDGOALS) $(always)
 
 # Linker scripts preprocessor (.lds.S -> .lds)
@@ -455,12 +455,12 @@ cmd_make_empty_builtin = rm -f $@; $(AR) rcSTP$(KBUILD_ARFLAGS)
 quiet_cmd_link_o_target = AR      $@
 
 # If the list of objects to link is empty, just create an empty built-in.a
-cmd_link_o_target = $(if $(strip $(obj-y)),\
-		      $(cmd_make_builtin) $@ $(filter $(obj-y), $^) \
+cmd_link_o_target = $(if $(strip $(real-obj-y)),\
+		      $(cmd_make_builtin) $@ $(filter $(real-obj-y), $^) \
 		      $(cmd_secanalysis),\
 		      $(cmd_make_empty_builtin) $@)
 
-$(builtin-target): $(obj-y) FORCE
+$(builtin-target): $(real-obj-y) FORCE
 	$(call if_changed,link_o_target)
 
 targets += $(builtin-target)
@@ -534,23 +534,16 @@ $($(subst $(obj)/,,$(@:.o=-m)))), $^)
 
 cmd_link_multi-link = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
 
-quiet_cmd_link_multi-y = AR      $@
-cmd_link_multi-y = rm -f $@; $(AR) rcSTP$(KBUILD_ARFLAGS) $@ $(link_multi_deps)
-
 quiet_cmd_link_multi-m = LD [M]  $@
 cmd_link_multi-m = $(cmd_link_multi-link)
 
-$(multi-used-y): FORCE
-	$(call if_changed,link_multi-y)
-$(call multi_depend, $(multi-used-y), .o, -objs -y)
-
 $(multi-used-m): FORCE
 	$(call if_changed,link_multi-m)
 	@{ echo $(@:.o=.ko); echo $(link_multi_deps); \
 	   $(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod)
 $(call multi_depend, $(multi-used-m), .o, -objs -y -m)
 
-targets += $(multi-used-y) $(multi-used-m)
+targets += $(multi-used-m)
 targets := $(filter-out $(PHONY), $(targets))
 
 # Descending
-- 
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