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authorLucas Stach <l.stach@pengutronix.de>2021-07-17 00:04:12 +0200
committerLucas Stach <l.stach@pengutronix.de>2021-10-02 02:48:07 +0200
commitf5a8f41084c3955ba26d89abe0a64fccf901dbbd (patch)
tree0ed1896856d53751b2c356bb7a44a27c6f301157
parent1a9d3ed4f530f95902db1c2c03502e8e0d410330 (diff)
downloadlinux-f5a8f41084c3955ba26d89abe0a64fccf901dbbd.tar.gz
linux-f5a8f41084c3955ba26d89abe0a64fccf901dbbd.tar.xz
arm64: dts: imx8mm: add DISP blk-ctrl
Add the DT node for the DISP blk-ctrl. With this in place the display/mipi power domains are fully functional. Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm.dtsi27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index f4a97bd8b7ad..c2f3f118f82e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1068,6 +1068,33 @@
#size-cells = <1>;
ranges = <0x32c00000 0x32c00000 0x400000>;
+ disp_blk_ctrl: blk-ctrl@32e28000 {
+ compatible = "fsl,imx8mm-disp-blk-ctrl", "syscon";
+ reg = <0x32e28000 0x100>;
+ power-domains = <&pgc_dispmix>, <&pgc_dispmix>,
+ <&pgc_dispmix>, <&pgc_mipi>,
+ <&pgc_mipi>;
+ power-domain-names = "bus", "csi-bridge",
+ "lcdif", "mipi-dsi",
+ "mipi-csi";
+ clocks = <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
+ <&clk IMX8MM_CLK_DISP_APB_ROOT>,
+ <&clk IMX8MM_CLK_CSI1_ROOT>,
+ <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
+ <&clk IMX8MM_CLK_DISP_APB_ROOT>,
+ <&clk IMX8MM_CLK_DISP_ROOT>,
+ <&clk IMX8MM_CLK_DSI_CORE>,
+ <&clk IMX8MM_CLK_DSI_PHY_REF>,
+ <&clk IMX8MM_CLK_CSI1_CORE>,
+ <&clk IMX8MM_CLK_CSI1_PHY_REF>;
+ clock-names = "csi-bridge-axi","csi-bridge-apb",
+ "csi-bridge-core", "lcdif-axi",
+ "lcdif-apb", "lcdif-pix",
+ "dsi-pclk", "dsi-ref",
+ "csi-aclk", "csi-pclk";
+ #power-domain-cells = <1>;
+ };
+
usbotg1: usb@32e40000 {
compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
reg = <0x32e40000 0x200>;