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authorLucas Stach <l.stach@pengutronix.de>2013-09-16 18:55:19 +0200
committerLucas Stach <l.stach@pengutronix.de>2013-09-17 10:51:36 +0200
commita19509d922fed36838c7b26dc58de3a3eb88bef4 (patch)
treefafeeb097dbcc13190a974079764cfc9f6295d6f
parent0cfdf63b987e5a6dc8df7784110312bb99101920 (diff)
downloadlinux-msm-rebase-master.tar.gz
WIP: finally turn all interfaces aroundmsm-rebase-master
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
-rw-r--r--drivers/gpu/drm/msm/adreno/a3xx_gpu.c19
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.c13
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.h15
-rw-r--r--drivers/gpu/drm/msm/msm_drv.c69
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.c64
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.h13
-rw-r--r--include/drm/drm_adreno.h8
7 files changed, 100 insertions, 101 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index c97f8f4..7ac734d 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -365,7 +365,7 @@ static void a3xx_show(struct adreno_gpu *gpu, struct seq_file *m)
}
#endif
-static const struct adreno_gpu_funcs funcs = {
+static struct adreno_gpu_funcs a3xx_gpu_funcs = {
.get_param = adreno_get_param,
.hw_init = a3xx_hw_init,
.pm_suspend = a3xx_gpu_pm_suspend,
@@ -386,11 +386,12 @@ static const char *clk_names[] = {
"src_clk", "core_clk", "iface_clk", "mem_clk", "mem_iface_clk",
};
-struct msm_gpu *a3xx_gpu_init(struct drm_device *dev, struct adreno_gem *gem,
- struct workqueue_struct *wq, int reglog)
+int a3xx_gpu_init(struct drm_device *dev,
+ const struct adreno_gem *gem, struct workqueue_struct *wq,
+ int reglog, struct adreno_gpu **gpu,
+ struct adreno_gpu_funcs **funcs)
{
struct a3xx_gpu *a3xx_gpu = NULL;
- struct msm_gpu *gpu;
struct platform_device *pdev = a3xx_pdev;
struct adreno_platform_config *config;
int i, ret;
@@ -408,8 +409,6 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev, struct adreno_gem *gem,
goto fail;
}
- gpu = &a3xx_gpu->base.base;
-
get_device(&pdev->dev);
a3xx_gpu->base.pdev = pdev;
@@ -450,17 +449,19 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev, struct adreno_gem *gem,
adreno_reglog = reglog;
ret = adreno_gpu_init(dev, pdev, &a3xx_gpu->base,
- &funcs, gem, wq, config->rev);
+ &a3xx_gpu_funcs, gem, wq, config->rev);
if (ret)
goto fail;
- return &a3xx_gpu->base.base;
+ *gpu = &a3xx_gpu->base;
+ *funcs = &a3xx_gpu_funcs;
+ return 0;
fail:
if (a3xx_gpu)
a3xx_destroy(&a3xx_gpu->base);
- return ERR_PTR(ret);
+ return ret;
}
/*
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index f5abcc1..92f25e64 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -349,7 +349,7 @@ static void __iomem *adreno_ioremap(struct platform_device *pdev,
int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
struct adreno_gpu *gpu, const struct adreno_gpu_funcs *funcs,
- struct adreno_gem *gem, struct workqueue_struct *wq,
+ const struct adreno_gem *gem, struct workqueue_struct *wq,
struct adreno_rev rev)
{
int i, ret;
@@ -382,10 +382,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
gpu->shared_wq = wq;
gpu->rev = rev;
- /* XXX: urgh - pointers to self are fun! */
- gpu->gem->priv = &gpu->base;
- gpu->base.gpu = gpu;
-
ret = request_firmware(&gpu->pm4, gpu->info->pm4fw, drm->dev);
if (ret) {
dev_err(drm->dev, "failed to load %s PM4 firmware: %d\n",
@@ -421,12 +417,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
return ret;
}
- ret = msm_gpu_init(drm, pdev, &gpu->base, funcs,
- "kgsl_3d0_reg_memory", "kgsl_3d0_irq",
- RB_SIZE);
- if (ret)
- return ret;
-
gpu->memptrs_bo = gpu->gem->gem_new(gpu->gem->priv,
sizeof(*gpu->memptrs), MSM_BO_UNCACHED);
if (IS_ERR(gpu->memptrs_bo)) {
@@ -491,5 +481,4 @@ void adreno_gpu_cleanup(struct adreno_gpu *gpu)
release_firmware(gpu->pm4);
if (gpu->pfp)
release_firmware(gpu->pfp);
- msm_gpu_cleanup(&gpu->base);
}
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 17c5628..335c6a5 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -19,9 +19,11 @@
#define __ADRENO_GPU_H__
#include <linux/firmware.h>
+#include <linux/regulator/consumer.h>
+#include <linux/clk.h>
#include <drm/drm_adreno.h>
+#include <drm/msm_drm.h>
-#include "msm_gpu.h"
#include "adreno_ringbuffer.h"
#include "adreno_common.xml.h"
@@ -48,14 +50,13 @@ struct adreno_rbmemptrs {
};
struct adreno_gpu {
- struct msm_gpu base;
struct platform_device *pdev;
struct drm_device *drm;
struct adreno_rev rev;
const struct adreno_info *info;
uint32_t revn; /* numeric revision name */
const struct adreno_gpu_funcs *funcs;
- struct adreno_gem *gem;
+ const struct adreno_gem *gem;
struct workqueue_struct *shared_wq;
/* firmware: */
@@ -130,7 +131,7 @@ void adreno_wait_ring(struct adreno_gpu *gpu, uint32_t ndwords);
int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
struct adreno_gpu *gpu, const struct adreno_gpu_funcs *funcs,
- struct adreno_gem *gem, struct workqueue_struct *wq,
+ const struct adreno_gem *gem, struct workqueue_struct *wq,
struct adreno_rev rev);
void adreno_gpu_cleanup(struct adreno_gpu *gpu);
@@ -181,5 +182,11 @@ OUT_PKT3(struct adreno_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
}
+/* for the generated headers: */
+#define INVALID_IDX(idx) ({BUG(); 0;})
+#define fui(x) ({BUG(); 0;})
+#define util_float_to_half(x) ({BUG(); 0;})
+
+#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
#endif /* __ADRENO_GPU_H__ */
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index c224911..8d4d557 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -158,6 +158,7 @@ static int msm_unload(struct drm_device *dev)
mutex_lock(&dev->struct_mutex);
gpu->funcs->pm_suspend(gpu->gpu);
gpu->funcs->destroy(gpu->gpu);
+ msm_gpu_cleanup(gpu);
mutex_unlock(&dev->struct_mutex);
}
@@ -249,74 +250,24 @@ fail:
return ret;
}
-/* Urgh... this should all move a level down - when we got the init seq right */
-static struct drm_gem_object *
-gem_new(void *gem_priv, uint32_t size, uint32_t flags)
-{
- struct msm_gpu *gpu = gem_priv;
- return msm_gem_new(gpu->dev, size, flags);
-}
-
-static int
-gem_get_iova_locked(void *gem_priv, struct drm_gem_object *obj, uint32_t *iova)
-{
- struct msm_gpu *gpu = gem_priv;
- return msm_gem_get_iova_locked(obj, gpu->id, iova);
-}
-
-static int
-gem_get_iova(void *gem_priv, struct drm_gem_object *obj, uint32_t *iova)
-{
- struct msm_gpu *gpu = gem_priv;
- return msm_gem_get_iova(obj, gpu->id, iova);
-}
-
-static void
-gem_put_iova(void *gem_priv, struct drm_gem_object *obj)
-{
- struct msm_gpu *gpu = gem_priv;
- return msm_gem_put_iova(obj, gpu->id);
-}
-
-static void *
-gem_vaddr_locked(void *gem_priv, struct drm_gem_object *obj)
-{
- return msm_gem_vaddr_locked(obj);
-}
-
-static void *
-gem_vaddr(void *gem_priv, struct drm_gem_object *obj)
-{
- return msm_gem_vaddr(obj);
-}
-
-static void
-gem_retire(void *gem_priv)
-{
- struct msm_gpu *gpu = gem_priv;
- return msm_gpu_retire(gpu);
-}
-static struct adreno_gem msm_gem_funcs = {
- .gem_new = gem_new,
- .gem_get_iova = gem_get_iova,
- .gem_get_iova_locked = gem_get_iova_locked,
- .gem_put_iova = gem_put_iova,
- .gem_vaddr = gem_vaddr,
- .gem_vaddr_locked = gem_vaddr_locked,
- .gem_retire = gem_retire
-};
-
static void load_gpu(struct drm_device *dev)
{
struct msm_drm_private *priv = dev->dev_private;
struct msm_gpu *gpu;
+ int ret;
if (priv->gpu)
return;
mutex_lock(&dev->struct_mutex);
- gpu = a3xx_gpu_init(dev, &msm_gem_funcs, priv->wq, reglog);
- if (IS_ERR(gpu)) {
+
+ ret = msm_gpu_init(dev, &gpu);
+ if (ret < 0)
+ return; /* FIXME: better error reporting? */
+
+ ret = a3xx_gpu_init(dev, &gpu->gem, priv->wq, reglog, &gpu->gpu,
+ &gpu->funcs);
+ if (ret < 0) {
dev_warn(dev->dev, "failed to load a3xx gpu\n");
gpu = NULL;
/* not fatal */
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index 4b93c81..673bf1d 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -17,7 +17,6 @@
#include "msm_gpu.h"
#include "msm_gem.h"
-#include "adreno/adreno_gpu.h"
/*
* Cmdstream submission/retirement:
@@ -53,8 +52,9 @@ static void retire_worker(struct work_struct *work)
}
/* call from irq handler to schedule work to retire bo's */
-void msm_gpu_retire(struct msm_gpu *gpu)
+static void msm_gpu_retire(void *gem_priv)
{
+ struct msm_gpu *gpu = gem_priv;
struct msm_drm_private *priv = gpu->dev->dev_private;
queue_work(priv->wq, &gpu->retire_work);
}
@@ -98,6 +98,46 @@ int msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
return ret;
}
+static struct drm_gem_object *
+gem_new(void *gem_priv, uint32_t size, uint32_t flags)
+{
+ struct msm_gpu *gpu = gem_priv;
+ return msm_gem_new(gpu->dev, size, flags);
+}
+
+static int
+gem_get_iova_locked(void *gem_priv, struct drm_gem_object *obj, uint32_t *iova)
+{
+ struct msm_gpu *gpu = gem_priv;
+ return msm_gem_get_iova_locked(obj, gpu->id, iova);
+}
+
+static int
+gem_get_iova(void *gem_priv, struct drm_gem_object *obj, uint32_t *iova)
+{
+ struct msm_gpu *gpu = gem_priv;
+ return msm_gem_get_iova(obj, gpu->id, iova);
+}
+
+static void
+gem_put_iova(void *gem_priv, struct drm_gem_object *obj)
+{
+ struct msm_gpu *gpu = gem_priv;
+ return msm_gem_put_iova(obj, gpu->id);
+}
+
+static void *
+gem_vaddr_locked(void *gem_priv, struct drm_gem_object *obj)
+{
+ return msm_gem_vaddr_locked(obj);
+}
+
+static void *
+gem_vaddr(void *gem_priv, struct drm_gem_object *obj)
+{
+ return msm_gem_vaddr(obj);
+}
+
/*
* Init/Cleanup:
*/
@@ -107,18 +147,30 @@ static const char *iommu_ports[] = {
"gfx3d1_user", "gfx3d1_priv",
};
-int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
- struct msm_gpu *gpu, const struct adreno_gpu_funcs *funcs,
- const char *ioname, const char *irqname, int ringsz)
+int msm_gpu_init(struct drm_device *drm, struct msm_gpu **pgpu)
{
+ struct msm_gpu *gpu = *pgpu;
int ret;
+ gpu = kzalloc(sizeof(*gpu), GFP_KERNEL);
+ if (!gpu)
+ return -ENOMEM;
+
gpu->dev = drm;
- gpu->funcs = funcs;
INIT_LIST_HEAD(&gpu->active_list);
INIT_WORK(&gpu->retire_work, retire_worker);
+ /* init GEM funcs for this device */
+ gpu->gem.priv = gpu;
+ gpu->gem.gem_new = gem_new;
+ gpu->gem.gem_get_iova = gem_get_iova;
+ gpu->gem.gem_get_iova_locked = gem_get_iova_locked;
+ gpu->gem.gem_put_iova = gem_put_iova;
+ gpu->gem.gem_vaddr = gem_vaddr;
+ gpu->gem.gem_vaddr_locked = gem_vaddr_locked;
+ gpu->gem.gem_retire = msm_gpu_retire;
+
/* Setup IOMMU.. eventually we will (I think) do this once per context
* and have separate page tables per context. For now, to keep things
* simple and to get something working, just use a single address space:
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index 4487e18..b2a2d4c 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -19,7 +19,6 @@
#define __MSM_GPU_H__
#include <linux/clk.h>
-#include <linux/regulator/consumer.h>
#include "msm_drv.h"
@@ -41,6 +40,7 @@
struct msm_gpu {
struct drm_device *dev;
struct adreno_gpu *gpu;
+ struct adreno_gem gem;
const struct adreno_gpu_funcs *funcs;
/* list of GEM active objects: */
@@ -53,20 +53,11 @@ struct msm_gpu {
int id;
};
-void msm_gpu_retire(struct msm_gpu *gpu);
struct msm_gem_submit;
int msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
struct msm_file_private *ctx);
-int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
- struct msm_gpu *gpu, const struct adreno_gpu_funcs *funcs,
- const char *ioname, const char *irqname, int ringsz);
+int msm_gpu_init(struct drm_device *drm, struct msm_gpu **gpu);
void msm_gpu_cleanup(struct msm_gpu *gpu);
-struct msm_gpu *a3xx_gpu_init(struct drm_device *dev,
- struct adreno_gem *gem, struct workqueue_struct *wq,
- int reglog);
-void __init a3xx_register(void);
-void __exit a3xx_unregister(void);
-
#endif /* __MSM_GPU_H__ */
diff --git a/include/drm/drm_adreno.h b/include/drm/drm_adreno.h
index cae710c..7d60dfd 100644
--- a/include/drm/drm_adreno.h
+++ b/include/drm/drm_adreno.h
@@ -73,4 +73,12 @@ struct adreno_gem {
const char *adreno_get_name(struct adreno_gpu *gpu);
+/* Adreno 3xx module functions */
+int a3xx_gpu_init(struct drm_device *dev,
+ const struct adreno_gem *gem, struct workqueue_struct *wq,
+ int reglog, struct adreno_gpu **gpu,
+ struct adreno_gpu_funcs **funcs);
+void __init a3xx_register(void);
+void __exit a3xx_unregister(void);
+
#endif /* __DRM_ADRENO_H__ */