WIP: move ringbuffer into adreno subdir

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

8 files changed, 64 insertions, 60 deletions

diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index e17914889e54..e24eb5ed1952 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -5,6 +5,7 @@ endif
 
 msm-y := \
 	adreno/adreno_gpu.o \
+	adreno/adreno_ringbuffer.o \
 	adreno/a3xx_gpu.o \
 	hdmi/hdmi.o \
 	hdmi/hdmi_bridge.o \
@@ -22,8 +23,7 @@ msm-y := \
 	msm_fb.o \
 	msm_gem.o \
 	msm_gem_submit.o \
-	msm_gpu.o \
-	msm_ringbuffer.o
+	msm_gpu.o
 
 msm-$(CONFIG_DRM_MSM_FBDEV) += msm_fbdev.o
 
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index 035bd13dc8bd..dc30cbed0e01 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -35,7 +35,8 @@ static struct platform_device *a3xx_pdev;
 
 static void a3xx_me_init(struct msm_gpu *gpu)
 {
-	struct msm_ringbuffer *ring = gpu->rb;
+	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
+	struct adreno_ringbuffer *ring = adreno_gpu->rb;
 
 	OUT_PKT3(ring, CP_ME_INIT, 17);
 	OUT_RING(ring, 0x000003f7);
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index a60584763b61..91416963d120 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -85,11 +85,11 @@ int adreno_hw_init(struct msm_gpu *gpu)
 	/* Setup REG_CP_RB_CNTL: */
 	gpu_write(gpu, REG_AXXX_CP_RB_CNTL,
 			/* size is log2(quad-words): */
-			AXXX_CP_RB_CNTL_BUFSZ(ilog2(gpu->rb->size / 8)) |
+			AXXX_CP_RB_CNTL_BUFSZ(ilog2(adreno_gpu->rb->size / 8)) |
 			AXXX_CP_RB_CNTL_BLKSZ(RB_BLKSIZE));
 
 	/* Setup ringbuffer address: */
-	gpu_write(gpu, REG_AXXX_CP_RB_BASE, gpu->rb_iova);
+	gpu_write(gpu, REG_AXXX_CP_RB_BASE, adreno_gpu->rb_iova);
 	gpu_write(gpu, REG_AXXX_CP_RB_RPTR_ADDR, rbmemptr(adreno_gpu, rptr));
 
 	/* Setup scratch/timestamp: */
@@ -100,7 +100,7 @@ int adreno_hw_init(struct msm_gpu *gpu)
 	return 0;
 }
 
-static uint32_t get_wptr(struct msm_ringbuffer *ring)
+static uint32_t get_wptr(struct adreno_ringbuffer *ring)
 {
 	return ring->cur - ring->start;
 }
@@ -120,7 +120,7 @@ void adreno_recover(struct msm_gpu *gpu)
 	gpu->funcs->pm_suspend(gpu);
 
 	/* reset ringbuffer: */
-	gpu->rb->cur = gpu->rb->start;
+	adreno_gpu->rb->cur = adreno_gpu->rb->start;
 
 	/* reset completed fence seqno, just discard anything pending: */
 	adreno_gpu->memptrs->fence = gpu->submitted_fence;
@@ -138,7 +138,7 @@ int adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
 {
 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
 	struct msm_drm_private *priv = gpu->dev->dev_private;
-	struct msm_ringbuffer *ring = gpu->rb;
+	struct adreno_ringbuffer *ring = adreno_gpu->rb;
 	unsigned i, ibs = 0;
 
 	for (i = 0; i < submit->nr_cmds; i++) {
@@ -206,7 +206,8 @@ int adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
 
 void adreno_flush(struct msm_gpu *gpu)
 {
-	uint32_t wptr = get_wptr(gpu->rb);
+	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
+	uint32_t wptr = get_wptr(adreno_gpu->rb);
 
 	/* ensure writes to ringbuffer have hit system memory: */
 	mb();
@@ -217,7 +218,7 @@ void adreno_flush(struct msm_gpu *gpu)
 void adreno_idle(struct msm_gpu *gpu)
 {
 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
-	uint32_t rptr, wptr = get_wptr(gpu->rb);
+	uint32_t rptr, wptr = get_wptr(adreno_gpu->rb);
 	unsigned long t;
 
 	t = jiffies + ADRENO_IDLE_TIMEOUT;
@@ -248,18 +249,17 @@ void adreno_show(struct msm_gpu *gpu, struct seq_file *m)
 			gpu->submitted_fence);
 	seq_printf(m, "rptr:     %d\n", adreno_gpu->memptrs->rptr);
 	seq_printf(m, "wptr:     %d\n", adreno_gpu->memptrs->wptr);
-	seq_printf(m, "rb wptr:  %d\n", get_wptr(gpu->rb));
+	seq_printf(m, "rb wptr:  %d\n", get_wptr(adreno_gpu->rb));
 }
 #endif
 
-void adreno_wait_ring(struct msm_gpu *gpu, uint32_t ndwords)
+void adreno_wait_ring(struct adreno_gpu *gpu, uint32_t ndwords)
 {
-	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
 	uint32_t freedwords;
 	do {
 		uint32_t size = gpu->rb->size / 4;
 		uint32_t wptr = get_wptr(gpu->rb);
-		uint32_t rptr = adreno_gpu->memptrs->rptr;
+		uint32_t rptr = gpu->memptrs->rptr;
 		freedwords = (rptr + (size - 1) - wptr) % size;
 	} while(freedwords < ndwords);
 }
@@ -352,6 +352,22 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
 		return ret;
 	}
 
+	/* Create ringbuffer: */
+	gpu->rb = adreno_ringbuffer_new(gpu, RB_SIZE);
+	if (IS_ERR(gpu->rb)) {
+		ret = PTR_ERR(gpu->rb);
+		gpu->rb = NULL;
+		dev_err(drm->dev, "could not create ringbuffer: %d\n", ret);
+		return ret;
+	}
+
+	ret = msm_gem_get_iova_locked(gpu->rb->bo, gpu->base.id, &gpu->rb_iova);
+	if (ret) {
+		gpu->rb_iova = 0;
+		dev_err(drm->dev, "could not map ringbuffer: %d\n", ret);
+		return ret;
+	}
+
 	return 0;
 }
 
@@ -362,6 +378,12 @@ void adreno_gpu_cleanup(struct adreno_gpu *gpu)
 			msm_gem_put_iova(gpu->memptrs_bo, gpu->base.id);
 		drm_gem_object_unreference(gpu->memptrs_bo);
 	}
+	if (gpu->rb) {
+		if (gpu->rb_iova)
+			msm_gem_put_iova(gpu->rb->bo, gpu->base.id);
+		adreno_ringbuffer_destroy(gpu->rb);
+	}
+
 	if (gpu->pm4)
 		release_firmware(gpu->pm4);
 	if (gpu->pfp)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index f73abfba7c22..eba015a36631 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -21,6 +21,7 @@
 #include <linux/firmware.h>
 
 #include "msm_gpu.h"
+#include "adreno_ringbuffer.h"
 
 #include "adreno_common.xml.h"
 #include "adreno_pm4.xml.h"
@@ -58,11 +59,14 @@ struct adreno_gpu {
 	const struct firmware *pm4, *pfp;
 
 	/* ringbuffer rptr/wptr: */
-	// TODO should this be in msm_ringbuffer?  I think it would be
+	// TODO should this be in adreno_ringbuffer?  I think it would be
 	// different for z180..
 	struct adreno_rbmemptrs *memptrs;
 	struct drm_gem_object *memptrs_bo;
 	uint32_t memptrs_iova;
+
+	struct adreno_ringbuffer *rb;
+	uint32_t rb_iova;
 };
 #define to_adreno_gpu(x) container_of(x, struct adreno_gpu, base)
 
@@ -105,7 +109,7 @@ void adreno_idle(struct msm_gpu *gpu);
 #ifdef CONFIG_DEBUG_FS
 void adreno_show(struct msm_gpu *gpu, struct seq_file *m);
 #endif
-void adreno_wait_ring(struct msm_gpu *gpu, uint32_t ndwords);
+void adreno_wait_ring(struct adreno_gpu *gpu, uint32_t ndwords);
 
 int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
 		struct adreno_gpu *gpu, const struct adreno_gpu_funcs *funcs,
@@ -116,7 +120,7 @@ void adreno_gpu_cleanup(struct adreno_gpu *gpu);
 /* ringbuffer helpers (the parts that are adreno specific) */
 
 static inline void
-OUT_PKT0(struct msm_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
+OUT_PKT0(struct adreno_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
 {
 	adreno_wait_ring(ring->gpu, cnt+1);
 	OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
@@ -124,14 +128,14 @@ OUT_PKT0(struct msm_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
 
 /* no-op packet: */
 static inline void
-OUT_PKT2(struct msm_ringbuffer *ring)
+OUT_PKT2(struct adreno_ringbuffer *ring)
 {
 	adreno_wait_ring(ring->gpu, 1);
 	OUT_RING(ring, CP_TYPE2_PKT);
 }
 
 static inline void
-OUT_PKT3(struct msm_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
+OUT_PKT3(struct adreno_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
 {
 	adreno_wait_ring(ring->gpu, cnt+1);
 	OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.c b/drivers/gpu/drm/msm/adreno/adreno_ringbuffer.c
index 8171537dd7d1..331822ad406b 100644
--- a/drivers/gpu/drm/msm/msm_ringbuffer.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_ringbuffer.c
@@ -15,12 +15,12 @@
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include "msm_ringbuffer.h"
+#include "adreno/adreno_gpu.h"
 #include "msm_gpu.h"
 
-struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int size)
+struct adreno_ringbuffer *adreno_ringbuffer_new(struct adreno_gpu *gpu, int size)
 {
-	struct msm_ringbuffer *ring;
+	struct adreno_ringbuffer *ring;
 	int ret;
 
 	size = ALIGN(size, 4);   /* size should be dword aligned */
@@ -32,7 +32,7 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int size)
 	}
 
 	ring->gpu = gpu;
-	ring->bo = msm_gem_new(gpu->dev, size, MSM_BO_WC);
+	ring->bo = msm_gem_new(gpu->base.dev, size, MSM_BO_WC);
 	if (IS_ERR(ring->bo)) {
 		ret = PTR_ERR(ring->bo);
 		ring->bo = NULL;
@@ -49,11 +49,11 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int size)
 
 fail:
 	if (ring)
-		msm_ringbuffer_destroy(ring);
+		adreno_ringbuffer_destroy(ring);
 	return ERR_PTR(ret);
 }
 
-void msm_ringbuffer_destroy(struct msm_ringbuffer *ring)
+void adreno_ringbuffer_destroy(struct adreno_ringbuffer *ring)
 {
 	if (ring->bo)
 		drm_gem_object_unreference(ring->bo);
diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.h b/drivers/gpu/drm/msm/adreno/adreno_ringbuffer.h
index 6e0e1049fa4f..9112fe753fb4 100644
--- a/drivers/gpu/drm/msm/msm_ringbuffer.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_ringbuffer.h
@@ -15,29 +15,32 @@
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef __MSM_RINGBUFFER_H__
-#define __MSM_RINGBUFFER_H__
+#ifndef __ADRENO_RINGBUFFER_H__
+#define __ADRENO_RINGBUFFER_H__
 
-#include "msm_drv.h"
+#include <linux/types.h>
 
-struct msm_ringbuffer {
-	struct msm_gpu *gpu;
+struct adreno_gpu;
+
+struct adreno_ringbuffer {
+	struct adreno_gpu *gpu;
 	int size;
 	struct drm_gem_object *bo;
 	uint32_t *start, *end, *cur;
 };
 
-struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int size);
-void msm_ringbuffer_destroy(struct msm_ringbuffer *ring);
+struct adreno_ringbuffer *adreno_ringbuffer_new(struct adreno_gpu *gpu,
+						int size);
+void adreno_ringbuffer_destroy(struct adreno_ringbuffer *ring);
 
 /* ringbuffer helpers (the parts that are same for a3xx/a2xx/z180..) */
 
 static inline void
-OUT_RING(struct msm_ringbuffer *ring, uint32_t data)
+OUT_RING(struct adreno_ringbuffer *ring, uint32_t data)
 {
 	if (ring->cur == ring->end)
 		ring->cur = ring->start;
 	*(ring->cur++) = data;
 }
 
-#endif /* __MSM_RINGBUFFER_H__ */
+#endif /* __ADRENO_RINGBUFFER_H__ */
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index e1e1ec9321ff..0b4747f88cdd 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -420,22 +420,6 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
 	}
 	gpu->id = msm_register_iommu(drm, gpu->iommu);
 
-	/* Create ringbuffer: */
-	gpu->rb = msm_ringbuffer_new(gpu, ringsz);
-	if (IS_ERR(gpu->rb)) {
-		ret = PTR_ERR(gpu->rb);
-		gpu->rb = NULL;
-		dev_err(drm->dev, "could not create ringbuffer: %d\n", ret);
-		goto fail;
-	}
-
-	ret = msm_gem_get_iova_locked(gpu->rb->bo, gpu->id, &gpu->rb_iova);
-	if (ret) {
-		gpu->rb_iova = 0;
-		dev_err(drm->dev, "could not map ringbuffer: %d\n", ret);
-		goto fail;
-	}
-
 	bs_init(gpu, pdev);
 
 	return 0;
@@ -452,12 +436,6 @@ void msm_gpu_cleanup(struct msm_gpu *gpu)
 
 	bs_fini(gpu);
 
-	if (gpu->rb) {
-		if (gpu->rb_iova)
-			msm_gem_put_iova(gpu->rb->bo, gpu->id);
-		msm_ringbuffer_destroy(gpu->rb);
-	}
-
 	if (gpu->iommu)
 		iommu_domain_free(gpu->iommu);
 }
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index 8cd829e520bb..9aa7748b2db9 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -22,7 +22,6 @@
 #include <linux/regulator/consumer.h>
 
 #include "msm_drv.h"
-#include "msm_ringbuffer.h"
 
 struct msm_gem_submit;
 
@@ -64,9 +63,6 @@ struct msm_gpu {
 	struct drm_device *dev;
 	const struct msm_gpu_funcs *funcs;
 
-	struct msm_ringbuffer *rb;
-	uint32_t rb_iova;
-
 	/* list of GEM active objects: */
 	struct list_head active_list;