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authorLucas Stach <l.stach@pengutronix.de>2013-09-16 18:53:44 +0200
committerLucas Stach <l.stach@pengutronix.de>2013-09-17 08:45:22 +0200
commit3d5da20a404c5b45e5eca435b028165e70e01105 (patch)
tree1003e2e93700fb303ea5539dee2486f7169277ae
parent67cc74905799e26d884894d1d29807cdb7a49166 (diff)
downloadlinux-3d5da20a404c5b45e5eca435b028165e70e01105.tar.gz
WIP: decouple adreno gpu accessors from msm code
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
-rw-r--r--drivers/gpu/drm/msm/adreno/a3xx_gpu.c3
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.h19
-rw-r--r--drivers/gpu/drm/msm/msm_drv.c2
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.h3
4 files changed, 22 insertions, 5 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index 386993ae..a31360a 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -380,7 +380,7 @@ static const struct adreno_gpu_funcs funcs = {
};
struct msm_gpu *a3xx_gpu_init(struct drm_device *dev, struct adreno_gem *gem,
- struct workqueue_struct *wq)
+ struct workqueue_struct *wq, int reglog)
{
struct adreno_gpu *adreno_gpu = NULL;
struct msm_gpu *gpu;
@@ -413,6 +413,7 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev, struct adreno_gem *gem,
DBG("fast_rate=%u, slow_rate=%u, bus_freq=%u",
gpu->fast_rate, gpu->slow_rate, gpu->bus_freq);
+ adreno_reglog = reglog;
ret = adreno_gpu_init(dev, pdev, adreno_gpu,
&funcs, gem, wq, config->rev);
if (ret)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index a7fe0e5..dc0e4ad 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -27,6 +27,8 @@
#include "adreno_common.xml.h"
#include "adreno_pm4.xml.h"
+static int adreno_reglog;
+
struct adreno_rev {
uint8_t core;
uint8_t major;
@@ -131,12 +133,25 @@ void adreno_gpu_cleanup(struct adreno_gpu *gpu);
static inline void gpu_write(struct adreno_gpu *gpu, u32 reg, u32 data)
{
- msm_writel(data, gpu->base.mmio + (reg << 2));
+ void __iomem *addr = gpu->base.mmio + (reg << 2);
+
+ if (IS_ENABLED(CONFIG_DRM_MSM_REGISTER_LOGGING) &&
+ unlikely(adreno_reglog))
+ printk(KERN_DEBUG "IO:W %08x %08x\n", (u32)addr, data);
+
+ writel(data, addr);
}
static inline u32 gpu_read(struct adreno_gpu *gpu, u32 reg)
{
- return msm_readl(gpu->base.mmio + (reg << 2));
+ void __iomem *addr = gpu->base.mmio + (reg << 2);
+ u32 val = readl(addr);
+
+ if (IS_ENABLED(CONFIG_DRM_MSM_REGISTER_LOGGING) &&
+ unlikely(adreno_reglog))
+ printk(KERN_ERR "IO:R %08x %08x\n", (u32)addr, val);
+
+ return val;
}
/* ringbuffer helpers (the parts that are adreno specific) */
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index a4db194..c224911 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -315,7 +315,7 @@ static void load_gpu(struct drm_device *dev)
return;
mutex_lock(&dev->struct_mutex);
- gpu = a3xx_gpu_init(dev, &msm_gem_funcs, priv->wq);
+ gpu = a3xx_gpu_init(dev, &msm_gem_funcs, priv->wq, reglog);
if (IS_ERR(gpu)) {
dev_warn(dev->dev, "failed to load a3xx gpu\n");
gpu = NULL;
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index 35e45b8..124b38d 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -76,7 +76,8 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
void msm_gpu_cleanup(struct msm_gpu *gpu);
struct msm_gpu *a3xx_gpu_init(struct drm_device *dev,
- struct adreno_gem *gem, struct workqueue_struct *wq);
+ struct adreno_gem *gem, struct workqueue_struct *wq,
+ int reglog);
void __init a3xx_register(void);
void __exit a3xx_unregister(void);