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| author | Lucas Stach <dev@lynxeye.de> | 2015-01-04 21:16:52 +0100 |
|---|---|---|
| committer | Lucas Stach <dev@lynxeye.de> | 2015-03-02 20:39:20 +0100 |
| commit | 354e6bba01007a236eed386f17e63d3af4b28c43 (patch) | |
| tree | fce387ed7d1f6aa3aa84f67a2e056a2fb9c998b6 | |
| parent | 17ce33f9aee6c32aac689f35b3c781c733098e0d (diff) | |
| download | linux-354e6bba01007a236eed386f17e63d3af4b28c43.tar.gz linux-354e6bba01007a236eed386f17e63d3af4b28c43.tar.xz | |
ARM: tegra: add Tegra20 NAND flash controller node
Add basic controller description to be extended
by individual boards.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
| -rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index e5527f742696..d3c9a3814598 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -360,6 +360,19 @@ status = "disabled"; }; + nand: nand@70008000 { + compatible = "nvidia,tegra20-nand"; + reg = <0x70008000 0x100>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA20_CLK_NDFLASH>; + clock-names = "nand"; + resets = <&tegra_car 13>; + reset-names = "nand"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + }; + pwm: pwm@7000a000 { compatible = "nvidia,tegra20-pwm"; reg = <0x7000a000 0x100>; |