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| author | Krzysztof Kozlowski <krzk@kernel.org> | 2021-03-08 18:09:43 +0100 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2021-03-30 05:51:30 -0500 |
| commit | ae68efe92dd50e5f2885a6ba41ce09e0281c601f (patch) | |
| tree | 444c5f6571a571ea7b21c6ca29be9fce75837436 /arch/arm64/boot/dts/intel | |
| parent | f10ffbf5f6bd15d29b5b16464c8f12b4edde8339 (diff) | |
| download | linux-ae68efe92dd50e5f2885a6ba41ce09e0281c601f.tar.gz linux-ae68efe92dd50e5f2885a6ba41ce09e0281c601f.tar.xz | |
arm64: dts: intel: socfpga_agilex: align node names with dtschema
Align the NAND, GIC and UART node names with dtschema to silence
dtbs_check warnings like:
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
intc@fffc1000: $nodename:0: 'intc@fffc1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
serial0@ffc02000: $nodename:0: 'serial0@ffc02000' does not match '^serial(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/intel')
| -rw-r--r-- | arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index 3cba4c03d560..163f33b46e4f 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -78,7 +78,7 @@ method = "smc"; }; - intc: intc@fffc1000 { + intc: interrupt-controller@fffc1000 { compatible = "arm,gic-400", "arm,cortex-a15-gic"; #interrupt-cells = <3>; interrupt-controller; @@ -316,7 +316,7 @@ status = "disabled"; }; - nand: nand@ffb90000 { + nand: nand-controller@ffb90000 { #address-cells = <1>; #size-cells = <0>; compatible = "altr,socfpga-denali-nand"; @@ -479,7 +479,7 @@ clock-names = "timer"; }; - uart0: serial0@ffc02000 { + uart0: serial@ffc02000 { compatible = "snps,dw-apb-uart"; reg = <0xffc02000 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; @@ -490,7 +490,7 @@ clocks = <&clkmgr AGILEX_L4_SP_CLK>; }; - uart1: serial1@ffc02100 { + uart1: serial@ffc02100 { compatible = "snps,dw-apb-uart"; reg = <0xffc02100 0x100>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; |