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| author | Maarten ter Huurne <maarten@treewalker.org> | 2013-05-30 18:25:01 +0200 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2013-07-05 11:40:49 +0530 |
| commit | c8c81f32eef1d77134c81810b17f282bd619fb0b (patch) | |
| tree | 30d1c22a1872b583b0185d8b87bb98d3dae0b1b4 /arch | |
| parent | 8e3c518fba4f2ddd192171cbd7b23ec26900bf6b (diff) | |
| download | linux-c8c81f32eef1d77134c81810b17f282bd619fb0b.tar.gz linux-c8c81f32eef1d77134c81810b17f282bd619fb0b.tar.xz | |
MIPS: jz4740: Acquire and enable DMA controller clock
Previously, it was assumed that the DMA controller clock is not gated
when the kernel starts running. While that is the power-on state, it is
safer to not rely on that.
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/jz4740/dma.c | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/arch/mips/jz4740/dma.c b/arch/mips/jz4740/dma.c index 317ec6fffb12..0e34b97efa8c 100644 --- a/arch/mips/jz4740/dma.c +++ b/arch/mips/jz4740/dma.c @@ -16,6 +16,7 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/spinlock.h> +#include <linux/clk.h> #include <linux/interrupt.h> #include <linux/dma-mapping.h> @@ -268,6 +269,7 @@ static irqreturn_t jz4740_dma_irq(int irq, void *dev_id) static int jz4740_dma_init(void) { + struct clk *clk; unsigned int ret; jz4740_dma_base = ioremap(JZ4740_DMAC_BASE_ADDR, 0x400); @@ -277,11 +279,29 @@ static int jz4740_dma_init(void) spin_lock_init(&jz4740_dma_lock); - ret = request_irq(JZ4740_IRQ_DMAC, jz4740_dma_irq, 0, "DMA", NULL); + clk = clk_get(NULL, "dma"); + if (IS_ERR(clk)) { + ret = PTR_ERR(clk); + printk(KERN_ERR "JZ4740 DMA: Failed to request clock: %d\n", + ret); + goto err_iounmap; + } - if (ret) + ret = request_irq(JZ4740_IRQ_DMAC, jz4740_dma_irq, 0, "DMA", NULL); + if (ret) { printk(KERN_ERR "JZ4740 DMA: Failed to request irq: %d\n", ret); + goto err_clkput; + } + + clk_prepare_enable(clk); + + return 0; + +err_clkput: + clk_put(clk); +err_iounmap: + iounmap(jz4740_dma_base); return ret; } arch_initcall(jz4740_dma_init); |