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authorMichael Tretter <m.tretter@pengutronix.de>2020-09-11 15:54:12 +0200
committerLucas Stach <l.stach@pengutronix.de>2021-07-21 22:27:09 +0200
commit5217c0580e7e9e22575cecbd0f54607283ca3c63 (patch)
tree17cb4c5627ea5ceffcbfee5b3ae6b36b4cb2bc86 /drivers/gpu/drm/exynos/exynos_drm_dsi.h
parentda3b3f107564030807f52311416ee6826e05fa93 (diff)
downloadlinux-5217c0580e7e9e22575cecbd0f54607283ca3c63.tar.gz
linux-5217c0580e7e9e22575cecbd0f54607283ca3c63.tar.xz
drm/exynos: split out platform specific code
Split the driver into the drm bridge driver and the exynos platform specific driver. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_drm_dsi.h')
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_dsi.h64
1 files changed, 64 insertions, 0 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.h b/drivers/gpu/drm/exynos/exynos_drm_dsi.h
new file mode 100644
index 000000000000..8fa3276889de
--- /dev/null
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#ifndef __EXYNOS_DRM_DSI__
+#define __EXYNOS_DRM_DSI__
+
+struct drm_encoder;
+struct exynos_dsi;
+struct platform_device;
+struct mipi_dsi_device;
+
+enum exynos_reg_offset {
+ EXYNOS_REG_OFS,
+ EXYNOS5433_REG_OFS
+};
+
+struct exynos_dsi *exynos_dsi_probe(struct platform_device *pdev);
+void exynos_dsi_remove(struct exynos_dsi *dsi);
+int exynos_dsi_bind(struct exynos_dsi *dsi, struct drm_encoder *encoder);
+void exynos_dsi_unbind(struct exynos_dsi *dsi);
+
+int exynos_dsi_suspend(struct exynos_dsi *dsi);
+int exynos_dsi_resume(struct exynos_dsi *dsi);
+
+enum reg_value_idx {
+ RESET_TYPE,
+ PLL_TIMER,
+ STOP_STATE_CNT,
+ PHYCTRL_ULPS_EXIT,
+ PHYCTRL_VREG_LP,
+ PHYCTRL_SLEW_UP,
+ PHYTIMING_LPX,
+ PHYTIMING_HS_EXIT,
+ PHYTIMING_CLK_PREPARE,
+ PHYTIMING_CLK_ZERO,
+ PHYTIMING_CLK_POST,
+ PHYTIMING_CLK_TRAIL,
+ PHYTIMING_HS_PREPARE,
+ PHYTIMING_HS_ZERO,
+ PHYTIMING_HS_TRAIL
+};
+
+/* DSIM_SWRST */
+#define DSIM_FUNCRST (1 << 16)
+#define DSIM_SWRST (1 << 0)
+
+struct exynos_dsi_host_ops {
+ int (*attach)(struct device *dev, struct mipi_dsi_device *device);
+ int (*detach)(struct device *dev, struct mipi_dsi_device *device);
+ void (*te_handler)(struct device *dev);
+};
+
+struct exynos_dsi_driver_data {
+ enum exynos_reg_offset reg_ofs;
+ unsigned int plltmr_reg;
+ unsigned int has_freqband:1;
+ unsigned int has_clklane_stop:1;
+ unsigned int num_clks;
+ unsigned int max_freq;
+ unsigned int wait_for_reset;
+ unsigned int num_bits_resol;
+ const unsigned int *reg_values;
+ const struct exynos_dsi_host_ops *host_ops;
+};
+
+#endif /* __EXYNOS_DRM_DSI__ */