diff options
author | Alex Elder <elder@linaro.org> | 2022-09-26 17:09:27 -0500 |
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committer | Jakub Kicinski <kuba@kernel.org> | 2022-09-27 18:42:51 -0700 |
commit | 9265a4f0f0b4bdcebeb3ca4688e8213bdadaa759 (patch) | |
tree | c59323418de684a4ba5109d359863d556f471cb6 /drivers/net/ipa/ipa_reg.h | |
parent | b5c35fa470ecbfeeb7a8caf1ff4d739a6bafcd4a (diff) | |
download | linux-9265a4f0f0b4bdcebeb3ca4688e8213bdadaa759.tar.gz linux-9265a4f0f0b4bdcebeb3ca4688e8213bdadaa759.tar.xz |
net: ipa: define even more IPA register fields
Define the fields for the FLAVOR_0, IDLE_INDICATION_CFG,
QTIME_TIMESTAMP_CFG, TIMERS_XO_CLK_DIV_CFG and TIMERS_PULSE_GRAN_CFG
IPA registers for all supported IPA versions.
Create enumerated types to identify fields for these IPA registers.
Use IPA_REG_FIELDS() to specify the field mask values defined for
these registers, for each supported version of IPA.
Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be
written to these registers. Use ipa_reg_decode() to extract field
values from the FLAVOR_0 register.
Remove the definition of the no-longer-used *_FMASK symbols.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/ipa/ipa_reg.h')
-rw-r--r-- | drivers/net/ipa/ipa_reg.h | 43 |
1 files changed, 27 insertions, 16 deletions
diff --git a/drivers/net/ipa/ipa_reg.h b/drivers/net/ipa/ipa_reg.h index 841a693a2c38..bdd085a1f31c 100644 --- a/drivers/net/ipa/ipa_reg.h +++ b/drivers/net/ipa/ipa_reg.h @@ -316,30 +316,41 @@ enum ipa_reg_ipa_tx_cfg_field_id { }; /* FLAVOR_0 register */ -#define IPA_MAX_PIPES_FMASK GENMASK(3, 0) -#define IPA_MAX_CONS_PIPES_FMASK GENMASK(12, 8) -#define IPA_MAX_PROD_PIPES_FMASK GENMASK(20, 16) -#define IPA_PROD_LOWEST_FMASK GENMASK(27, 24) +enum ipa_reg_flavor_0_field_id { + MAX_PIPES, + MAX_CONS_PIPES, + MAX_PROD_PIPES, + PROD_LOWEST, +}; /* IDLE_INDICATION_CFG register */ -#define ENTER_IDLE_DEBOUNCE_THRESH_FMASK GENMASK(15, 0) -#define CONST_NON_IDLE_ENABLE_FMASK GENMASK(16, 16) +enum ipa_reg_idle_indication_cfg_field_id { + ENTER_IDLE_DEBOUNCE_THRESH, + CONST_NON_IDLE_ENABLE, +}; /* QTIME_TIMESTAMP_CFG register */ -#define DPL_TIMESTAMP_LSB_FMASK GENMASK(4, 0) -#define DPL_TIMESTAMP_SEL_FMASK GENMASK(7, 7) -#define TAG_TIMESTAMP_LSB_FMASK GENMASK(12, 8) -#define NAT_TIMESTAMP_LSB_FMASK GENMASK(20, 16) +enum ipa_reg_qtime_timestamp_cfg_field_id { + DPL_TIMESTAMP_LSB, + DPL_TIMESTAMP_SEL, + TAG_TIMESTAMP_LSB, + NAT_TIMESTAMP_LSB, +}; /* TIMERS_XO_CLK_DIV_CFG register */ -#define DIV_VALUE_FMASK GENMASK(8, 0) -#define DIV_ENABLE_FMASK GENMASK(31, 31) +enum ipa_reg_timers_xo_clk_div_cfg_field_id { + DIV_VALUE, + DIV_ENABLE, +}; /* TIMERS_PULSE_GRAN_CFG register */ -#define GRAN_0_FMASK GENMASK(2, 0) -#define GRAN_1_FMASK GENMASK(5, 3) -#define GRAN_2_FMASK GENMASK(8, 6) -/* Values for GRAN_x fields of TIMERS_PULSE_GRAN_CFG */ +enum ipa_reg_timers_pulse_gran_cfg_field_id { + PULSE_GRAN_0, + PULSE_GRAN_1, + PULSE_GRAN_2, +}; + +/* Values for IPA_GRAN_x fields of TIMERS_PULSE_GRAN_CFG */ enum ipa_pulse_gran { IPA_GRAN_10_US = 0x0, IPA_GRAN_20_US = 0x1, |