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-rw-r--r--drivers/gpu/drm/msm/adreno/a3xx_gpu.c10
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.c13
-rw-r--r--drivers/gpu/drm/msm/msm_drv.c4
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.c18
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.h3
-rw-r--r--include/drm/drm_adreno.h2
6 files changed, 28 insertions, 22 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index ce6dcd5e2ca8..faf1e9a1b1b0 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -65,7 +65,7 @@ static int a3xx_hw_init(struct adreno_gpu *gpu)
uint32_t *ptr, len;
int i, ret;
- DBG("%s", gpu->base.name);
+ DBG("%s", adreno_get_name(gpu));
if (adreno_is_a305(gpu)) {
/* Set up 16 deep read/write request queues: */
@@ -255,7 +255,7 @@ static int a3xx_hw_init(struct adreno_gpu *gpu)
static void a3xx_destroy(struct adreno_gpu *gpu)
{
- DBG("%s", gpu->base.name);
+ DBG("%s", adreno_get_name(gpu));
adreno_gpu_cleanup(gpu);
put_device(&gpu->pdev->dev);
@@ -278,7 +278,7 @@ static void a3xx_idle(struct adreno_gpu *gpu)
return;
} while(time_before(jiffies, t));
- DRM_ERROR("timeout waiting for %s to idle!\n", gpu->base.name);
+ DRM_ERROR("timeout waiting for %s to idle!\n", adreno_get_name(gpu));
/* TODO maybe we need to reset GPU here to recover from hang? */
}
@@ -288,7 +288,7 @@ static irqreturn_t a3xx_irq(struct adreno_gpu *gpu)
uint32_t status;
status = gpu_read(gpu, REG_A3XX_RBBM_INT_0_STATUS);
- DBG("%s: %08x", gpu->base.name, status);
+ DBG("%s: %08x", adreno_get_name(gpu), status);
// TODO
@@ -348,7 +348,7 @@ static void a3xx_show(struct adreno_gpu *gpu, struct seq_file *m)
gpu_read(gpu, REG_A3XX_RBBM_STATUS));
/* dump these out in a form that can be parsed by demsm: */
- seq_printf(m, "IO:region %s 00000000 00020000\n", gpu->base.name);
+ seq_printf(m, "IO:region %s 00000000 00020000\n", adreno_get_name(gpu));
for (i = 0; i < ARRAY_SIZE(a3xx_registers); i += 2) {
uint32_t start = a3xx_registers[i];
uint32_t end = a3xx_registers[i+1];
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 488b55f377b9..59c5fd62c7ce 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -55,6 +55,11 @@ static const struct adreno_info gpulist[] = {
#define RB_SIZE SZ_32K
#define RB_BLKSIZE 16
+const char *adreno_get_name(struct adreno_gpu *gpu)
+{
+ return gpu->info->name;
+}
+
int adreno_get_param(struct adreno_gpu *gpu, uint32_t param, uint64_t *value)
{
switch (param) {
@@ -65,7 +70,7 @@ int adreno_get_param(struct adreno_gpu *gpu, uint32_t param, uint64_t *value)
*value = gpu->info->gmem;
return 0;
default:
- DBG("%s: invalid param: %u", gpu->base.name, param);
+ DBG("%s: invalid param: %u", adreno_get_name(gpu), param);
return -EINVAL;
}
}
@@ -75,7 +80,7 @@ int adreno_get_param(struct adreno_gpu *gpu, uint32_t param, uint64_t *value)
int adreno_hw_init(struct adreno_gpu *gpu)
{
- DBG("%s", gpu->base.name);
+ DBG("%s", adreno_get_name(gpu));
/* Setup REG_CP_RB_CNTL: */
gpu_write(gpu, REG_AXXX_CP_RB_CNTL,
@@ -220,7 +225,7 @@ void adreno_idle(struct adreno_gpu *gpu)
} while(time_before(jiffies, t));
DRM_ERROR("timeout waiting for %s to drain ringbuffer!\n",
- gpu->base.name);
+ adreno_get_name(gpu));
/* TODO maybe we need to reset GPU here to recover from hang? */
}
@@ -313,7 +318,7 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
}
ret = msm_gpu_init(drm, pdev, &gpu->base, funcs,
- gpu->info->name, "kgsl_3d0_reg_memory", "kgsl_3d0_irq",
+ "kgsl_3d0_reg_memory", "kgsl_3d0_irq",
RB_SIZE);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index df3f77822d71..0c6adf414c71 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -433,7 +433,7 @@ static int msm_gpu_show(struct drm_device *dev, struct seq_file *m)
struct msm_gpu *gpu = priv->gpu;
if (gpu) {
- seq_printf(m, "%s Status:\n", gpu->name);
+ seq_printf(m, "%s Status:\n", adreno_get_name(gpu->gpu));
gpu->funcs->show(gpu->gpu, m);
}
@@ -446,7 +446,7 @@ static int msm_gem_show(struct drm_device *dev, struct seq_file *m)
struct msm_gpu *gpu = priv->gpu;
if (gpu) {
- seq_printf(m, "Active Objects (%s):\n", gpu->name);
+ seq_printf(m, "Active Objects (%s):\n", adreno_get_name(gpu->gpu));
msm_gem_describe_objects(&gpu->active_list, m);
}
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index c7cb3d851377..96214168c91c 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -164,7 +164,7 @@ int msm_gpu_pm_resume(struct adreno_gpu *gpu)
{
int ret;
- DBG("%s", gpu->base.name);
+ DBG("%s", adreno_get_name(gpu));
ret = enable_pwrrail(&gpu->base);
if (ret)
@@ -185,7 +185,7 @@ int msm_gpu_pm_suspend(struct adreno_gpu *gpu)
{
int ret;
- DBG("%s", gpu->base.name);
+ DBG("%s", adreno_get_name(gpu));
ret = disable_axi(&gpu->base);
if (ret)
@@ -211,7 +211,8 @@ static void recover_worker(struct work_struct *work)
struct msm_gpu *gpu = container_of(work, struct msm_gpu, recover_work);
struct drm_device *dev = gpu->dev;
- dev_err(dev->dev, "%s: hangcheck recover!\n", gpu->name);
+ dev_err(dev->dev, "%s: hangcheck recover!\n",
+ adreno_get_name(gpu->gpu));
mutex_lock(&dev->struct_mutex);
gpu->funcs->recover(gpu->gpu);
@@ -222,7 +223,7 @@ static void recover_worker(struct work_struct *work)
static void hangcheck_timer_reset(struct msm_gpu *gpu)
{
- DBG("%s", gpu->name);
+ DBG("%s", adreno_get_name(gpu->gpu));
mod_timer(&gpu->hangcheck_timer,
round_jiffies_up(jiffies + DRM_MSM_HANGCHECK_JIFFIES));
}
@@ -344,13 +345,12 @@ static const char *clk_names[] = {
int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
struct msm_gpu *gpu, const struct adreno_gpu_funcs *funcs,
- const char *name, const char *ioname, const char *irqname, int ringsz)
+ const char *ioname, const char *irqname, int ringsz)
{
int i, ret;
gpu->dev = drm;
gpu->funcs = funcs;
- gpu->name = name;
INIT_LIST_HEAD(&gpu->active_list);
INIT_WORK(&gpu->retire_work, retire_worker);
@@ -362,7 +362,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
BUG_ON(ARRAY_SIZE(clk_names) != ARRAY_SIZE(gpu->grp_clks));
/* Map registers: */
- gpu->mmio = msm_ioremap(pdev, ioname, name);
+ gpu->mmio = msm_ioremap(pdev, ioname, adreno_get_name(gpu->gpu));
if (IS_ERR(gpu->mmio)) {
ret = PTR_ERR(gpu->mmio);
goto fail;
@@ -377,7 +377,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
}
ret = devm_request_irq(&pdev->dev, gpu->irq, irq_handler,
- IRQF_TRIGGER_HIGH, gpu->name, gpu);
+ IRQF_TRIGGER_HIGH, adreno_get_name(gpu->gpu), gpu);
if (ret) {
dev_err(drm->dev, "failed to request IRQ%u: %d\n", gpu->irq, ret);
goto fail;
@@ -429,7 +429,7 @@ fail:
void msm_gpu_cleanup(struct msm_gpu *gpu)
{
- DBG("%s", gpu->name);
+ DBG("%s", adreno_get_name(gpu->gpu));
WARN_ON(!list_empty(&gpu->active_list));
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index b1a8e928d488..2dc686e05c54 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -39,7 +39,6 @@
*/
struct msm_gpu {
- const char *name;
struct drm_device *dev;
struct adreno_gpu *gpu;
const struct adreno_gpu_funcs *funcs;
@@ -82,7 +81,7 @@ int msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
struct msm_gpu *gpu, const struct adreno_gpu_funcs *funcs,
- const char *name, const char *ioname, const char *irqname, int ringsz);
+ const char *ioname, const char *irqname, int ringsz);
void msm_gpu_cleanup(struct msm_gpu *gpu);
struct msm_gpu *a3xx_gpu_init(struct drm_device *dev,
diff --git a/include/drm/drm_adreno.h b/include/drm/drm_adreno.h
index 44aa89b25712..aa58e5e312ec 100644
--- a/include/drm/drm_adreno.h
+++ b/include/drm/drm_adreno.h
@@ -70,4 +70,6 @@ struct adreno_gem {
void *(*gem_vaddr)(void *gem_priv, struct drm_gem_object *obj);
};
+const char *adreno_get_name(struct adreno_gpu *gpu);
+
#endif /* __DRM_ADRENO_H__ */
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-20 00:42:55 +0000