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path: root/drivers/gpu/drm/msm/adreno/adreno_gpu.c
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Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_gpu.c')
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 488b55f377b9..59c5fd62c7ce 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -55,6 +55,11 @@ static const struct adreno_info gpulist[] = {
#define RB_SIZE SZ_32K
#define RB_BLKSIZE 16
+const char *adreno_get_name(struct adreno_gpu *gpu)
+{
+ return gpu->info->name;
+}
+
int adreno_get_param(struct adreno_gpu *gpu, uint32_t param, uint64_t *value)
{
switch (param) {
@@ -65,7 +70,7 @@ int adreno_get_param(struct adreno_gpu *gpu, uint32_t param, uint64_t *value)
*value = gpu->info->gmem;
return 0;
default:
- DBG("%s: invalid param: %u", gpu->base.name, param);
+ DBG("%s: invalid param: %u", adreno_get_name(gpu), param);
return -EINVAL;
}
}
@@ -75,7 +80,7 @@ int adreno_get_param(struct adreno_gpu *gpu, uint32_t param, uint64_t *value)
int adreno_hw_init(struct adreno_gpu *gpu)
{
- DBG("%s", gpu->base.name);
+ DBG("%s", adreno_get_name(gpu));
/* Setup REG_CP_RB_CNTL: */
gpu_write(gpu, REG_AXXX_CP_RB_CNTL,
@@ -220,7 +225,7 @@ void adreno_idle(struct adreno_gpu *gpu)
} while(time_before(jiffies, t));
DRM_ERROR("timeout waiting for %s to drain ringbuffer!\n",
- gpu->base.name);
+ adreno_get_name(gpu));
/* TODO maybe we need to reset GPU here to recover from hang? */
}
@@ -313,7 +318,7 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
}
ret = msm_gpu_init(drm, pdev, &gpu->base, funcs,
- gpu->info->name, "kgsl_3d0_reg_memory", "kgsl_3d0_irq",
+ "kgsl_3d0_reg_memory", "kgsl_3d0_irq",
RB_SIZE);
if (ret)
return ret;