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Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_gpu.h')
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.h19
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index a7fe0e5..dc0e4ad 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -27,6 +27,8 @@
#include "adreno_common.xml.h"
#include "adreno_pm4.xml.h"
+static int adreno_reglog;
+
struct adreno_rev {
uint8_t core;
uint8_t major;
@@ -131,12 +133,25 @@ void adreno_gpu_cleanup(struct adreno_gpu *gpu);
static inline void gpu_write(struct adreno_gpu *gpu, u32 reg, u32 data)
{
- msm_writel(data, gpu->base.mmio + (reg << 2));
+ void __iomem *addr = gpu->base.mmio + (reg << 2);
+
+ if (IS_ENABLED(CONFIG_DRM_MSM_REGISTER_LOGGING) &&
+ unlikely(adreno_reglog))
+ printk(KERN_DEBUG "IO:W %08x %08x\n", (u32)addr, data);
+
+ writel(data, addr);
}
static inline u32 gpu_read(struct adreno_gpu *gpu, u32 reg)
{
- return msm_readl(gpu->base.mmio + (reg << 2));
+ void __iomem *addr = gpu->base.mmio + (reg << 2);
+ u32 val = readl(addr);
+
+ if (IS_ENABLED(CONFIG_DRM_MSM_REGISTER_LOGGING) &&
+ unlikely(adreno_reglog))
+ printk(KERN_ERR "IO:R %08x %08x\n", (u32)addr, val);
+
+ return val;
}
/* ringbuffer helpers (the parts that are adreno specific) */