summaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/emma
Commit message (Collapse)AuthorAgeFilesLines
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-012-57/+57
| | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: EMMA2RH: Replace EMMA2RH_SW_IRQ_INTxx with EMMA2RH_SW_IRQ(n)Shinya Kuribayashi2010-08-051-32/+1
| | | | | | | | | Don't duplicate worthless lines. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1390/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: EMMA2RH: Replace EMMA2RH_IRQ_INTxx with EMMA2RH_IRQ_INT(n)Shinya Kuribayashi2010-08-052-73/+10
| | | | | | | | | Don't duplicate worthless lines. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1389/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: EMMA2RH: Remove EMMA2RH_CPU_CASCADEShinya Kuribayashi2010-08-051-1/+0
| | | | | | | | | | | | Although all EMMAxxx SoCs can support IP2 and IP3 hardware interrupts, current EMMA2RH plat_irq_dispatch() supports IP2 only. We can make it configurable in the future, but for the time being, would like to make things explicitly allcated to IP2 in accordance with plat_irq_dispatch(). Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1388/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: EMMA2RH: Remove useless CPU_IRQ_BASEShinya Kuribayashi2010-08-051-3/+1
| | | | | | | | | | | | | | For historical reasons, we used to put MIPS CPU IRQs behind SoC-specific IRQs in the queue, and have been using CPU_IRQ_BASE as MIPS_CPU_IRQ_BASE. In recent years, however, we've brought it back to normal order, and now CPU_IRQ_BASE just redefines the generic MIPS_CPU_IRQ_BASE. At the same time, NUM_CPU_IRQ is also removed as useless. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1387/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Eleminate filenames from commentsRalf Baechle2009-08-032-6/+0
| | | | | | | | | | They tend to get not updated when files are moved around or copied and lack any obvious use. While at it zap some only too obvious comments and as per Shinya's suggestion, add a copyright header to extable.c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Acked-by: Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com>
* MIPS: EMMA2RH: Remove emma2rh_sync on read operationShinya Kuribayashi2008-10-271-3/+0
| | | | | | | It's totally a waste of CPU cycles. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: EMMA: Move <asm/emma2rh> to <asm/emma> dirShinya Kuribayashi2008-10-272-0/+408
We'll put all EMMA related headers there in the future. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>