// SPDX-License-Identifier: GPL-2.0 /* * Pinctrl dts file for HiSilicon HiKey970 development board */ #include / { soc { range: gpio-range { #pinctrl-single,gpio-range-cells = <3>; }; pmx0: pinmux@e896c000 { compatible = "pinctrl-single"; reg = <0x0 0xe896c000 0x0 0x72c>; #pinctrl-cells = <1>; #gpio-range-cells = <0x3>; pinctrl-single,register-width = <0x20>; pinctrl-single,function-mask = <0x7>; /* pin base, nr pins & gpio function */ pinctrl-single,gpio-range = <&range 0 82 0>; uart0_pmx_func: uart0_pmx_func { pinctrl-single,pins = < 0x054 MUX_M2 /* UART0_RXD */ 0x058 MUX_M2 /* UART0_TXD */ >; }; uart2_pmx_func: uart2_pmx_func { pinctrl-single,pins = < 0x700 MUX_M2 /* UART2_CTS_N */ 0x704 MUX_M2 /* UART2_RTS_N */ 0x708 MUX_M2 /* UART2_RXD */ 0x70c MUX_M2 /* UART2_TXD */ >; }; uart3_pmx_func: uart3_pmx_func { pinctrl-single,pins = < 0x064 MUX_M1 /* UART3_CTS_N */ 0x068 MUX_M1 /* UART3_RTS_N */ 0x06c MUX_M1 /* UART3_RXD */ 0x070 MUX_M1 /* UART3_TXD */ >; }; uart4_pmx_func: uart4_pmx_func { pinctrl-single,pins = < 0x074 MUX_M1 /* UART4_CTS_N */ 0x078 MUX_M1 /* UART4_RTS_N */ 0x07c MUX_M1 /* UART4_RXD */ 0x080 MUX_M1 /* UART4_TXD */ >; }; uart6_pmx_func: uart6_pmx_func { pinctrl-single,pins = < 0x05c MUX_M1 /* UART6_RXD */ 0x060 MUX_M1 /* UART6_TXD */ >; }; i2c3_pmx_func: i2c3_pmx_func { pinctrl-single,pins = < 0x010 MUX_M1 /* I2C3_SCL */ 0x014 MUX_M1 /* I2C3_SDA */ >; }; i2c4_pmx_func: i2c4_pmx_func { pinctrl-single,pins = < 0x03c MUX_M1 /* I2C4_SCL */ 0x040 MUX_M1 /* I2C4_SDA */ >; }; cam0_rst_pmx_func: cam0_rst_pmx_func { pinctrl-single,pins = < 0x714 MUX_M0 /* CAM0_RST */ >; }; cam1_rst_pmx_func: cam1_rst_pmx_func { pinctrl-single,pins = < 0x048 MUX_M0 /* CAM1_RST */ >; }; cam0_pwd_n_pmx_func: cam0_pwd_n_pmx_func { pinctrl-single,pins = < 0x098 MUX_M0 /* CAM0_PWD_N */ >; }; cam1_pwd_n_pmx_func: cam1_pwd_n_pmx_func { pinctrl-single,pins = < 0x044 MUX_M0 /* CAM1_PWD_N */ >; }; isp0_pmx_func: isp0_pmx_func { pinctrl-single,pins = < 0x018 MUX_M1 /* ISP_CLK0 */ 0x024 MUX_M1 /* ISP_SCL0 */ 0x028 MUX_M1 /* ISP_SDA0 */ >; }; isp1_pmx_func: isp1_pmx_func { pinctrl-single,pins = < 0x01c MUX_M1 /* ISP_CLK1 */ 0x02c MUX_M1 /* ISP_SCL1 */ 0x030 MUX_M1 /* ISP_SDA1 */ >; }; }; pmx1: pinmux@fff11000 { compatible = "pinctrl-single"; reg = <0x0 0xfff11000 0x0 0x73c>; #gpio-range-cells = <0x3>; #pinctrl-cells = <1>; pinctrl-single,register-width = <0x20>; pinctrl-single,function-mask = <0x7>; /* pin base, nr pins & gpio function */ pinctrl-single,gpio-range = <&range 0 46 0>; pwr_key_pmx_func: pwr_key_pmx_func { pinctrl-single,pins = < 0x064 MUX_M0 /* GPIO_203 */ >; }; pd_pmx_func: pd_pmx_func{ pinctrl-single,pins = < 0x080 MUX_M0 /* GPIO_221 */ >; }; i2s2_pmx_func: i2s2_pmx_func { pinctrl-single,pins = < 0x050 MUX_M1 /* I2S2_DI */ 0x054 MUX_M1 /* I2S2_DO */ 0x058 MUX_M1 /* I2S2_XCLK */ 0x05c MUX_M1 /* I2S2_XFS */ >; }; spi0_pmx_func: spi0_pmx_func { pinctrl-single,pins = < 0x094 MUX_M1 /* SPI0_CLK */ 0x098 MUX_M1 /* SPI0_DI */ 0x09c MUX_M1 /* SPI0_DO */ 0x0a0 MUX_M1 /* SPI0_CS0_N */ >; }; spi2_pmx_func: spi2_pmx_func { pinctrl-single,pins = < 0x710 MUX_M1 /* SPI2_CLK */ 0x714 MUX_M1 /* SPI2_DI */ 0x718 MUX_M1 /* SPI2_DO */ 0x71c MUX_M1 /* SPI2_CS0_N */ >; }; spi3_pmx_func: spi3_pmx_func { pinctrl-single,pins = < 0x72c MUX_M1 /* SPI3_CLK */ 0x730 MUX_M1 /* SPI3_DI */ 0x734 MUX_M1 /* SPI3_DO */ 0x738 MUX_M1 /* SPI3_CS0_N */ >; }; i2c0_pmx_func: i2c0_pmx_func { pinctrl-single,pins = < 0x020 MUX_M1 /* I2C0_SCL */ 0x024 MUX_M1 /* I2C0_SDA */ >; }; i2c1_pmx_func: i2c1_pmx_func { pinctrl-single,pins = < 0x028 MUX_M1 /* I2C1_SCL */ 0x02c MUX_M1 /* I2C1_SDA */ >; }; i2c2_pmx_func: i2c2_pmx_func { pinctrl-single,pins = < 0x030 MUX_M1 /* I2C2_SCL */ 0x034 MUX_M1 /* I2C2_SDA */ >; }; pcie_clkreq_pmx_func: pcie_clkreq_pmx_func { pinctrl-single,pins = < 0x084 MUX_M1 /* PCIE0_CLKREQ_N */ >; }; gpio185_pmx_func: gpio185_pmx_func { pinctrl-single,pins = <0x01C 0x1>; }; gpio185_pmx_idle: gpio185_pmx_idle { pinctrl-single,pins = <0x01C 0x0>; }; }; pmx2: pinmux@e896c800 { compatible = "pinconf-single"; reg = <0x0 0xe896c800 0x0 0x72c>; #pinctrl-cells = <1>; pinctrl-single,register-width = <0x20>; uart0_cfg_func: uart0_cfg_func { pinctrl-single,pins = < 0x058 0x0 /* UART0_RXD */ 0x05c 0x0 /* UART0_TXD */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; uart2_cfg_func: uart2_cfg_func { pinctrl-single,pins = < 0x700 0x0 /* UART2_CTS_N */ 0x704 0x0 /* UART2_RTS_N */ 0x708 0x0 /* UART2_RXD */ 0x70c 0x0 /* UART2_TXD */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; uart3_cfg_func: uart3_cfg_func { pinctrl-single,pins = < 0x068 0x0 /* UART3_CTS_N */ 0x06c 0x0 /* UART3_RTS_N */ 0x070 0x0 /* UART3_RXD */ 0x074 0x0 /* UART3_TXD */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; uart4_cfg_func: uart4_cfg_func { pinctrl-single,pins = < 0x078 0x0 /* UART4_CTS_N */ 0x07c 0x0 /* UART4_RTS_N */ 0x080 0x0 /* UART4_RXD */ 0x084 0x0 /* UART4_TXD */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; uart6_cfg_func: uart6_cfg_func { pinctrl-single,pins = < 0x060 0x0 /* UART6_RXD */ 0x064 0x0 /* UART6_TXD */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_02MA DRIVE6_MASK >; }; i2c3_cfg_func: i2c3_cfg_func { pinctrl-single,pins = < 0x014 0x0 /* I2C3_SCL */ 0x018 0x0 /* I2C3_SDA */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; i2c4_cfg_func: i2c4_cfg_func { pinctrl-single,pins = < 0x040 0x0 /* I2C4_SCL */ 0x044 0x0 /* I2C4_SDA */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; cam0_rst_cfg_func: cam0_rst_cfg_func { pinctrl-single,pins = < 0x714 0x0 /* CAM0_RST */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; cam1_rst_cfg_func: cam1_rst_cfg_func { pinctrl-single,pins = < 0x04C 0x0 /* CAM1_RST */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; cam0_pwd_n_cfg_func: cam0_pwd_n_cfg_func { pinctrl-single,pins = < 0x09C 0x0 /* CAM0_PWD_N */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; cam1_pwd_n_cfg_func: cam1_pwd_n_cfg_func { pinctrl-single,pins = < 0x048 0x0 /* CAM1_PWD_N */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; isp0_cfg_func: isp0_cfg_func { pinctrl-single,pins = < 0x01C 0x0 /* ISP_CLK0 */ 0x028 0x0 /* ISP_SCL0 */ 0x02C 0x0 /* ISP_SDA0 */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; isp1_cfg_func: isp1_cfg_func { pinctrl-single,pins = < 0x020 0x0 /* ISP_CLK1 */ 0x030 0x0 /* ISP_SCL1 */ 0x034 0x0 /* ISP_SDA1 */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; }; pmx5: pinmux@fc182000 { compatible = "pinctrl-single"; reg = <0x0 0xfc182000 0x0 0x028>; #gpio-range-cells = <3>; #pinctrl-cells = <1>; pinctrl-single,register-width = <0x20>; pinctrl-single,function-mask = <0x7>; /* pin base, nr pins & gpio function */ pinctrl-single,gpio-range = <&range 0 10 0>; sdio_pmx_func: sdio_pmx_func { pinctrl-single,pins = < 0x000 MUX_M1 /* SDIO_CLK */ 0x004 MUX_M1 /* SDIO_CMD */ 0x008 MUX_M1 /* SDIO_DATA0 */ 0x00c MUX_M1 /* SDIO_DATA1 */ 0x010 MUX_M1 /* SDIO_DATA2 */ 0x014 MUX_M1 /* SDIO_DATA3 */ >; }; }; pmx6: pinmux@fc182800 { compatible = "pinconf-single"; reg = <0x0 0xfc182800 0x0 0x028>; #pinctrl-cells = <1>; pinctrl-single,register-width = <0x20>; sdio_clk_cfg_func: sdio_clk_cfg_func { pinctrl-single,pins = < 0x000 0x0 /* SDIO_CLK */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE6_32MA DRIVE6_MASK >; }; sdio_cfg_func: sdio_cfg_func { pinctrl-single,pins = < 0x004 0x0 /* SDIO_CMD */ 0x008 0x0 /* SDIO_DATA0 */ 0x00c 0x0 /* SDIO_DATA1 */ 0x010 0x0 /* SDIO_DATA2 */ 0x014 0x0 /* SDIO_DATA3 */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_UP PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE6_19MA DRIVE6_MASK >; }; }; pmx7: pinmux@ff37e000 { compatible = "pinctrl-single"; reg = <0x0 0xff37e000 0x0 0x030>; #gpio-range-cells = <3>; #pinctrl-cells = <1>; pinctrl-single,register-width = <0x20>; pinctrl-single,function-mask = <7>; /* pin base, nr pins & gpio function */ pinctrl-single,gpio-range = <&range 0 12 0>; sd_pmx_func: sd_pmx_func { pinctrl-single,pins = < 0x000 MUX_M1 /* SD_CLK */ 0x004 MUX_M1 /* SD_CMD */ 0x008 MUX_M1 /* SD_DATA0 */ 0x00c MUX_M1 /* SD_DATA1 */ 0x010 MUX_M1 /* SD_DATA2 */ 0x014 MUX_M1 /* SD_DATA3 */ >; }; }; pmx8: pinmux@ff37e800 { compatible = "pinconf-single"; reg = <0x0 0xff37e800 0x0 0x030>; #pinctrl-cells = <1>; pinctrl-single,register-width = <0x20>; sd_clk_cfg_func: sd_clk_cfg_func { pinctrl-single,pins = < 0x000 0x0 /* SD_CLK */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE6_32MA DRIVE6_MASK >; }; sd_cfg_func: sd_cfg_func { pinctrl-single,pins = < 0x004 0x0 /* SD_CMD */ 0x008 0x0 /* SD_DATA0 */ 0x00c 0x0 /* SD_DATA1 */ 0x010 0x0 /* SD_DATA2 */ 0x014 0x0 /* SD_DATA3 */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_UP PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE6_19MA DRIVE6_MASK >; }; }; pmx16: pinmux@fff11800 { compatible = "pinconf-single"; reg = <0x0 0xfff11800 0x0 0x73c>; #pinctrl-cells = <1>; pinctrl-single,register-width = <0x20>; pwr_key_cfg_func: pwr_key_cfg_func { pinctrl-single,pins = < 0x090 0x0 /* GPIO_203 */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_UP PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_02MA DRIVE6_MASK >; }; usb_cfg_func: usb_cfg_func { pinctrl-single,pins = < 0x0AC 0x0 /* GPIO_221 */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_UP PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_02MA DRIVE6_MASK >; }; spi0_cfg_func: spi0_cfg_func { pinctrl-single,pins = < 0x0c8 0x0 /* SPI0_DI */ 0x0cc 0x0 /* SPI0_DO */ 0x0d0 0x0 /* SPI0_CS0_N */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_06MA DRIVE6_MASK >; }; spi2_cfg_func: spi2_cfg_func { pinctrl-single,pins = < 0x714 0x0 /* SPI2_DI */ 0x718 0x0 /* SPI2_DO */ 0x71c 0x0 /* SPI2_CS0_N */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_06MA DRIVE6_MASK >; }; spi3_cfg_func: spi3_cfg_func { pinctrl-single,pins = < 0x730 0x0 /* SPI3_DI */ 0x734 0x0 /* SPI3_DO */ 0x738 0x0 /* SPI3_CS0_N */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_06MA DRIVE6_MASK >; }; spi0_clk_cfg_func: spi0_clk_cfg_func { pinctrl-single,pins = < 0x0c4 0x0 /* SPI0_CLK */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_10MA DRIVE6_MASK >; }; spi2_clk_cfg_func: spi2_clk_cfg_func { pinctrl-single,pins = < 0x710 0x0 /* SPI2_CLK */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_10MA DRIVE6_MASK >; }; spi3_clk_cfg_func: spi3_clk_cfg_func { pinctrl-single,pins = < 0x72c 0x0 /* SPI3_CLK */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_10MA DRIVE6_MASK >; }; i2c0_cfg_func: i2c0_cfg_func { pinctrl-single,pins = < 0x04c 0x0 /* I2C0_SCL */ 0x050 0x0 /* I2C0_SDA */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; i2c1_cfg_func: i2c1_cfg_func { pinctrl-single,pins = < 0x054 0x0 /* I2C1_SCL */ 0x058 0x0 /* I2C1_SDA */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; i2c2_cfg_func: i2c2_cfg_func { pinctrl-single,pins = < 0x05c 0x0 /* I2C2_SCL */ 0x060 0x0 /* I2C2_SDA */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_04MA DRIVE6_MASK >; }; pcie_clkreq_cfg_func: pcie_clkreq_cfg_func { pinctrl-single,pins = < 0x0b0 0x0 >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_DIS PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_06MA DRIVE6_MASK >; }; i2s2_cfg_func: i2s2_cfg_func { pinctrl-single,pins = < 0x07c 0x0 /* I2S2_DI */ 0x080 0x0 /* I2S2_DO */ 0x084 0x0 /* I2S2_XCLK */ 0x088 0x0 /* I2S2_XFS */ >; pinctrl-single,bias-pulldown = < PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN >; pinctrl-single,bias-pullup = < PULL_UP PULL_UP PULL_DIS PULL_UP >; pinctrl-single,drive-strength = < DRIVE7_02MA DRIVE6_MASK >; }; gpio185_cfg_func: gpio185_cfg_func { pinctrl-single,pins = <0x048 0>; pinctrl-single,bias-pulldown = <0 2 0 2>; pinctrl-single,bias-pullup = <0 1 0 1>; pinctrl-single,drive-strength = <0x00 0x70>; pinctrl-single,slew-rate = <0x0 0x80>; }; gpio185_cfg_idle: gpio185_cfg_idle { pinctrl-single,pins = <0x048 0>; pinctrl-single,bias-pulldown = <2 2 0 2>; pinctrl-single,bias-pullup = <0 1 0 1>; pinctrl-single,drive-strength = <0x00 0x70>; pinctrl-single,slew-rate = <0x0 0x80>; }; }; }; };