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authorKenneth Graunke <kenneth@whitecape.org>2014-05-10 01:59:10 -0700
committerCarl Worth <cworth@cworth.org>2014-07-17 15:59:01 -0700
commit1c386d5c352c71c5632804c81daffd399c0b237f (patch)
treea3510a990c16185702e45f1236ba186562552196
parente3c0c238736bbfc990bfd275426eb8fd8c259ade (diff)
downloadmesa-1c386d5c352c71c5632804c81daffd399c0b237f.tar.gz
mesa-1c386d5c352c71c5632804c81daffd399c0b237f.tar.xz
i965: Hook up the MCS buffers in SURFACE_STATE on Broadwell.
MCS buffers are never allocated on Broadwell, so this does nothing for now, but puts the infrastructure in place for when they do exist. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (cherry picked from commit a248b2a4ebb27832d6c8a40ce2b10134f8735b93)
-rw-r--r--src/mesa/drivers/dri/i965/gen8_surface_state.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 0268e5c70a..72983f54ff 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -157,6 +157,11 @@ gen8_update_texture_surface(struct gl_context *ctx,
pitch = mt->pitch;
}
+ if (mt->mcs_mt) {
+ aux_mt = mt->mcs_mt;
+ aux_mode = GEN8_SURFACE_AUX_MODE_MCS;
+ }
+
/* If this is a view with restricted NumLayers, then our effective depth
* is not just the miptree depth.
*/
@@ -355,6 +360,11 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
__FUNCTION__, _mesa_get_format_name(rb_format));
}
+ if (mt->mcs_mt) {
+ aux_mt = mt->mcs_mt;
+ aux_mode = GEN8_SURFACE_AUX_MODE_MCS;
+ }
+
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 13 * 4, 64,
&brw->wm.base.surf_offset[surf_index]);