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| author | Kenneth Graunke <kenneth@whitecape.org> | 2014-07-15 20:40:55 -0700 |
|---|---|---|
| committer | Carl Worth <cworth@cworth.org> | 2014-07-17 15:59:00 -0700 |
| commit | 64ff84abaee8d8925a21eea7cd2b833a51b0ba03 (patch) | |
| tree | d14fd622bc89247397f1315140c714e6aa191c58 | |
| parent | 8f4e03c3978c1436d48752ca38e2831fa43e1159 (diff) | |
| download | mesa-64ff84abaee8d8925a21eea7cd2b833a51b0ba03.tar.gz mesa-64ff84abaee8d8925a21eea7cd2b833a51b0ba03.tar.xz | |
i965/fs: Use WE_all for gl_SampleID header register munging.
This code should execute without regard to the currently executing
channels. Asking for gl_SampleID inside control flow might break in
strange ways. It appears to break even at the top of the program in
SIMD16 mode occasionally as well.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 6dc9e4e22a19108057162d9d8f8c7d559545f8de)
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 48cb9bd3d7..3241e58260 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -1312,12 +1312,16 @@ fs_visitor::emit_sampleid_setup(ir_variable *ir) * and then reading from it using vstride=1, width=4, hstride=0. * These computations hold good for 4x multisampling as well. */ - emit(BRW_OPCODE_AND, t1, - fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD)), - fs_reg(0xc0)); - emit(BRW_OPCODE_SHR, t1, t1, fs_reg(5)); + fs_inst *inst; + inst = emit(BRW_OPCODE_AND, t1, + fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD)), + fs_reg(0xc0)); + inst->force_writemask_all = true; + inst = emit(BRW_OPCODE_SHR, t1, t1, fs_reg(5)); + inst->force_writemask_all = true; /* This works for both SIMD8 and SIMD16 */ - emit(MOV(t2, brw_imm_v(0x3210))); + inst = emit(MOV(t2, brw_imm_v(0x3210))); + inst->force_writemask_all = true; /* This special instruction takes care of setting vstride=1, * width=4, hstride=0 of t2 during an ADD instruction. */ |