From 1c386d5c352c71c5632804c81daffd399c0b237f Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Sat, 10 May 2014 01:59:10 -0700 Subject: i965: Hook up the MCS buffers in SURFACE_STATE on Broadwell. MCS buffers are never allocated on Broadwell, so this does nothing for now, but puts the infrastructure in place for when they do exist. Signed-off-by: Kenneth Graunke Reviewed-by: Jordan Justen Reviewed-by: Ben Widawsky (cherry picked from commit a248b2a4ebb27832d6c8a40ce2b10134f8735b93) --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 0268e5c70a..72983f54ff 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -157,6 +157,11 @@ gen8_update_texture_surface(struct gl_context *ctx, pitch = mt->pitch; } + if (mt->mcs_mt) { + aux_mt = mt->mcs_mt; + aux_mode = GEN8_SURFACE_AUX_MODE_MCS; + } + /* If this is a view with restricted NumLayers, then our effective depth * is not just the miptree depth. */ @@ -355,6 +360,11 @@ gen8_update_renderbuffer_surface(struct brw_context *brw, __FUNCTION__, _mesa_get_format_name(rb_format)); } + if (mt->mcs_mt) { + aux_mt = mt->mcs_mt; + aux_mode = GEN8_SURFACE_AUX_MODE_MCS; + } + uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 13 * 4, 64, &brw->wm.base.surf_offset[surf_index]); -- cgit v1.2.3