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authorLuotao Fu <l.fu@pengutronix.de>2009-06-26 10:28:18 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2009-07-01 10:39:12 +0200
commitbaa2985aa15980dacbb5109973a39337717b4e56 (patch)
tree1e8d4766e40bfc587c14cbdd52eea3d591a338ee
parentacc8bda1896d51aa0623c6226fa92a0d556365d9 (diff)
downloadlinux-2.6-phytec-master-2.6.30.tar.gz
linux-2.6-phytec-master-2.6.30.tar.xz
pca100: cleaning up usb pin initialisationphytec-master-2.6.30
We can now control the gpio driven cs line on the both usb phys to ensure that they are initialized correctly. Hence there's no need to split up the usb pin mux definition out of pca100_pins any more. Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
-rw-r--r--arch/arm/mach-mx2/pca100.c73
1 files changed, 28 insertions, 45 deletions
diff --git a/arch/arm/mach-mx2/pca100.c b/arch/arm/mach-mx2/pca100.c
index 80747eed694..105e820ac70 100644
--- a/arch/arm/mach-mx2/pca100.c
+++ b/arch/arm/mach-mx2/pca100.c
@@ -135,6 +135,32 @@ static int pca100_pins[] = {
PD29_PF_CSPI1_SCLK,
PD30_PF_CSPI1_MISO,
PD31_PF_CSPI1_MOSI,
+ /* OTG */
+ PC7_PF_USBOTG_DATA5,
+ PC8_PF_USBOTG_DATA6,
+ PC9_PF_USBOTG_DATA0,
+ PC10_PF_USBOTG_DATA2,
+ PC11_PF_USBOTG_DATA1,
+ PC12_PF_USBOTG_DATA4,
+ PC13_PF_USBOTG_DATA3,
+ PE0_PF_USBOTG_NXT,
+ PE1_PF_USBOTG_STP,
+ PE2_PF_USBOTG_DIR,
+ PE24_PF_USBOTG_CLK,
+ PE25_PF_USBOTG_DATA7,
+ /* USBH2 */
+ PA0_PF_USBH2_CLK,
+ PA1_PF_USBH2_DIR,
+ PA2_PF_USBH2_DATA7,
+ PA3_PF_USBH2_NXT,
+ PA4_PF_USBH2_STP,
+ PD19_AF_USBH2_DATA4,
+ PD20_AF_USBH2_DATA3,
+ PD21_AF_USBH2_DATA6,
+ PD22_AF_USBH2_DATA0,
+ PD23_AF_USBH2_DATA2,
+ PD24_AF_USBH2_DATA1,
+ PD26_AF_USBH2_DATA5,
};
static struct imxuart_platform_data uart_pdata = {
@@ -257,21 +283,6 @@ static int isp1504_set_vbus_power(void __iomem *view, int on)
return ret;
}
-static int mxc_usbh2_pins[] = {
- PA0_PF_USBH2_CLK,
- PA1_PF_USBH2_DIR,
- PA2_PF_USBH2_DATA7,
- PA3_PF_USBH2_NXT,
- PA4_PF_USBH2_STP,
- PD19_AF_USBH2_DATA4,
- PD20_AF_USBH2_DATA3,
- PD21_AF_USBH2_DATA6,
- PD22_AF_USBH2_DATA0,
- PD23_AF_USBH2_DATA2,
- PD24_AF_USBH2_DATA1,
- PD26_AF_USBH2_DATA5,
-};
-
static int pca100_usbh2_init(struct platform_device *pdev)
{
int ret;
@@ -283,11 +294,6 @@ static int pca100_usbh2_init(struct platform_device *pdev)
/* disable phy chip select */
gpio_direction_output(GPIO_PORTB + 24, 1);
- ret = mxc_gpio_setup_multiple_pins(mxc_usbh2_pins,
- ARRAY_SIZE(mxc_usbh2_pins), "usbh2");
- if (ret)
- return ret;
-
temp = readl(IO_ADDRESS(OTG_BASE_ADDR) + 0x600);
temp &= ~((3 << 21) | 1);
temp |= (1 << 5) | (1 << 16) | (1 << 19) | (1 << 11) | (1 << 20);
@@ -306,8 +312,8 @@ static int pca100_usbh2_init(struct platform_device *pdev)
ret = isp1504_set_vbus_power(IO_ADDRESS(OTG_BASE_ADDR + 0x570), 1);
if (ret)
- mxc_gpio_release_multiple_pins(mxc_usbh2_pins,
- ARRAY_SIZE(mxc_usbh2_pins));
+ printk(KERN_ERR "pca100: Failed to enable usbh2 phy (%d)\n", ret);
+
return ret;
}
@@ -315,21 +321,6 @@ static struct mxc_usbh_platform_data ehci2_pdata = {
.init = pca100_usbh2_init,
};
-static int mxc_otg_pins[] = {
- PC7_PF_USBOTG_DATA5,
- PC8_PF_USBOTG_DATA6,
- PC9_PF_USBOTG_DATA0,
- PC10_PF_USBOTG_DATA2,
- PC11_PF_USBOTG_DATA1,
- PC12_PF_USBOTG_DATA4,
- PC13_PF_USBOTG_DATA3,
- PE0_PF_USBOTG_NXT,
- PE1_PF_USBOTG_STP,
- PE2_PF_USBOTG_DIR,
- PE24_PF_USBOTG_CLK,
- PE25_PF_USBOTG_DATA7,
-};
-
static int pca100_otg_phy_cs_req_setval(int cs_value)
{
int ret;
@@ -353,11 +344,6 @@ static int pca100_otg_init(struct platform_device *pdev)
if (ret)
return ret;
- ret = mxc_gpio_setup_multiple_pins(mxc_otg_pins,
- ARRAY_SIZE(mxc_otg_pins), "otg");
- if (ret)
- return ret;
-
tmp = readl(IO_ADDRESS(OTG_BASE_ADDR) + 0x600);
tmp &= ~((3 << 29) | 1);
tmp |= (1 << 28) | (1 << 27) | (1 << 24);
@@ -513,9 +499,6 @@ static void __init pca100_init(void)
if (otg_mode_host)
mxc_register_device(&mxc_otg, &otg_host_pdata);
else {
- mxc_gpio_setup_multiple_pins(mxc_otg_pins,
- ARRAY_SIZE(mxc_otg_pins), "otg");
-
/* enable phy by pulling down /cs line */
ret = pca100_otg_phy_cs_req_setval(0);
if (ret)