diff options
| author | Michael Grzeschik <m.grzeschik@pengutronix.de> | 2013-11-20 12:47:46 +0100 |
|---|---|---|
| committer | Michael Grzeschik <m.grzeschik@pengutronix.de> | 2013-11-21 15:36:10 +0100 |
| commit | 6bdf3cbaa9d64496c2deced70ba9b845e79f20b1 (patch) | |
| tree | e959f21051161492b274d4f779b43471bb089092 | |
| parent | 09c0238f1dc3f411ee3e81d1731eea314918db49 (diff) | |
| download | platform-pengutronix-beaglebone-6bdf3cbaa9d64496c2deced70ba9b845e79f20b1.tar.gz platform-pengutronix-beaglebone-6bdf3cbaa9d64496c2deced70ba9b845e79f20b1.tar.xz | |
kernel: add 3.12 patches
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
114 files changed, 14207 insertions, 5 deletions
diff --git a/kernelconfig-3.12 b/kernelconfig-3.12 new file mode 100644 index 0000000..aaa0f96 --- /dev/null +++ b/kernelconfig-3.12 @@ -0,0 +1,4115 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm 3.12.0-20131119-1 Kernel Configuration +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_ARCH_HAS_CPUFREQ=y +CONFIG_ARCH_HAS_BANDGAP=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y + +# +# General setup +# +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +# CONFIG_KERNEL_GZIP is not set +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +CONFIG_KERNEL_LZO=y +# CONFIG_KERNEL_LZ4 is not set +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_FHANDLE is not set +# CONFIG_AUDIT is not set + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +CONFIG_KTIME_SCALAR=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y + +# +# RCU Subsystem +# +CONFIG_TINY_RCU=y +# CONFIG_PREEMPT_RCU is not set +# CONFIG_RCU_STALL_COMMON is not set +# CONFIG_TREE_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_MEMCG=y +# CONFIG_MEMCG_SWAP is not set +# CONFIG_MEMCG_KMEM is not set +# CONFIG_CGROUP_PERF is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_UIDGID_STRICT_TYPE_CHECKS=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_MM_OWNER=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_EXPERT=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=m +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OLD_SIGACTION=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_MODULE_SIG is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +# CONFIG_BLK_DEV_THROTTLING is not set +CONFIG_BLK_CMDLINE_PARSER=y + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_CMDLINE_PARTITION=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_CFQ_GROUP_IOSCHED is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_ASN1=m +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +CONFIG_ARCH_MULTIPLATFORM=y +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_LPC32XX is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_SHMOBILE is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C24XX is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5P64X0 is not set +# CONFIG_ARCH_S5PC100 is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP1 is not set + +# +# Multiple platform selection +# + +# +# CPU Core family selection +# +CONFIG_ARCH_MULTI_V6=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_MULTI_V6_V7=y +# CONFIG_ARCH_MULTI_CPU_AUTO is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_BCM is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_CNS3XXX is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_ARCH_HIGHBANK is not set +# CONFIG_ARCH_KEYSTONE is not set +# CONFIG_ARCH_MXC is not set + +# +# TI OMAP Common Features +# + +# +# OMAP Feature Selections +# +CONFIG_OMAP_RESET_CLOCKS=y +CONFIG_OMAP_MUX=y +CONFIG_OMAP_MUX_DEBUG=y +CONFIG_OMAP_MUX_WARNINGS=y +CONFIG_OMAP_32K_TIMER=y +CONFIG_OMAP_DM_TIMER=y +CONFIG_OMAP_PM_NOOP=y +CONFIG_MACH_OMAP_GENERIC=y +CONFIG_ARCH_OMAP=y +# CONFIG_ARCH_OMAP2 is not set +# CONFIG_ARCH_OMAP3 is not set +# CONFIG_ARCH_OMAP4 is not set +# CONFIG_SOC_OMAP5 is not set +CONFIG_SOC_AM33XX=y +# CONFIG_SOC_AM43XX is not set +CONFIG_ARCH_OMAP2PLUS=y + +# +# TI OMAP2/3/4 Specific Features +# +CONFIG_ARCH_OMAP2PLUS_TYPICAL=y +CONFIG_SOC_HAS_OMAP2_SDRC=y +# CONFIG_SOC_DRA7XX is not set + +# +# OMAP Board Type +# +# CONFIG_ARCH_PICOXCELL is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SOCFPGA is not set +# CONFIG_PLAT_SPEAR is not set +# CONFIG_ARCH_STI is not set +# CONFIG_ARCH_SHMOBILE_MULTI is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_SIRF is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_U8500 is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VIRT is not set +# CONFIG_ARCH_WM8750 is not set +# CONFIG_ARCH_WM8850 is not set +# CONFIG_ARCH_ZYNQ is not set + +# +# Processor Type +# +CONFIG_CPU_V6=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v6=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V6=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_USE_DOMAINS=y + +# +# Processor Features +# +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_ARM_THUMB=y +CONFIG_ARM_THUMBEE=y +CONFIG_ARM_VIRT_EXT=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_KUSER_HELPERS=y +# CONFIG_CACHE_L2X0 is not set +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_DMA_MEM_BUFFERABLE=y +CONFIG_ARM_NR_BANKS=8 +CONFIG_MULTI_IRQ_HANDLER=y +# CONFIG_ARM_ERRATA_326103 is not set +# CONFIG_ARM_ERRATA_411920 is not set +# CONFIG_ARM_ERRATA_430973 is not set +CONFIG_ARM_ERRATA_720789=y +CONFIG_ARM_ERRATA_754322=y +# CONFIG_ARM_ERRATA_364296 is not set +CONFIG_ARM_ERRATA_775420=y +# CONFIG_ARM_ERRATA_773022 is not set +CONFIG_TI_PRIV_EDMA=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_HAVE_ARM_ARCH_TIMER is not set +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_ARM_PSCI is not set +CONFIG_ARCH_NR_GPIO=0 +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +CONFIG_HZ_FIXED=0 +CONFIG_HZ_100=y +# CONFIG_HZ_200 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +# CONFIG_HZ_500 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=100 +CONFIG_SCHED_HRTICK=y +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_HW_PERF_EVENTS=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_HAVE_MEMBLOCK=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=999999 +# CONFIG_COMPACTION is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_BOUNCE=y +CONFIG_NEED_BOUNCE_POOL=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_NEED_PER_CPU_KM=y +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +# CONFIG_CMA is not set +# CONFIG_ZBUD is not set +CONFIG_FORCE_MAX_ZONEORDER=12 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set +# CONFIG_SECCOMP is not set +# CONFIG_CC_STACKPROTECTOR is not set + +# +# Boot options +# +CONFIG_USE_OF=y +CONFIG_ATAGS=y +CONFIG_DEPRECATED_PARAM_STRUCT=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +# CONFIG_ARM_APPENDED_DTB is not set +CONFIG_CMDLINE="" +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +CONFIG_AUTO_ZRELADDR=y + +# +# CPU Power Management +# + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y + +# +# ARM CPU frequency scaling drivers +# +# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set +# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y + +# +# ARM CPU Idle Drivers +# +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_HAVE_AOUT is not set +CONFIG_BINFMT_MISC=y +# CONFIG_COREDUMP is not set + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_PM_SLEEP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM_RUNTIME=y +CONFIG_PM=y +CONFIG_PM_DEBUG=y +# CONFIG_PM_ADVANCED_DEBUG is not set +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_PM_SLEEP_DEBUG=y +# CONFIG_APM_EMULATION is not set +CONFIG_PM_CLK=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_CPU_PM=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_DIAG=m +CONFIG_UNIX=y +CONFIG_UNIX_DIAG=m +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_SUB_POLICY is not set +CONFIG_XFRM_MIGRATE=y +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=m +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE_DEMUX=m +CONFIG_NET_IP_TUNNEL=m +CONFIG_NET_IPGRE=m +# CONFIG_NET_IPGRE_BROADCAST is not set +CONFIG_IP_MROUTE=y +CONFIG_IP_MROUTE_MULTIPLE_TABLES=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_SYN_COOKIES=y +# CONFIG_NET_IPVTI is not set +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_LRO=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +CONFIG_INET_UDP_DIAG=m +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_HTCP=m +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_VEGAS=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_CONG_ILLINOIS=m +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_GRE=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_IPV6_MROUTE=y +CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y +CONFIG_IPV6_PIMSM_V2=y +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NF_CONNTRACK is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +CONFIG_NETFILTER_XT_TARGET_HL=m +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +# CONFIG_NETFILTER_XT_TARGET_LOG is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +CONFIG_NETFILTER_XT_MATCH_ECN=m +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +CONFIG_NETFILTER_XT_MATCH_HL=m +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +CONFIG_IP_VS=m +# CONFIG_IP_VS_IPV6 is not set +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +# CONFIG_IP_VS_PROTO_TCP is not set +# CONFIG_IP_VS_PROTO_UDP is not set +# CONFIG_IP_VS_PROTO_AH_ESP is not set +# CONFIG_IP_VS_PROTO_ESP is not set +# CONFIG_IP_VS_PROTO_AH is not set +# CONFIG_IP_VS_PROTO_SCTP is not set + +# +# IPVS scheduler +# +# CONFIG_IP_VS_RR is not set +# CONFIG_IP_VS_WRR is not set +# CONFIG_IP_VS_LC is not set +# CONFIG_IP_VS_WLC is not set +# CONFIG_IP_VS_LBLC is not set +# CONFIG_IP_VS_LBLCR is not set +# CONFIG_IP_VS_DH is not set +# CONFIG_IP_VS_SH is not set +# CONFIG_IP_VS_SED is not set +# CONFIG_IP_VS_NQ is not set + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS application helper +# + +# +# IP: Netfilter Configuration +# +# CONFIG_NF_DEFRAG_IPV4 is not set +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_RPFILTER=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_SECURITY=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_DEFRAG_IPV6 is not set +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RPFILTER=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_SECURITY=m +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_L2TP=m +CONFIG_L2TP_DEBUGFS=m +# CONFIG_L2TP_V3 is not set +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +# CONFIG_BRIDGE_VLAN_FILTERING is not set +CONFIG_HAVE_NET_DSA=y +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +# CONFIG_VLAN_8021Q_MVRP is not set +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +CONFIG_PHONET=m +CONFIG_IEEE802154=m +CONFIG_IEEE802154_6LOWPAN=m +CONFIG_MAC802154=m +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +CONFIG_NET_SCH_HTB=y +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFB is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_DRR is not set +# CONFIG_NET_SCH_MQPRIO is not set +# CONFIG_NET_SCH_CHOKE is not set +# CONFIG_NET_SCH_QFQ is not set +CONFIG_NET_SCH_CODEL=y +CONFIG_NET_SCH_FQ_CODEL=y +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_PLUG is not set + +# +# Classification +# +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +CONFIG_NET_CLS_CGROUP=m +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_CLS_ACT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +CONFIG_BATMAN_ADV=m +CONFIG_BATMAN_ADV_BLA=y +# CONFIG_BATMAN_ADV_DAT is not set +# CONFIG_BATMAN_ADV_NC is not set +# CONFIG_BATMAN_ADV_DEBUG is not set +CONFIG_OPENVSWITCH=m +CONFIG_OPENVSWITCH_GRE=y +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_MMAP is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_NET_MPLS_GSO is not set +CONFIG_NETPRIO_CGROUP=m +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_JIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_LEDS is not set +# CONFIG_CAN_AT91 is not set +CONFIG_CAN_MCP251X=m +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_SJA1000 is not set +CONFIG_CAN_C_CAN=m +CONFIG_CAN_C_CAN_PLATFORM=m +# CONFIG_CAN_CC770 is not set + +# +# CAN USB interfaces +# +CONFIG_CAN_EMS_USB=m +CONFIG_CAN_ESD_USB2=m +# CONFIG_CAN_KVASER_USB is not set +CONFIG_CAN_PEAK_USB=m +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_SOFTING is not set +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_IRDA=m + +# +# IrDA protocols +# +CONFIG_IRLAN=m +# CONFIG_IRNET is not set +CONFIG_IRCOMM=m +CONFIG_IRDA_ULTRA=y + +# +# IrDA options +# +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_FAST_RR=y +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +CONFIG_IRTTY_SIR=m + +# +# Dongle support +# +CONFIG_DONGLE=y +CONFIG_ESI_DONGLE=m +CONFIG_ACTISYS_DONGLE=m +CONFIG_TEKRAM_DONGLE=m +CONFIG_TOIM3232_DONGLE=m +CONFIG_LITELINK_DONGLE=m +CONFIG_MA600_DONGLE=m +CONFIG_GIRBIL_DONGLE=m +CONFIG_MCP2120_DONGLE=m +CONFIG_OLD_BELKIN_DONGLE=m +CONFIG_ACT200L_DONGLE=m +CONFIG_KINGSUN_DONGLE=m +CONFIG_KSDAZZLE_DONGLE=m +CONFIG_KS959_DONGLE=m + +# +# FIR device drivers +# +CONFIG_USB_IRDA=m +# CONFIG_SIGMATEL_FIR is not set +CONFIG_MCS_FIR=m +CONFIG_BT=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIUART_3WIRE=y +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIBFUSB=m +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +CONFIG_BT_ATH3K=m +# CONFIG_BT_WILINK is not set +CONFIG_AF_RXRPC=m +# CONFIG_AF_RXRPC_DEBUG is not set +# CONFIG_RXKAD is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CFG80211_INTERNAL_REGDB=y +CONFIG_CFG80211_WEXT=y +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_WEP=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_CRYPT_TKIP=m +# CONFIG_LIB80211_DEBUG is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_PID=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_DEFAULT_PID=y +# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set +CONFIG_MAC80211_RC_DEFAULT="pid" +CONFIG_MAC80211_MESH=y +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_WIMAX=m +CONFIG_WIMAX_DEBUG_LEVEL=8 +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_REGULATOR=m +CONFIG_RFKILL_GPIO=m +CONFIG_NET_9P=m +CONFIG_NET_9P_VIRTIO=m +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +CONFIG_CEPH_LIB=m +# CONFIG_CEPH_LIB_PRETTYDEBUG is not set +# CONFIG_CEPH_LIB_USE_DNS_RESOLVER is not set +CONFIG_NFC=m +CONFIG_NFC_NCI=m +# CONFIG_NFC_NCI_SPI is not set +CONFIG_NFC_HCI=m +CONFIG_NFC_SHDLC=y + +# +# Near Field Communication (NFC) devices +# +CONFIG_NFC_PN533=m +# CONFIG_NFC_WILINK is not set +# CONFIG_NFC_SIM is not set +# CONFIG_NFC_PN544 is not set +# CONFIG_NFC_MICROREAD is not set +CONFIG_HAVE_BPF_JIT=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_DMA_SHARED_BUFFER=y + +# +# Bus devices +# +CONFIG_OMAP_OCP2SCP=y +CONFIG_OMAP_INTERCONNECT=y +# CONFIG_ARM_CCI is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PHYSMAP_OF is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +CONFIG_MTD_NAND_ECC=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_ECC_BCH is not set +# CONFIG_MTD_SM_COMMON is not set +# CONFIG_MTD_NAND_DENALI is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_OMAP2=y +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_DOCG4 is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +CONFIG_MTD_ONENAND=y +CONFIG_MTD_ONENAND_VERIFY_WRITE=y +# CONFIG_MTD_ONENAND_GENERIC is not set +# CONFIG_MTD_ONENAND_OTP is not set +# CONFIG_MTD_ONENAND_2X_PROGRAM is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_FASTMAP=y +# CONFIG_MTD_UBI_GLUEBI is not set +CONFIG_DTC=y +CONFIG_OF=y + +# +# Device Tree and Open Firmware support +# +CONFIG_PROC_DEVICETREE=y +# CONFIG_OF_SELFTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_MTD=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +# CONFIG_VIRTIO_BLK is not set +# CONFIG_BLK_DEV_RBD is not set + +# +# Misc devices +# +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_ATMEL_PWM is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ATMEL_SSC is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_BMP085_I2C is not set +# CONFIG_BMP085_SPI is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=y +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +CONFIG_EEPROM_93CX6=y +# CONFIG_EEPROM_93XX46 is not set + +# +# Texas Instruments shared transport line discipline +# +CONFIG_TI_ST=m +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +CONFIG_SCSI_VIRTIO=m +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +# CONFIG_BCACHE is not set +# CONFIG_BLK_DEV_DM is not set +# CONFIG_TARGET_CORE is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_TUN=y +# CONFIG_VETH is not set +# CONFIG_VIRTIO_NET is not set +# CONFIG_NLMON is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set +CONFIG_ETHERNET=y +CONFIG_NET_VENDOR_ARC=y +# CONFIG_ARC_EMAC is not set +CONFIG_NET_CADENCE=y +# CONFIG_ARM_AT91_ETHER is not set +# CONFIG_MACB is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_NET_CALXEDA_XGMAC is not set +CONFIG_NET_VENDOR_CIRRUS=y +# CONFIG_CS89x0 is not set +# CONFIG_DM9000 is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_FARADAY=y +# CONFIG_FTMAC100 is not set +# CONFIG_FTGMAC100 is not set +CONFIG_NET_VENDOR_INTEL=y +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +CONFIG_KS8851=y +CONFIG_KS8851_MLL=y +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +CONFIG_NET_VENDOR_NATSEMI=y +CONFIG_NET_VENDOR_8390=y +# CONFIG_AX88796 is not set +# CONFIG_ETHOC is not set +# CONFIG_SH_ETH is not set +CONFIG_NET_VENDOR_SEEQ=y +CONFIG_NET_VENDOR_SMSC=y +CONFIG_SMC91X=y +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y +# CONFIG_SMSC911X_ARCH_HOOKS is not set +CONFIG_NET_VENDOR_STMICRO=y +# CONFIG_STMMAC_ETH is not set +CONFIG_NET_VENDOR_TI=y +CONFIG_TI_DAVINCI_MDIO=y +CONFIG_TI_DAVINCI_CPDMA=y +CONFIG_TI_CPSW=y +# CONFIG_TI_CPTS is not set +# CONFIG_NET_VENDOR_VIA is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +CONFIG_AT803X_PHY=y +# CONFIG_AMD_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +CONFIG_SMSC_PHY=y +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_MDIO_BUS_MUX=m +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MMIOREG=m +# CONFIG_MICREL_KS8995MA is not set +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOE=m +CONFIG_PPTP=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +# CONFIG_PPP_SYNC_TTY is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_RTL8152 is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SMSC75XX is not set +CONFIG_USB_NET_SMSC95XX=y +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=y +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET=y +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_KC2190=y +CONFIG_USB_NET_ZAURUS=y +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_CDC_PHONET is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +CONFIG_WLAN=y +# CONFIG_LIBERTAS_THINFIRM is not set +CONFIG_AT76C50X_USB=m +CONFIG_USB_ZD1201=m +CONFIG_USB_NET_RNDIS_WLAN=m +CONFIG_RTL8187=m +CONFIG_RTL8187_LEDS=y +# CONFIG_MAC80211_HWSIM is not set +CONFIG_ATH_COMMON=m +CONFIG_ATH_CARDS=m +# CONFIG_ATH_DEBUG is not set +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m +CONFIG_ATH9K_BTCOEX_SUPPORT=y +CONFIG_ATH9K=m +# CONFIG_ATH9K_AHB is not set +# CONFIG_ATH9K_DEBUGFS is not set +# CONFIG_ATH9K_LEGACY_RATE_CONTROL is not set +CONFIG_ATH9K_RFKILL=y +# CONFIG_ATH9K_HTC is not set +CONFIG_CARL9170=m +CONFIG_CARL9170_LEDS=y +# CONFIG_CARL9170_DEBUGFS is not set +CONFIG_CARL9170_WPC=y +# CONFIG_CARL9170_HWRNG is not set +CONFIG_ATH6KL=m +# CONFIG_ATH6KL_SDIO is not set +CONFIG_ATH6KL_USB=m +# CONFIG_ATH6KL_DEBUG is not set +CONFIG_AR5523=m +# CONFIG_ATH10K is not set +CONFIG_B43=m +CONFIG_B43_SSB=y +CONFIG_B43_SDIO=y +CONFIG_B43_PIO=y +CONFIG_B43_PHY_N=y +CONFIG_B43_PHY_LP=y +CONFIG_B43_LEDS=y +CONFIG_B43_HWRNG=y +# CONFIG_B43_DEBUG is not set +# CONFIG_B43LEGACY is not set +# CONFIG_BRCMFMAC is not set +CONFIG_HOSTAP=m +CONFIG_HOSTAP_FIRMWARE=y +# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_USB=m +CONFIG_LIBERTAS_SDIO=m +CONFIG_LIBERTAS_SPI=m +CONFIG_LIBERTAS_DEBUG=y +# CONFIG_LIBERTAS_MESH is not set +CONFIG_P54_COMMON=m +CONFIG_P54_USB=m +CONFIG_P54_SPI=m +CONFIG_P54_SPI_DEFAULT_EEPROM=y +CONFIG_P54_LEDS=y +CONFIG_RT2X00=m +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT33XX=y +CONFIG_RT2800USB_RT35XX=y +# CONFIG_RT2800USB_RT3573 is not set +CONFIG_RT2800USB_RT53XX=y +# CONFIG_RT2800USB_RT55XX is not set +# CONFIG_RT2800USB_UNKNOWN is not set +CONFIG_RT2800_LIB=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_LIB_DEBUGFS is not set +# CONFIG_RT2X00_DEBUG is not set +# CONFIG_RTL_CARDS is not set +CONFIG_WL_TI=y +CONFIG_WL1251=m +CONFIG_WL1251_SPI=m +CONFIG_WL1251_SDIO=m +CONFIG_WL12XX=m +CONFIG_WL18XX=m +CONFIG_WLCORE=m +CONFIG_WLCORE_SPI=m +CONFIG_WLCORE_SDIO=m +# CONFIG_WILINK_PLATFORM_DATA is not set +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +CONFIG_MWIFIEX=m +# CONFIG_MWIFIEX_SDIO is not set +CONFIG_MWIFIEX_USB=m +# CONFIG_CW1200 is not set + +# +# WiMAX Wireless Broadband devices +# +# CONFIG_WIMAX_I2400M_USB is not set +# CONFIG_WAN is not set +# CONFIG_IEEE802154_DRIVERS is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_JOYDEV=y +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +CONFIG_KEYBOARD_TWL4030=y +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=y +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=y +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +CONFIG_TOUCHSCREEN_MMS114=m +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +CONFIG_TOUCHSCREEN_EDT_FT5X06=m +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +CONFIG_TOUCHSCREEN_TI_AM335X_TSC=y +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +CONFIG_TOUCHSCREEN_TSC2005=y +CONFIG_TOUCHSCREEN_TSC2007=y +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_MPU3050 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_TILT_POLLED is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_TWL4030_PWRBUTTON=y +# CONFIG_INPUT_TWL4030_VIBRA is not set +CONFIG_INPUT_UINPUT=m +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +CONFIG_INPUT_GPIO_ROTARY_ENCODER=m +CONFIG_INPUT_ADXL34X=m +CONFIG_INPUT_ADXL34X_I2C=m +CONFIG_INPUT_ADXL34X_SPI=m +# CONFIG_INPUT_IMS_PCU is not set +CONFIG_INPUT_CMA3000=m +CONFIG_INPUT_CMA3000_I2C=m + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_OLPC_APSP is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +# CONFIG_VT is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVKMEM=y + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +# CONFIG_SERIAL_8250_CONSOLE is not set +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set +# CONFIG_SERIAL_8250_DW is not set +# CONFIG_SERIAL_8250_EM is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_OF_PLATFORM is not set +CONFIG_SERIAL_OMAP=y +CONFIG_SERIAL_OMAP_CONSOLE=y +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_ST_ASC is not set +CONFIG_TTY_PRINTK=y +# CONFIG_HVC_DCC is not set +# CONFIG_VIRTIO_CONSOLE is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_ATMEL is not set +CONFIG_HW_RANDOM_OMAP=y +# CONFIG_HW_RANDOM_VIRTIO is not set +# CONFIG_HW_RANDOM_EXYNOS is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +CONFIG_I2C_MUX_GPIO=y +CONFIG_I2C_MUX_PCA9541=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_MUX_PINCTRL=m +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_OMAP=y +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_FSL_DSPI is not set +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_OMAP24XX=y +# CONFIG_SPI_TI_QSPI is not set +# CONFIG_SPI_PXA2XX_PCI is not set +CONFIG_SPI_SC18IS602=m +CONFIG_SPI_XCOMM=m +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_HSI is not set + +# +# PPS support +# +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +CONFIG_PPS_CLIENT_LDISC=y +CONFIG_PPS_CLIENT_GPIO=y + +# +# PPS generators support +# + +# +# PTP clock support +# +# CONFIG_PTP_1588_CLOCK is not set + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PINCTRL=y + +# +# Pin controllers +# +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIO_DEVRES=y +CONFIG_GPIOLIB=y +CONFIG_OF_GPIO=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y + +# +# Memory mapped GPIO drivers: +# +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_EM is not set +# CONFIG_GPIO_RCAR is not set +# CONFIG_GPIO_TS5500 is not set +# CONFIG_GPIO_GRGPIO is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCF857X=y +# CONFIG_GPIO_SX150X is not set +CONFIG_GPIO_TWL4030=y +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_74X164 is not set + +# +# AC97 GPIO expanders: +# + +# +# LPC GPIO expanders: +# + +# +# MODULbus GPIO expanders: +# + +# +# USB GPIO expanders: +# +CONFIG_W1=y +CONFIG_W1_CON=y + +# +# 1-wire Bus Masters +# +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_DS2482=m +CONFIG_W1_MASTER_DS1WM=m +CONFIG_W1_MASTER_GPIO=y +CONFIG_HDQ_MASTER_OMAP=m + +# +# 1-wire Slaves +# +CONFIG_W1_SLAVE_THERM=y +CONFIG_W1_SLAVE_SMEM=y +CONFIG_W1_SLAVE_DS2408=m +CONFIG_W1_SLAVE_DS2408_READBACK=y +# CONFIG_W1_SLAVE_DS2413 is not set +CONFIG_W1_SLAVE_DS2423=m +CONFIG_W1_SLAVE_DS2431=m +CONFIG_W1_SLAVE_DS2433=m +CONFIG_W1_SLAVE_DS2433_CRC=y +CONFIG_W1_SLAVE_DS2760=m +CONFIG_W1_SLAVE_DS2780=m +CONFIG_W1_SLAVE_DS2781=m +CONFIG_W1_SLAVE_DS28E04=m +CONFIG_W1_SLAVE_BQ27000=m +# CONFIG_POWER_SUPPLY is not set +# CONFIG_POWER_AVS is not set +# CONFIG_HWMON is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_CPU_THERMAL=y +# CONFIG_THERMAL_EMULATION is not set + +# +# Texas Instruments thermal drivers +# +CONFIG_TI_SOC_THERMAL=y +CONFIG_TI_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +CONFIG_OMAP_WATCHDOG=y +# CONFIG_TWL4030_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MEN_A21_WDT is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +CONFIG_SSB=m +CONFIG_SSB_BLOCKIO=y +CONFIG_SSB_SDIOHOST_POSSIBLE=y +CONFIG_SSB_SDIOHOST=y +# CONFIG_SSB_SILENT is not set +# CONFIG_SSB_DEBUG is not set +# CONFIG_SSB_DRIVER_GPIO is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_AS3711 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_CROS_EC is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +# CONFIG_MFD_SYSCON is not set +CONFIG_MFD_TI_AM335X_TSCADC=y +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65090 is not set +CONFIG_MFD_TPS65217=y +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +CONFIG_TWL4030_CORE=y +# CONFIG_TWL4030_MADC is not set +CONFIG_TWL4030_POWER=y +# CONFIG_MFD_TWL4030_AUDIO is not set +# CONFIG_TWL6040_CORE is not set +CONFIG_MFD_WL1273_CORE=m +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_VEXPRESS_CONFIG is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_DUMMY=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_FAN53555 is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_TI_ABB is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +CONFIG_REGULATOR_TPS65217=y +# CONFIG_REGULATOR_TPS6524X is not set +# CONFIG_REGULATOR_TWL4030 is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_RC_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_ADV_DEBUG=y +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_TUNER=m +CONFIG_V4L2_MEM2MEM_DEV=m +CONFIG_VIDEOBUF_GEN=y +CONFIG_VIDEOBUF_VMALLOC=m +CONFIG_VIDEOBUF_DVB=m +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_VMALLOC=m +# CONFIG_VIDEO_V4L2_INT_DEVICE is not set +CONFIG_DVB_CORE=y +CONFIG_DVB_NET=y +CONFIG_TTPCI_EEPROM=m +CONFIG_DVB_MAX_ADAPTERS=8 +CONFIG_DVB_DYNAMIC_MINORS=y + +# +# Media drivers +# +CONFIG_RC_CORE=y +CONFIG_RC_MAP=m +CONFIG_RC_DECODERS=y +CONFIG_LIRC=m +CONFIG_IR_LIRC_CODEC=m +CONFIG_IR_NEC_DECODER=m +CONFIG_IR_RC5_DECODER=m +CONFIG_IR_RC6_DECODER=m +CONFIG_IR_JVC_DECODER=m +CONFIG_IR_SONY_DECODER=m +CONFIG_IR_RC5_SZ_DECODER=m +CONFIG_IR_SANYO_DECODER=m +CONFIG_IR_MCE_KBD_DECODER=m +CONFIG_RC_DEVICES=y +CONFIG_RC_ATI_REMOTE=m +CONFIG_IR_IMON=m +CONFIG_IR_MCEUSB=m +CONFIG_IR_REDRAT3=m +CONFIG_IR_STREAMZAP=m +CONFIG_IR_IGUANA=m +CONFIG_IR_TTUSBIR=m +CONFIG_RC_LOOPBACK=m +CONFIG_IR_GPIO_CIR=m +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +CONFIG_USB_M5602=m +CONFIG_USB_STV06XX=m +CONFIG_USB_GL860=m +CONFIG_USB_GSPCA_BENQ=m +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_CPIA1=m +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +CONFIG_USB_GSPCA_JEILINJ=m +CONFIG_USB_GSPCA_JL2005BCD=m +CONFIG_USB_GSPCA_KINECT=m +CONFIG_USB_GSPCA_KONICA=m +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_MR97310A=m +CONFIG_USB_GSPCA_NW80X=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +CONFIG_USB_GSPCA_OV534_9=m +CONFIG_USB_GSPCA_PAC207=m +CONFIG_USB_GSPCA_PAC7302=m +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SE401=m +CONFIG_USB_GSPCA_SN9C2028=m +CONFIG_USB_GSPCA_SN9C20X=m +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_SPCA1528=m +CONFIG_USB_GSPCA_SQ905=m +CONFIG_USB_GSPCA_SQ905C=m +CONFIG_USB_GSPCA_SQ930X=m +CONFIG_USB_GSPCA_STK014=m +# CONFIG_USB_GSPCA_STK1135 is not set +CONFIG_USB_GSPCA_STV0680=m +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TOPRO=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_VICAM=m +CONFIG_USB_GSPCA_XIRLINK_CIT=m +CONFIG_USB_GSPCA_ZC3XX=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +CONFIG_VIDEO_CPIA2=m +CONFIG_USB_ZR364XX=m +CONFIG_USB_STKWEBCAM=m +CONFIG_USB_S2255=m +CONFIG_USB_SN9C102=m +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_PVRUSB2_SYSFS=y +CONFIG_VIDEO_PVRUSB2_DVB=y +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_HDPVR=m +CONFIG_VIDEO_TLG2300=m +CONFIG_VIDEO_USBVISION=m +# CONFIG_VIDEO_STK1160_COMMON is not set + +# +# Analog/digital TV USB devices +# +CONFIG_VIDEO_AU0828=m +CONFIG_VIDEO_AU0828_V4L2=y +CONFIG_VIDEO_CX231XX=m +CONFIG_VIDEO_CX231XX_RC=y +CONFIG_VIDEO_CX231XX_ALSA=m +CONFIG_VIDEO_CX231XX_DVB=m +CONFIG_VIDEO_TM6000=m +CONFIG_VIDEO_TM6000_ALSA=m +CONFIG_VIDEO_TM6000_DVB=m + +# +# Digital TV USB devices +# +CONFIG_DVB_USB=m +# CONFIG_DVB_USB_DEBUG is not set +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_DIBUSB_MB=m +CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_CXUSB=m +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_VP7045=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +CONFIG_DVB_USB_PCTV452E=m +CONFIG_DVB_USB_DW2102=m +CONFIG_DVB_USB_CINERGY_T2=m +CONFIG_DVB_USB_DTV5100=m +CONFIG_DVB_USB_FRIIO=m +CONFIG_DVB_USB_AZ6027=m +CONFIG_DVB_USB_TECHNISAT_USB2=m +CONFIG_DVB_USB_V2=m +CONFIG_DVB_USB_AF9015=m +CONFIG_DVB_USB_AF9035=m +CONFIG_DVB_USB_ANYSEE=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_AZ6007=m +CONFIG_DVB_USB_CE6230=m +CONFIG_DVB_USB_EC168=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_IT913X=m +CONFIG_DVB_USB_LME2510=m +CONFIG_DVB_USB_MXL111SF=m +CONFIG_DVB_USB_RTL28XXU=m +# CONFIG_SMS_USB_DRV is not set +CONFIG_DVB_B2C2_FLEXCOP_USB=m +# CONFIG_DVB_B2C2_FLEXCOP_USB_DEBUG is not set + +# +# Webcam, TV (analog/digital) USB devices +# +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_EM28XX_DVB=m +CONFIG_VIDEO_EM28XX_RC=m +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_TIMBERDALE is not set +CONFIG_SOC_CAMERA=y +CONFIG_SOC_CAMERA_PLATFORM=y +# CONFIG_VIDEO_RCAR_VIN is not set +# CONFIG_VIDEO_SH_MOBILE_CSI2 is not set +# CONFIG_VIDEO_SH_MOBILE_CEU is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +# CONFIG_VIDEO_SH_VEU is not set +# CONFIG_VIDEO_RENESAS_VSP1 is not set +CONFIG_V4L_TEST_DRIVERS=y +CONFIG_VIDEO_VIVI=m +CONFIG_VIDEO_MEM2MEM_TESTDEV=m + +# +# Supported MMC/SDIO adapters +# +# CONFIG_SMS_SDIO_DRV is not set +CONFIG_RADIO_ADAPTERS=y +CONFIG_RADIO_SI470X=y +CONFIG_USB_SI470X=m +CONFIG_I2C_SI470X=m +CONFIG_USB_MR800=m +CONFIG_USB_DSBR=m +# CONFIG_RADIO_SHARK is not set +CONFIG_RADIO_SHARK2=m +CONFIG_I2C_SI4713=m +CONFIG_RADIO_SI4713=m +CONFIG_USB_KEENE=m +# CONFIG_USB_MA901 is not set +CONFIG_RADIO_TEA5764=m +CONFIG_RADIO_SAA7706H=m +CONFIG_RADIO_TEF6862=m +CONFIG_RADIO_WL1273=m + +# +# Texas Instruments WL128x FM driver (ST based) +# +CONFIG_RADIO_WL128X=m +CONFIG_VIDEO_CX2341X=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_CYPRESS_FIRMWARE=m +CONFIG_DVB_B2C2_FLEXCOP=m + +# +# Media ancillary drivers (tuners, sensors, i2c, frontends) +# +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y +CONFIG_MEDIA_ATTACH=y +CONFIG_VIDEO_IR_I2C=y + +# +# Audio decoders, processors and mixers +# +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_WM8775=m + +# +# RDS decoders +# + +# +# Video decoders +# +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_TVP5150=m + +# +# Video and audio decoders +# +CONFIG_VIDEO_CX25840=m + +# +# Video encoders +# + +# +# Camera sensor devices +# +CONFIG_VIDEO_MT9V011=m + +# +# Flash devices +# + +# +# Video improvement chips +# + +# +# Miscelaneous helper chips +# + +# +# Sensors used on soc_camera driver +# + +# +# soc_camera sensor drivers +# +# CONFIG_SOC_CAMERA_IMX074 is not set +CONFIG_SOC_CAMERA_MT9M001=y +CONFIG_SOC_CAMERA_MT9M111=y +CONFIG_SOC_CAMERA_MT9T031=y +CONFIG_SOC_CAMERA_MT9T112=y +CONFIG_SOC_CAMERA_MT9V022=y +# CONFIG_SOC_CAMERA_OV2640 is not set +# CONFIG_SOC_CAMERA_OV5642 is not set +# CONFIG_SOC_CAMERA_OV6650 is not set +# CONFIG_SOC_CAMERA_OV772X is not set +# CONFIG_SOC_CAMERA_OV9640 is not set +# CONFIG_SOC_CAMERA_OV9740 is not set +# CONFIG_SOC_CAMERA_RJ54N1 is not set +# CONFIG_SOC_CAMERA_TW9910 is not set +CONFIG_MEDIA_TUNER=y +CONFIG_MEDIA_TUNER_SIMPLE=y +CONFIG_MEDIA_TUNER_TDA8290=y +CONFIG_MEDIA_TUNER_TDA827X=y +CONFIG_MEDIA_TUNER_TDA18271=y +CONFIG_MEDIA_TUNER_TDA9887=y +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y +CONFIG_MEDIA_TUNER_MT20XX=y +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=y +CONFIG_MEDIA_TUNER_XC5000=y +CONFIG_MEDIA_TUNER_XC4000=y +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_MC44S803=y +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_R820T=m + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV6110x=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_TDA18271C2DD=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_ZL10039=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_TDA10071=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_CX22702=m +CONFIG_DVB_DRXD=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_AF9013=m +CONFIG_DVB_EC100=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_RTL2830=m +CONFIG_DVB_RTL2832=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +CONFIG_DVB_AU8522_V4L=m +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_S921=m +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_A8293=m +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_IX2505V=m +CONFIG_DVB_IT913X_FE=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_AF9033=m + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set + +# +# Graphics support +# +CONFIG_DRM=y +CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +CONFIG_DRM_I2C_NXP_TDA998X=y +# CONFIG_DRM_EXYNOS is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_RCAR_DU is not set +# CONFIG_DRM_SHMOBILE is not set +# CONFIG_DRM_OMAP is not set +CONFIG_DRM_TILCDC=y +# CONFIG_TEGRA_HOST1X is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y +CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_CFB_REV_PIXELS_IN_BYTE=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +CONFIG_FB_FOREIGN_ENDIAN=y +CONFIG_FB_BOTH_ENDIAN=y +# CONFIG_FB_BIG_ENDIAN is not set +# CONFIG_FB_LITTLE_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_TMIO is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_GOLDFISH is not set +CONFIG_FB_DA8XX=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_AUO_K190X is not set +CONFIG_FB_SIMPLE=y +CONFIG_OMAP2_DSS=m +# CONFIG_OMAP2_DSS_DEBUG is not set +# CONFIG_OMAP2_DSS_DEBUGFS is not set +CONFIG_OMAP2_DSS_DPI=y +CONFIG_OMAP2_DSS_VENC=y +CONFIG_OMAP4_DSS_HDMI=y +CONFIG_OMAP2_DSS_SDI=y +CONFIG_OMAP2_DSS_DSI=y +CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 +CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y +CONFIG_FB_OMAP2=m +CONFIG_FB_OMAP2_DEBUG_SUPPORT=y +CONFIG_FB_OMAP2_NUM_FBS=3 + +# +# OMAP Display Device Drivers (new device model) +# +# CONFIG_DISPLAY_ENCODER_TFP410 is not set +# CONFIG_DISPLAY_ENCODER_TPD12S015 is not set +# CONFIG_DISPLAY_CONNECTOR_DVI is not set +# CONFIG_DISPLAY_CONNECTOR_HDMI is not set +# CONFIG_DISPLAY_CONNECTOR_ANALOG_TV is not set +# CONFIG_DISPLAY_PANEL_DPI is not set +# CONFIG_DISPLAY_PANEL_DSI_CM is not set +# CONFIG_DISPLAY_PANEL_SONY_ACX565AKM is not set +# CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02 is not set +# CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DISPLAY_PANEL_NEC_NL8048HL11 is not set +# CONFIG_EXYNOS_VIDEO is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_L4F00242T03 is not set +# CONFIG_LCD_LMS283GF05 is not set +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI922X is not set +CONFIG_LCD_ILI9320=y +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +CONFIG_LCD_PLATFORM=y +# CONFIG_LCD_S6E63M0 is not set +# CONFIG_LCD_LD9040 is not set +# CONFIG_LCD_AMS369FG06 is not set +# CONFIG_LCD_LMS501KF03 is not set +# CONFIG_LCD_HX8357 is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +CONFIG_BACKLIGHT_LM3630=m +CONFIG_BACKLIGHT_LM3639=m +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_PANDORA is not set +CONFIG_BACKLIGHT_TPS65217=y +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_FB_SSD1307=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_OSS_CORE_PRECLAIM=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_COMPRESS_OFFLOAD=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_HRTIMER=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VERBOSE_PRINTK=y +CONFIG_SND_DEBUG=y +# CONFIG_SND_DEBUG_VERBOSE is not set +# CONFIG_SND_PCM_XRUN_DEBUG is not set +CONFIG_SND_VMASTER=y +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_UA101=m +CONFIG_SND_USB_CAIAQ=m +# CONFIG_SND_USB_CAIAQ_INPUT is not set +CONFIG_SND_USB_6FIRE=m +# CONFIG_SND_USB_HIFACE is not set +CONFIG_SND_SOC=y +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SIMPLE_CARD is not set +# CONFIG_SOUND_PRIME is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HIDRAW is not set +CONFIG_UHID=m +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_HUION is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +CONFIG_HID_LENOVO_TPKBD=m +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +CONFIG_HID_SENSOR_HUB=m + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_DEBUG=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_FUSBH200_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_U132_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_SSB is not set +# CONFIG_USB_HCD_TEST_MODE is not set +CONFIG_USB_MUSB_HDRC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y +# CONFIG_USB_MUSB_TUSB6010 is not set +# CONFIG_USB_MUSB_OMAP2PLUS is not set +# CONFIG_USB_MUSB_AM35X is not set +CONFIG_USB_MUSB_DSPS=y +# CONFIG_USB_MUSB_UX500 is not set +CONFIG_USB_MUSB_AM335X_CHILD=y +CONFIG_USB_TI_CPPI41_DMA=y +# CONFIG_MUSB_PIO_ONLY is not set +# CONFIG_USB_RENESAS_USBHS is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=m +CONFIG_USB_TMC=m + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set + +# +# USB Imaging devices +# +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m +# CONFIG_USB_DWC3 is not set +# CONFIG_USB_CHIPIDEA is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_SIMPLE=m +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_CP210X=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_F81232=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_IUU=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KEYSPAN_MPR=y +CONFIG_USB_SERIAL_KEYSPAN_USA28=y +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y +CONFIG_USB_SERIAL_KEYSPAN_USA19=y +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_METRO=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_OTI6858=m +CONFIG_USB_SERIAL_QCAUX=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_SAFE=m +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_SYMBOL=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SERIAL_WWAN=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_SERIAL_OPTICON=m +# CONFIG_USB_SERIAL_XSENS_MT is not set +# CONFIG_USB_SERIAL_WISHBONE is not set +CONFIG_USB_SERIAL_ZTE=m +CONFIG_USB_SERIAL_SSU100=m +CONFIG_USB_SERIAL_QT2=m +CONFIG_USB_SERIAL_DEBUG=m + +# +# USB Miscellaneous drivers +# +CONFIG_USB_EMI62=m +CONFIG_USB_EMI26=m +CONFIG_USB_ADUTUX=m +CONFIG_USB_SEVSEG=m +CONFIG_USB_RIO500=m +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +CONFIG_USB_LED=m +CONFIG_USB_CYPRESS_CY7C63=m +CONFIG_USB_CYTHERM=m +CONFIG_USB_IDMOUSE=m +CONFIG_USB_FTDI_ELAN=m +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +CONFIG_USB_LD=m +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_IOWARRIOR=m +CONFIG_USB_TEST=m +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +CONFIG_USB_ISIGHTFW=m +CONFIG_USB_YUREX=m +CONFIG_USB_EZUSB_FX2=m +# CONFIG_USB_HSIC_USB3503 is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_OMAP_CONTROL_USB=y +CONFIG_OMAP_USB2=y +# CONFIG_OMAP_USB3 is not set +CONFIG_AM335X_CONTROL_USB=y +CONFIG_AM335X_PHY_USB=y +# CONFIG_SAMSUNG_USB2PHY is not set +# CONFIG_SAMSUNG_USB3PHY is not set +CONFIG_USB_GPIO_VBUS=m +CONFIG_USB_ISP1301=m +# CONFIG_USB_RCAR_PHY is not set +# CONFIG_USB_ULPI is not set +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DEBUG=y +CONFIG_USB_GADGET_DEBUG_FILES=y +CONFIG_USB_GADGET_DEBUG_FS=y +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FUSB300 is not set +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_LIBCOMPOSITE=m +CONFIG_USB_F_ACM=m +CONFIG_USB_F_SS_LB=m +CONFIG_USB_U_SERIAL=m +CONFIG_USB_U_ETHER=m +CONFIG_USB_U_RNDIS=m +CONFIG_USB_F_SERIAL=m +CONFIG_USB_F_OBEX=m +CONFIG_USB_F_NCM=m +CONFIG_USB_F_ECM=m +CONFIG_USB_F_PHONET=m +CONFIG_USB_F_EEM=m +CONFIG_USB_F_SUBSET=m +CONFIG_USB_F_RNDIS=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_PHONET=y +CONFIG_USB_ZERO=m +CONFIG_USB_AUDIO=m +# CONFIG_GADGET_UAC1 is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_FUNCTIONFS_ETH=y +CONFIG_USB_FUNCTIONFS_RNDIS=y +# CONFIG_USB_FUNCTIONFS_GENERIC is not set +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_MIDI_GADGET=m +CONFIG_USB_G_PRINTER=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_USB_G_NOKIA=m +CONFIG_USB_G_ACM_MS=m +CONFIG_USB_G_MULTI=m +CONFIG_USB_G_MULTI_RNDIS=y +# CONFIG_USB_G_MULTI_CDC is not set +CONFIG_USB_G_HID=m +# CONFIG_USB_G_DBGP is not set +CONFIG_USB_G_WEBCAM=m +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y +# CONFIG_MMC_CLKGATE is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +CONFIG_MMC_BLOCK_BOUNCE=y +CONFIG_SDIO_UART=y +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_SDHCI_PXAV3 is not set +# CONFIG_MMC_SDHCI_PXAV2 is not set +CONFIG_MMC_OMAP=y +CONFIG_MMC_OMAP_HS=y +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_LM3530 is not set +CONFIG_LEDS_LM3642=m +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +CONFIG_LEDS_PWM=y +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +CONFIG_LEDS_LM355x=m +# CONFIG_LEDS_OT200 is not set +CONFIG_LEDS_BLINKM=m + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +CONFIG_LEDS_TRIGGER_TRANSIENT=y +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_TWL4030 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_RX4581 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_DS2404 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_OMAP=y +# CONFIG_RTC_DRV_SNVS is not set +# CONFIG_RTC_DRV_MOXART is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +# CONFIG_DW_DMAC_CORE is not set +# CONFIG_DW_DMAC is not set +# CONFIG_TIMB_DMA is not set +CONFIG_TI_EDMA=y +# CONFIG_DMA_OMAP is not set +CONFIG_TI_CPPI41=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_OF=y + +# +# DMA Clients +# +# CONFIG_NET_DMA is not set +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +# CONFIG_AUXDISPLAY is not set +CONFIG_UIO=y +CONFIG_UIO_PDRV_GENIRQ=y +# CONFIG_UIO_DMEM_GENIRQ is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=m + +# +# Virtio drivers +# +# CONFIG_VIRTIO_BALLOON is not set +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +# CONFIG_STAGING is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +CONFIG_COMMON_CLK_DEBUG=y +# CONFIG_COMMON_CLK_SI5351 is not set + +# +# Hardware Spinlock drivers +# +CONFIG_CLKSRC_MMIO=y +# CONFIG_MAILBOX is not set +CONFIG_IOMMU_SUPPORT=y +CONFIG_OF_IOMMU=y +# CONFIG_OMAP_IOMMU is not set + +# +# Remoteproc drivers +# +CONFIG_REMOTEPROC=m +CONFIG_STE_MODEM_RPROC=m + +# +# Rpmsg drivers +# +# CONFIG_PM_DEVFREQ is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +CONFIG_IIO_BUFFER_CB=y +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGERED_BUFFER=y +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 + +# +# Accelerometers +# +# CONFIG_BMA180 is not set +CONFIG_HID_SENSOR_ACCEL_3D=m +CONFIG_IIO_ST_ACCEL_3AXIS=m +CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m +CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m +# CONFIG_KXSD9 is not set + +# +# Analog to digital converters +# +CONFIG_AD_SIGMA_DELTA=m +CONFIG_AD7266=m +# CONFIG_AD7298 is not set +CONFIG_AD7476=m +CONFIG_AD7791=m +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_EXYNOS_ADC is not set +# CONFIG_MAX1363 is not set +# CONFIG_MCP320X is not set +# CONFIG_NAU7802 is not set +# CONFIG_TI_ADC081C is not set +CONFIG_TI_AM335X_ADC=y +# CONFIG_TWL6030_GPADC is not set + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# Hid Sensor IIO Common +# +CONFIG_HID_SENSOR_IIO_COMMON=m +CONFIG_HID_SENSOR_IIO_TRIGGER=m +# CONFIG_HID_SENSOR_ENUM_BASE_QUIRKS is not set +CONFIG_IIO_ST_SENSORS_I2C=m +CONFIG_IIO_ST_SENSORS_SPI=m +CONFIG_IIO_ST_SENSORS_CORE=m + +# +# Digital to analog converters +# +CONFIG_AD5064=m +CONFIG_AD5360=m +CONFIG_AD5380=m +CONFIG_AD5421=m +CONFIG_AD5446=m +# CONFIG_AD5449 is not set +CONFIG_AD5504=m +CONFIG_AD5624R_SPI=m +CONFIG_AD5686=m +CONFIG_AD5755=m +CONFIG_AD5764=m +CONFIG_AD5791=m +# CONFIG_AD7303 is not set +CONFIG_MAX517=m +CONFIG_MCP4725=m + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +CONFIG_AD9523=m + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +CONFIG_ADF4350=m + +# +# Digital gyroscope sensors +# +CONFIG_ADIS16080=m +CONFIG_ADIS16130=m +# CONFIG_ADIS16136 is not set +CONFIG_ADIS16260=m +CONFIG_ADXRS450=m +CONFIG_HID_SENSOR_GYRO_3D=m +CONFIG_IIO_ST_GYRO_3AXIS=m +CONFIG_IIO_ST_GYRO_I2C_3AXIS=m +CONFIG_IIO_ST_GYRO_SPI_3AXIS=m +# CONFIG_ITG3200 is not set + +# +# Inertial measurement units +# +CONFIG_ADIS16400=m +# CONFIG_ADIS16480 is not set +CONFIG_IIO_ADIS_LIB=m +CONFIG_IIO_ADIS_LIB_BUFFER=y +CONFIG_INV_MPU6050_IIO=m + +# +# Light sensors +# +CONFIG_ADJD_S311=m +# CONFIG_APDS9300 is not set +CONFIG_HID_SENSOR_ALS=m +CONFIG_SENSORS_TSL2563=m +CONFIG_VCNL4000=m + +# +# Magnetometer sensors +# +# CONFIG_AK8975 is not set +CONFIG_HID_SENSOR_MAGNETOMETER_3D=m +CONFIG_IIO_ST_MAGN_3AXIS=m +CONFIG_IIO_ST_MAGN_I2C_3AXIS=m +CONFIG_IIO_ST_MAGN_SPI_3AXIS=m + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +CONFIG_IIO_SYSFS_TRIGGER=m + +# +# Pressure sensors +# +# CONFIG_IIO_ST_PRESS is not set + +# +# Temperature sensors +# +# CONFIG_TMP006 is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_PWM_PCA9685=m +CONFIG_PWM_TIECAP=y +CONFIG_PWM_TIEHRPWM=y +CONFIG_PWM_TIPWMSS=y +# CONFIG_PWM_TWL is not set +# CONFIG_PWM_TWL_LED is not set +CONFIG_IRQCHIP=y +# CONFIG_IPACK_BUS is not set +# CONFIG_RESET_CONTROLLER is not set +# CONFIG_FMC is not set + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_DEFAULTS_TO_ORDERED=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +CONFIG_JFS_FS=m +# CONFIG_JFS_POSIX_ACL is not set +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_XFS_FS=m +CONFIG_XFS_QUOTA=y +CONFIG_XFS_POSIX_ACL=y +CONFIG_XFS_RT=y +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +CONFIG_GFS2_FS=m +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +# CONFIG_BTRFS_FS_POSIX_ACL is not set +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +CONFIG_NILFS2_FS=m +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=m +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +CONFIG_QUOTA_TREE=y +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=m +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=m +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_FS_POSIX_ACL=y +CONFIG_JFFS2_FS_SECURITY=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +CONFIG_JFFS2_RUBIN=y +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_LOGFS is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_F2FS_FS=y +CONFIG_F2FS_STAT_FS=y +CONFIG_F2FS_FS_XATTR=y +CONFIG_F2FS_FS_POSIX_ACL=y +# CONFIG_F2FS_FS_SECURITY is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y +# CONFIG_NFS_V4_1 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_SWAP=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_INFO_REDUCED=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +CONFIG_LOCKUP_DETECTOR=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60 +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_SPARSE_RCU_POINTER is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_TRACE is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_RING_BUFFER=y +CONFIG_RING_BUFFER_ALLOW_SWAP=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set + +# +# Runtime Testing +# +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_STRICT_DEVMEM is not set +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_LL=y +CONFIG_DEBUG_OMAP2UART1=y +# CONFIG_DEBUG_OMAP2UART2 is not set +# CONFIG_DEBUG_OMAP2UART3 is not set +# CONFIG_DEBUG_OMAP3UART3 is not set +# CONFIG_DEBUG_OMAP4UART3 is not set +# CONFIG_DEBUG_OMAP3UART4 is not set +# CONFIG_DEBUG_OMAP4UART4 is not set +# CONFIG_DEBUG_TI81XXUART1 is not set +# CONFIG_DEBUG_TI81XXUART2 is not set +# CONFIG_DEBUG_TI81XXUART3 is not set +# CONFIG_DEBUG_AM33XXUART1 is not set +# CONFIG_DEBUG_ZOOM_UART is not set +# CONFIG_DEBUG_ICEDCC is not set +# CONFIG_DEBUG_SEMIHOSTING is not set +# CONFIG_DEBUG_LL_UART_8250 is not set +# CONFIG_DEBUG_LL_UART_PL01X is not set +CONFIG_DEBUG_OMAP2PLUS_UART=y +CONFIG_DEBUG_LL_INCLUDE="debug/omap2plus.S" +# CONFIG_DEBUG_UART_PL01X is not set +# CONFIG_DEBUG_UART_8250 is not set +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_EARLY_PRINTK=y +# CONFIG_PID_IN_CONTEXTIDR is not set + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEYS_DEBUG_PROC_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_YAMA is not set +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_CMAC is not set +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_CRCT10DIF=y +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=y +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +# CONFIG_CRYPTO_SHA1_ARM is not set +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_AES_ARM=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_ZLIB is not set +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_DEV_OMAP_SHAM=y +CONFIG_CRYPTO_DEV_OMAP_AES=y +CONFIG_ASYMMETRIC_KEY_TYPE=m +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m +CONFIG_PUBLIC_KEY_ALGO_RSA=m +CONFIG_X509_CERTIFICATE_PARSER=m +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +# CONFIG_XZ_DEC is not set +# CONFIG_XZ_DEC_BCJ is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_DQL=y +CONFIG_NLATTR=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_AVERAGE=y +CONFIG_CLZ_TAB=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +CONFIG_MPILIB=m +CONFIG_OID_REGISTRY=y +CONFIG_FONT_SUPPORT=m +CONFIG_FONT_8x16=y +CONFIG_FONT_AUTOSELECT=y +CONFIG_VIRTUALIZATION=y diff --git a/kernelconfig b/kernelconfig-3.8.13 index 598a36d..598a36d 100644 --- a/kernelconfig +++ b/kernelconfig-3.8.13 diff --git a/patches/linux-3.12/0001-w1-gpio-Detect-of_gpio_error-for-first-gpio.patch b/patches/linux-3.12/0001-w1-gpio-Detect-of_gpio_error-for-first-gpio.patch new file mode 100644 index 0000000..8093f4f --- /dev/null +++ b/patches/linux-3.12/0001-w1-gpio-Detect-of_gpio_error-for-first-gpio.patch @@ -0,0 +1,39 @@ +From: Markus Pargmann <mpa@pengutronix.de> +Date: Thu, 12 Sep 2013 10:46:32 +0200 +Subject: [PATCH] w1-gpio: Detect of_gpio_error for first gpio + +The first DT gpio is necessary for this driver, but errors returned for +of_get_gpio are ignored. + +This patch adds a return value check for the first of_get_gpio. + +Signed-off-by: Markus Pargmann <mpa@pengutronix.de> +--- + drivers/w1/masters/w1-gpio.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/drivers/w1/masters/w1-gpio.c b/drivers/w1/masters/w1-gpio.c +index f54ece2..ae53e88 100644 +--- a/drivers/w1/masters/w1-gpio.c ++++ b/drivers/w1/masters/w1-gpio.c +@@ -58,6 +58,7 @@ static int w1_gpio_probe_dt(struct platform_device *pdev) + { + struct w1_gpio_platform_data *pdata = pdev->dev.platform_data; + struct device_node *np = pdev->dev.of_node; ++ int gpio; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) +@@ -66,7 +67,11 @@ static int w1_gpio_probe_dt(struct platform_device *pdev) + if (of_get_property(np, "linux,open-drain", NULL)) + pdata->is_open_drain = 1; + +- pdata->pin = of_get_gpio(np, 0); ++ gpio = of_get_gpio(np, 0); ++ if (gpio < 0) ++ return gpio; ++ pdata->pin = gpio; ++ + pdata->ext_pullup_enable_pin = of_get_gpio(np, 1); + pdev->dev.platform_data = pdata; + diff --git a/patches/linux-3.12/0002-w1-gpio-Use-devm_-functions.patch b/patches/linux-3.12/0002-w1-gpio-Use-devm_-functions.patch new file mode 100644 index 0000000..126b019 --- /dev/null +++ b/patches/linux-3.12/0002-w1-gpio-Use-devm_-functions.patch @@ -0,0 +1,82 @@ +From: Markus Pargmann <mpa@pengutronix.de> +Date: Thu, 12 Sep 2013 11:00:00 +0200 +Subject: [PATCH] w1-gpio: Use devm_* functions + +Signed-off-by: Markus Pargmann <mpa@pengutronix.de> +--- + drivers/w1/masters/w1-gpio.c | 28 +++++++++------------------- + 1 file changed, 9 insertions(+), 19 deletions(-) + +diff --git a/drivers/w1/masters/w1-gpio.c b/drivers/w1/masters/w1-gpio.c +index ae53e88..264ad1c 100644 +--- a/drivers/w1/masters/w1-gpio.c ++++ b/drivers/w1/masters/w1-gpio.c +@@ -99,25 +99,27 @@ static int w1_gpio_probe(struct platform_device *pdev) + return -ENXIO; + } + +- master = kzalloc(sizeof(struct w1_bus_master), GFP_KERNEL); ++ master = devm_kzalloc(&pdev->dev, sizeof(struct w1_bus_master), ++ GFP_KERNEL); + if (!master) { + dev_err(&pdev->dev, "Out of memory\n"); + return -ENOMEM; + } + +- err = gpio_request(pdata->pin, "w1"); ++ err = devm_gpio_request(&pdev->dev, pdata->pin, "w1"); + if (err) { + dev_err(&pdev->dev, "gpio_request (pin) failed\n"); +- goto free_master; ++ return err; + } + + if (gpio_is_valid(pdata->ext_pullup_enable_pin)) { +- err = gpio_request_one(pdata->ext_pullup_enable_pin, +- GPIOF_INIT_LOW, "w1 pullup"); ++ err = devm_gpio_request_one(&pdev->dev, ++ pdata->ext_pullup_enable_pin, GPIOF_INIT_LOW, ++ "w1 pullup"); + if (err < 0) { + dev_err(&pdev->dev, "gpio_request_one " + "(ext_pullup_enable_pin) failed\n"); +- goto free_gpio; ++ return err; + } + } + +@@ -135,7 +137,7 @@ static int w1_gpio_probe(struct platform_device *pdev) + err = w1_add_master_device(master); + if (err) { + dev_err(&pdev->dev, "w1_add_master device failed\n"); +- goto free_gpio_ext_pu; ++ return err; + } + + if (pdata->enable_external_pullup) +@@ -147,16 +149,6 @@ static int w1_gpio_probe(struct platform_device *pdev) + platform_set_drvdata(pdev, master); + + return 0; +- +- free_gpio_ext_pu: +- if (gpio_is_valid(pdata->ext_pullup_enable_pin)) +- gpio_free(pdata->ext_pullup_enable_pin); +- free_gpio: +- gpio_free(pdata->pin); +- free_master: +- kfree(master); +- +- return err; + } + + static int w1_gpio_remove(struct platform_device *pdev) +@@ -171,8 +163,6 @@ static int w1_gpio_remove(struct platform_device *pdev) + gpio_set_value(pdata->ext_pullup_enable_pin, 0); + + w1_remove_master_device(master); +- gpio_free(pdata->pin); +- kfree(master); + + return 0; + } diff --git a/patches/linux-3.12/0051-regulator-tps65910-Add-backup-battery-regulator.patch b/patches/linux-3.12/0051-regulator-tps65910-Add-backup-battery-regulator.patch new file mode 100644 index 0000000..bb6ed95 --- /dev/null +++ b/patches/linux-3.12/0051-regulator-tps65910-Add-backup-battery-regulator.patch @@ -0,0 +1,132 @@ +From: Markus Pargmann <mpa@pengutronix.de> +Date: Thu, 17 Oct 2013 16:03:40 +0200 +Subject: [PATCH] regulator: tps65910: Add backup battery regulator + +Regulator support for the backup battery charging voltage. + +Signed-off-by: Markus Pargmann <mpa@pengutronix.de> +--- + drivers/regulator/tps65910-regulator.c | 32 ++++++++++++++++++++++++++++++-- + include/linux/mfd/tps65910.h | 3 ++- + 2 files changed, 32 insertions(+), 3 deletions(-) + +diff --git a/drivers/regulator/tps65910-regulator.c b/drivers/regulator/tps65910-regulator.c +index 45c1644..f8616b7 100644 +--- a/drivers/regulator/tps65910-regulator.c ++++ b/drivers/regulator/tps65910-regulator.c +@@ -88,6 +88,11 @@ static const unsigned int VMMC_VSEL_table[] = { + 1800000, 2800000, 3000000, 3300000, + }; + ++/* supported BBCH voltages in microvolts */ ++static const unsigned int VBB_VSEL_table[] = { ++ 3000000, 2520000, 3150000, 5000000, ++}; ++ + struct tps_info { + const char *name; + const char *vin_name; +@@ -183,6 +188,12 @@ static struct tps_info tps65910_regs[] = { + .voltage_table = VMMC_VSEL_table, + .enable_time_us = 100, + }, ++ { ++ .name = "vbb", ++ .vin_name = "vcc7", ++ .n_voltages = ARRAY_SIZE(VBB_VSEL_table), ++ .voltage_table = VBB_VSEL_table, ++ }, + }; + + static struct tps_info tps65911_regs[] = { +@@ -339,6 +350,8 @@ static int tps65910_get_ctrl_register(int id) + return TPS65910_VAUX33; + case TPS65910_REG_VMMC: + return TPS65910_VMMC; ++ case TPS65910_REG_VBB: ++ return TPS65910_BBCH; + default: + return -EINVAL; + } +@@ -528,6 +541,10 @@ static int tps65910_get_voltage_sel(struct regulator_dev *dev) + value &= LDO_SEL_MASK; + value >>= LDO_SEL_SHIFT; + break; ++ case TPS65910_REG_VBB: ++ value &= BBCH_BBSEL_MASK; ++ value >>= BBCH_BBSEL_SHIFT; ++ break; + default: + return -EINVAL; + } +@@ -638,6 +655,9 @@ static int tps65910_set_voltage_sel(struct regulator_dev *dev, + case TPS65910_REG_VMMC: + return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK, + selector << LDO_SEL_SHIFT); ++ case TPS65910_REG_VBB: ++ return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK, ++ selector << BBCH_BBSEL_SHIFT); + } + + return -EINVAL; +@@ -669,6 +689,9 @@ static int tps65911_set_voltage_sel(struct regulator_dev *dev, + case TPS65910_REG_VIO: + return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK, + selector << LDO_SEL_SHIFT); ++ case TPS65910_REG_VBB: ++ return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK, ++ selector << BBCH_BBSEL_SHIFT); + } + + return -EINVAL; +@@ -771,7 +794,7 @@ static struct regulator_ops tps65910_ops = { + .get_voltage_sel = tps65910_get_voltage_sel, + .set_voltage_sel = tps65910_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, +- .map_voltage = regulator_map_voltage_ascend, ++ .map_voltage = regulator_map_voltage_iterate, + }; + + static struct regulator_ops tps65911_ops = { +@@ -944,6 +967,7 @@ static struct of_regulator_match tps65910_matches[] = { + { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] }, + { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] }, + { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] }, ++ { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] }, + }; + + static struct of_regulator_match tps65911_matches[] = { +@@ -1167,7 +1191,11 @@ static int tps65910_probe(struct platform_device *pdev) + pmic->desc[i].type = REGULATOR_VOLTAGE; + pmic->desc[i].owner = THIS_MODULE; + pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i); +- pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED; ++ if (tps65910_chip_id(tps65910) == TPS65910 && ++ i == TPS65910_REG_VBB) ++ pmic->desc[i].enable_mask = BBCH_BBCHEN_MASK; ++ else ++ pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED; + + config.dev = tps65910->dev; + config.init_data = reg_data; +diff --git a/include/linux/mfd/tps65910.h b/include/linux/mfd/tps65910.h +index 20e433e..1adeee1 100644 +--- a/include/linux/mfd/tps65910.h ++++ b/include/linux/mfd/tps65910.h +@@ -833,6 +833,7 @@ + #define TPS65910_REG_VAUX2 10 + #define TPS65910_REG_VAUX33 11 + #define TPS65910_REG_VMMC 12 ++#define TPS65910_REG_VBB 13 + + #define TPS65911_REG_VDDCTRL 4 + #define TPS65911_REG_LDO1 5 +@@ -845,7 +846,7 @@ + #define TPS65911_REG_LDO8 12 + + /* Max number of TPS65910/11 regulators */ +-#define TPS65910_NUM_REGS 13 ++#define TPS65910_NUM_REGS 14 + + /* External sleep controls through EN1/EN2/EN3/SLEEP inputs */ + #define TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 0x1 diff --git a/patches/linux-3.12/0052-ARM-dts-regulator-tps65910-node.patch b/patches/linux-3.12/0052-ARM-dts-regulator-tps65910-node.patch new file mode 100644 index 0000000..c8c990e --- /dev/null +++ b/patches/linux-3.12/0052-ARM-dts-regulator-tps65910-node.patch @@ -0,0 +1,24 @@ +From: Markus Pargmann <mpa@pengutronix.de> +Date: Thu, 17 Oct 2013 16:07:26 +0200 +Subject: [PATCH] ARM: dts: regulator tps65910 node + +Signed-off-by: Markus Pargmann <mpa@pengutronix.de> +--- + arch/arm/boot/dts/tps65910.dtsi | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/boot/dts/tps65910.dtsi b/arch/arm/boot/dts/tps65910.dtsi +index 92693a8..b0ac665 100644 +--- a/arch/arm/boot/dts/tps65910.dtsi ++++ b/arch/arm/boot/dts/tps65910.dtsi +@@ -82,5 +82,10 @@ + reg = <12>; + regulator-compatible = "vmmc"; + }; ++ ++ vbb_reg: regulator@13 { ++ reg = <13>; ++ regulator-compatible = "vbb"; ++ }; + }; + }; diff --git a/patches/linux-3.12/0101-usb-musb-gadget-stay-IDLE-without-gadget-driver.patch b/patches/linux-3.12/0101-usb-musb-gadget-stay-IDLE-without-gadget-driver.patch new file mode 100644 index 0000000..6c36895 --- /dev/null +++ b/patches/linux-3.12/0101-usb-musb-gadget-stay-IDLE-without-gadget-driver.patch @@ -0,0 +1,56 @@ +From: Markus Pargmann <mpa@pengutronix.de> +Date: Mon, 14 Oct 2013 11:21:03 +0200 +Subject: [PATCH] usb: musb: gadget, stay IDLE without gadget driver + +If there is no gadget driver musb should stay in B_IDLE state. + +Signed-off-by: Markus Pargmann <mpa@pengutronix.de> +--- + drivers/usb/musb/musb_core.c | 3 --- + drivers/usb/musb/musb_gadget.c | 14 ++++++++++++-- + 2 files changed, 12 insertions(+), 5 deletions(-) + +diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c +index cd70cc8..0c59481 100644 +--- a/drivers/usb/musb/musb_core.c ++++ b/drivers/usb/musb/musb_core.c +@@ -831,12 +831,9 @@ b_host: + case OTG_STATE_B_WAIT_ACON: + dev_dbg(musb->controller, "HNP: RESET (%s), to b_peripheral\n", + usb_otg_state_string(musb->xceiv->state)); +- musb->xceiv->state = OTG_STATE_B_PERIPHERAL; + musb_g_reset(musb); + break; + case OTG_STATE_B_IDLE: +- musb->xceiv->state = OTG_STATE_B_PERIPHERAL; +- /* FALLTHROUGH */ + case OTG_STATE_B_PERIPHERAL: + musb_g_reset(musb); + break; +diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c +index 3671898..4d3da1a 100644 +--- a/drivers/usb/musb/musb_gadget.c ++++ b/drivers/usb/musb/musb_gadget.c +@@ -2116,10 +2116,20 @@ __acquires(musb->lock) + * or else after HNP, as A-Device + */ + if (devctl & MUSB_DEVCTL_BDEVICE) { +- musb->xceiv->state = OTG_STATE_B_PERIPHERAL; ++ if (!musb->gadget_driver) { ++ musb->is_active = 0; ++ musb->xceiv->state = OTG_STATE_B_IDLE; ++ } else { ++ musb->xceiv->state = OTG_STATE_B_PERIPHERAL; ++ } + musb->g.is_a_peripheral = 0; + } else { +- musb->xceiv->state = OTG_STATE_A_PERIPHERAL; ++ if (!musb->gadget_driver) { ++ musb->is_active = 0; ++ musb->xceiv->state = OTG_STATE_A_IDLE; ++ } else { ++ musb->xceiv->state = OTG_STATE_A_PERIPHERAL; ++ } + musb->g.is_a_peripheral = 1; + } + diff --git a/patches/linux-3.12/0102-usb-musb-Bugfix-of_node-assignment.patch b/patches/linux-3.12/0102-usb-musb-Bugfix-of_node-assignment.patch new file mode 100644 index 0000000..4450ba3 --- /dev/null +++ b/patches/linux-3.12/0102-usb-musb-Bugfix-of_node-assignment.patch @@ -0,0 +1,56 @@ +From: Markus Pargmann <mpa@pengutronix.de> +Date: Fri, 13 Sep 2013 12:19:16 +0200 +Subject: [PATCH] usb: musb: Bugfix of_node assignment + +It is not safe to assign the of_node to a device without driver. The +device is matched against a list of drivers and the of_node could lead +to a DT match with the parent driver. + +Signed-off-by: Markus Pargmann <mpa@pengutronix.de> +--- + drivers/usb/musb/musb_core.c | 12 +++++++++++- + drivers/usb/musb/musb_dsps.c | 1 - + 2 files changed, 11 insertions(+), 2 deletions(-) + +diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c +index 0c59481..fbd4479 100644 +--- a/drivers/usb/musb/musb_core.c ++++ b/drivers/usb/musb/musb_core.c +@@ -2004,6 +2004,7 @@ static int musb_probe(struct platform_device *pdev) + int irq = platform_get_irq_byname(pdev, "mc"); + struct resource *iomem; + void __iomem *base; ++ int ret; + + iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!iomem || irq <= 0) +@@ -2013,7 +2014,16 @@ static int musb_probe(struct platform_device *pdev) + if (IS_ERR(base)) + return PTR_ERR(base); + +- return musb_init_controller(dev, irq, base); ++ if (dev->parent) ++ dev->of_node = dev->parent->of_node; ++ ++ ret = musb_init_controller(dev, irq, base); ++ if (ret) { ++ dev->of_node = NULL; ++ return ret; ++ } ++ ++ return 0; + } + + static int musb_remove(struct platform_device *pdev) +diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c +index bd4138d..189e52c 100644 +--- a/drivers/usb/musb/musb_dsps.c ++++ b/drivers/usb/musb/musb_dsps.c +@@ -483,7 +483,6 @@ static int dsps_create_musb_pdev(struct dsps_glue *glue, + musb->dev.parent = dev; + musb->dev.dma_mask = &musb_dmamask; + musb->dev.coherent_dma_mask = musb_dmamask; +- musb->dev.of_node = of_node_get(dn); + + glue->musb = musb; + diff --git a/patches/linux-3.12/0103-usb-musb-dsps-debugfs-files.patch b/patches/linux-3.12/0103-usb-musb-dsps-debugfs-files.patch new file mode 100644 index 0000000..fe547c5 --- /dev/null +++ b/patches/linux-3.12/0103-usb-musb-dsps-debugfs-files.patch @@ -0,0 +1,112 @@ +From: Markus Pargmann <mpa@pengutronix.de> +Date: Wed, 11 Sep 2013 16:43:57 +0200 +Subject: [PATCH] usb: musb: dsps, debugfs files + +debugfs files to show the contents of important dsps registers. + +Signed-off-by: Markus Pargmann <mpa@pengutronix.de> +--- + drivers/usb/musb/musb_dsps.c | 55 ++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 55 insertions(+) + +diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c +index 189e52c..0680f0e 100644 +--- a/drivers/usb/musb/musb_dsps.c ++++ b/drivers/usb/musb/musb_dsps.c +@@ -46,6 +46,8 @@ + #include <linux/of_irq.h> + #include <linux/usb/of.h> + ++#include <linux/debugfs.h> ++ + #include "musb_core.h" + + static const struct of_device_id musb_dsps_of_match[]; +@@ -119,6 +121,27 @@ struct dsps_glue { + const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ + struct timer_list timer; /* otg_workaround timer */ + unsigned long last_timer; /* last timer data for each instance */ ++ ++ struct debugfs_regset32 regset; ++ struct dentry *dbgfs_root; ++}; ++ ++static const struct debugfs_reg32 dsps_musb_regs[] = { ++ { "revision", 0x00 }, ++ { "control", 0x14 }, ++ { "status", 0x18 }, ++ { "eoi", 0x24 }, ++ { "intr0_stat", 0x30 }, ++ { "intr1_stat", 0x34 }, ++ { "intr0_set", 0x38 }, ++ { "intr1_set", 0x3c }, ++ { "txmode", 0x70 }, ++ { "rxmode", 0x74 }, ++ { "autoreq", 0xd0 }, ++ { "srpfixtime", 0xd4 }, ++ { "tdown", 0xd8 }, ++ { "phy_utmi", 0xe0 }, ++ { "mode", 0xe8 }, + }; + + /** +@@ -348,6 +371,30 @@ out: + return ret; + } + ++static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) ++{ ++ struct dentry *root; ++ struct dentry *file; ++ char buf[128]; ++ ++ sprintf(buf, "%s.dsps", dev_name(musb->controller)); ++ root = debugfs_create_dir(buf, NULL); ++ if (!root) ++ return -ENOMEM; ++ glue->dbgfs_root = root; ++ ++ glue->regset.regs = dsps_musb_regs; ++ glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); ++ glue->regset.base = musb->ctrl_base; ++ ++ file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); ++ if (!file) { ++ debugfs_remove_recursive(root); ++ return -ENOMEM; ++ } ++ return 0; ++} ++ + static int dsps_musb_init(struct musb *musb) + { + struct device *dev = musb->controller; +@@ -357,6 +404,7 @@ static int dsps_musb_init(struct musb *musb) + void __iomem *reg_base; + struct resource *r; + u32 rev, val; ++ int ret; + + r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); + if (!r) +@@ -390,6 +438,10 @@ static int dsps_musb_init(struct musb *musb) + val &= ~(1 << wrp->otg_disable); + dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); + ++ ret = dsps_musb_dbg_init(musb, glue); ++ if (ret) ++ return ret; ++ + return 0; + } + +@@ -587,6 +639,9 @@ static int dsps_remove(struct platform_device *pdev) + pm_runtime_put(&pdev->dev); + pm_runtime_disable(&pdev->dev); + kfree(glue); ++ ++ debugfs_remove_recursive(glue->dbgfs_root); ++ + return 0; + } + diff --git a/patches/linux-3.12/0104-usb-musb-dsps-use-devm_kzalloc.patch b/patches/linux-3.12/0104-usb-musb-dsps-use-devm_kzalloc.patch new file mode 100644 index 0000000..d8f3d56 --- /dev/null +++ b/patches/linux-3.12/0104-usb-musb-dsps-use-devm_kzalloc.patch @@ -0,0 +1,38 @@ +From: Markus Pargmann <mpa@pengutronix.de> +Date: Wed, 16 Oct 2013 11:47:14 +0200 +Subject: [PATCH] usb: musb: dsps, use devm_kzalloc + +Signed-off-by: Markus Pargmann <mpa@pengutronix.de> +--- + drivers/usb/musb/musb_dsps.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c +index 0680f0e..aae017c 100644 +--- a/drivers/usb/musb/musb_dsps.c ++++ b/drivers/usb/musb/musb_dsps.c +@@ -597,7 +597,7 @@ static int dsps_probe(struct platform_device *pdev) + wrp = match->data; + + /* allocate glue */ +- glue = kzalloc(sizeof(*glue), GFP_KERNEL); ++ glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); + if (!glue) { + dev_err(&pdev->dev, "unable to allocate glue memory\n"); + return -ENOMEM; +@@ -625,7 +625,6 @@ err3: + pm_runtime_put(&pdev->dev); + err2: + pm_runtime_disable(&pdev->dev); +- kfree(glue); + return ret; + } + +@@ -638,7 +637,6 @@ static int dsps_remove(struct platform_device *pdev) + /* disable usbss clocks */ + pm_runtime_put(&pdev->dev); + pm_runtime_disable(&pdev->dev); +- kfree(glue); + + debugfs_remove_recursive(glue->dbgfs_root); + diff --git a/patches/linux-3.12/0105-usb-musb-dsps-OTG-detection.patch b/patches/linux-3.12/0105-usb-musb-dsps-OTG-detection.patch new file mode 100644 index 0000000..42991ae --- /dev/null +++ b/patches/linux-3.12/0105-usb-musb-dsps-OTG-detection.patch @@ -0,0 +1,160 @@ +From: Markus Pargmann <mpa@pengutronix.de> +Date: Wed, 11 Sep 2013 16:49:06 +0200 +Subject: [PATCH] usb: musb: dsps, OTG detection + +The USB Controller does not support ID pin change interrupts. So we have +to use a polling function to detect changes of A/B device state +(otg_timer). This poll function has to check in several states if a +other device type might be connected to the USB port. This check is +triggered by manually starting/stopping a USB Session. + +So in A mode, we cancel the currently running session which also +disables the possibility to detect new devices via interrupt. In B mode, +we start a session to check for ID-Pin and possibly connected devices. + +Whenever a real USB session ends, we have to trigger the otg_timer poll +function again. + +Signed-off-by: Markus Pargmann <mpa@pengutronix.de> +--- + drivers/usb/musb/musb_dsps.c | 82 ++++++++++++++++++++++++++++++++++++++++---- + 1 file changed, 76 insertions(+), 6 deletions(-) + +diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c +index aae017c..b415c37 100644 +--- a/drivers/usb/musb/musb_dsps.c ++++ b/drivers/usb/musb/musb_dsps.c +@@ -144,6 +144,43 @@ static const struct debugfs_reg32 dsps_musb_regs[] = { + { "mode", 0xe8 }, + }; + ++/* ++ * Compare driver and hardware mode and update driver state if necessary. ++ * Not all hardware changes actually reach the driver through interrupts. ++ */ ++static void dsps_update_mode(struct musb *musb) ++{ ++ u8 devctl; ++ ++ devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); ++ ++ switch (musb->xceiv->state) { ++ case OTG_STATE_A_IDLE: ++ if (devctl & MUSB_DEVCTL_BDEVICE) { ++ dev_dbg(musb->controller, "detected controller state B, software state A\n"); ++ musb->xceiv->state = OTG_STATE_B_IDLE; ++ } ++ break; ++ case OTG_STATE_B_IDLE: ++ if (!(devctl & MUSB_DEVCTL_BDEVICE)) { ++ dev_dbg(musb->controller, "detected controller state A, software state B\n"); ++ musb->xceiv->state = OTG_STATE_A_IDLE; ++ } ++ break; ++ default: ++ if (!(devctl & MUSB_DEVCTL_SESSION)) { ++ dev_dbg(musb->controller, "detected controller out of session (%x), software state %s\n", ++ devctl, ++ usb_otg_state_string(musb->xceiv->state)); ++ if (devctl & MUSB_DEVCTL_BDEVICE) ++ musb->xceiv->state = OTG_STATE_B_IDLE; ++ else ++ musb->xceiv->state = OTG_STATE_A_IDLE; ++ } ++ break; ++ } ++} ++ + /** + * dsps_musb_enable - enable interrupts + */ +@@ -195,6 +232,8 @@ static void otg_timer(unsigned long _musb) + u8 devctl; + unsigned long flags; + ++ dsps_update_mode(musb); ++ + /* + * We poll because DSPS IP's won't expose several OTG-critical + * status change events (from the transceiver) otherwise. +@@ -205,6 +244,16 @@ static void otg_timer(unsigned long _musb) + + spin_lock_irqsave(&musb->lock, flags); + switch (musb->xceiv->state) { ++ case OTG_STATE_A_IDLE: ++ case OTG_STATE_A_WAIT_VRISE: ++ /* ++ * Poll the devctl register to know when the controller switches ++ * back to B state. ++ */ ++ musb_writeb(mregs, MUSB_DEVCTL, ++ devctl & (~MUSB_DEVCTL_SESSION)); ++ mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); ++ break; + case OTG_STATE_A_WAIT_BCON: + devctl &= ~MUSB_DEVCTL_SESSION; + dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); +@@ -217,6 +266,8 @@ static void otg_timer(unsigned long _musb) + musb->xceiv->state = OTG_STATE_A_IDLE; + MUSB_HST_MODE(musb); + } ++ mod_timer(&glue->timer, ++ jiffies + wrp->poll_seconds * HZ); + break; + case OTG_STATE_A_WAIT_VFALL: + musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; +@@ -224,12 +275,24 @@ static void otg_timer(unsigned long _musb) + MUSB_INTR_VBUSERROR << wrp->usb_shift); + break; + case OTG_STATE_B_IDLE: ++ /* ++ * There's no ID-changed IRQ, so we have no good way to tell ++ * when to switch to the A-Default state machine (by setting ++ * the DEVCTL.Session bit). ++ * ++ * Workaround: whenever we're in B_IDLE, try setting the ++ * session flag every few seconds. If it works, ID was ++ * grounded and we're now in the A-Default state machine. ++ * ++ * NOTE: setting the session flag is _supposed_ to trigger ++ * SRP but clearly it doesn't. ++ */ ++ musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION); + devctl = dsps_readb(mregs, MUSB_DEVCTL); +- if (devctl & MUSB_DEVCTL_BDEVICE) +- mod_timer(&glue->timer, +- jiffies + wrp->poll_seconds * HZ); +- else ++ if (!(devctl & MUSB_DEVCTL_BDEVICE)) + musb->xceiv->state = OTG_STATE_A_IDLE; ++ mod_timer(&glue->timer, ++ jiffies + wrp->poll_seconds * HZ); + break; + default: + break; +@@ -342,7 +405,6 @@ static irqreturn_t dsps_interrupt(int irq, void *hci) + MUSB_HST_MODE(musb); + musb->xceiv->otg->default_a = 1; + musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; +- del_timer(&glue->timer); + } else { + musb->is_active = 0; + MUSB_DEV_MODE(musb); +@@ -363,8 +425,16 @@ static irqreturn_t dsps_interrupt(int irq, void *hci) + ret |= musb_interrupt(musb); + + /* Poll for ID change */ +- if (musb->xceiv->state == OTG_STATE_B_IDLE) ++ switch (musb->xceiv->state) { ++ case OTG_STATE_A_IDLE: ++ case OTG_STATE_A_WAIT_BCON: ++ case OTG_STATE_A_WAIT_VRISE: ++ case OTG_STATE_B_IDLE: + mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); ++ break; ++ default: ++ break; ++ } + out: + spin_unlock_irqrestore(&musb->lock, flags); + diff --git a/patches/linux-3.12/0106-ARM-dts-am33xx-change-usb-ctrl-module-label.patch b/patches/linux-3.12/0106-ARM-dts-am33xx-change-usb-ctrl-module-label.patch new file mode 100644 index 0000000..bbde15b --- /dev/null +++ b/patches/linux-3.12/0106-ARM-dts-am33xx-change-usb-ctrl-module-label.patch @@ -0,0 +1,43 @@ +From: Markus Pargmann <mpa@pengutronix.de> +Date: Thu, 12 Sep 2013 14:31:52 +0200 +Subject: [PATCH] ARM: dts: am33xx, change usb ctrl module label + +Control module is not usb specific. This patch changes the label to +usb_ctrl_mod. + +Signed-off-by: Markus Pargmann <mpa@pengutronix.de> +--- + arch/arm/boot/dts/am33xx.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index f9c5da9..14510ee 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -346,7 +346,7 @@ + ti,hwmods = "usb_otg_hs"; + status = "disabled"; + +- ctrl_mod: control@44e10000 { ++ usb_ctrl_mod: control@44e10000 { + compatible = "ti,am335x-usb-ctrl-module"; + reg = <0x44e10620 0x10 + 0x44e10648 0x4>; +@@ -359,7 +359,7 @@ + reg = <0x47401300 0x100>; + reg-names = "phy"; + status = "disabled"; +- ti,ctrl_mod = <&ctrl_mod>; ++ ti,ctrl_mod = <&usb_ctrl_mod>; + }; + + usb0: usb@47401000 { +@@ -407,7 +407,7 @@ + reg = <0x47401b00 0x100>; + reg-names = "phy"; + status = "disabled"; +- ti,ctrl_mod = <&ctrl_mod>; ++ ti,ctrl_mod = <&usb_ctrl_mod>; + }; + + usb1: usb@47401800 { diff --git a/patches/linux-3.12/0151-omap-hsmmc-Correct-usage-of-of_find_node_by_name.patch b/patches/linux-3.12/0151-omap-hsmmc-Correct-usage-of-of_find_node_by_name.patch new file mode 100644 index 0000000..922a0d1 --- /dev/null +++ b/patches/linux-3.12/0151-omap-hsmmc-Correct-usage-of-of_find_node_by_name.patch @@ -0,0 +1,30 @@ +From: Pantelis Antoniou <panto@antoniou-consulting.com> +Date: Fri, 26 Oct 2012 15:48:00 +0300 +Subject: [PATCH] omap-hsmmc: Correct usage of of_find_node_by_name + +of_find_node_by_name expect to have the parent node reference taken. +--- + drivers/mmc/host/omap_hsmmc.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c +index 6ac63df..f5b660c 100644 +--- a/drivers/mmc/host/omap_hsmmc.c ++++ b/drivers/mmc/host/omap_hsmmc.c +@@ -1893,6 +1893,16 @@ static int omap_hsmmc_probe(struct platform_device *pdev) + * as we want. */ + mmc->max_segs = 1024; + ++ /* Eventually we should get our max_segs limitation for EDMA by ++ * querying the dmaengine API */ ++ if (pdev->dev.of_node) { ++ struct device_node *parent = of_node_get(pdev->dev.of_node->parent); ++ struct device_node *node; ++ node = of_find_node_by_name(parent, "edma"); ++ if (node) ++ mmc->max_segs = 16; ++ } ++ + mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ + mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ + mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; diff --git a/patches/linux-3.12/0201-ARM-dts-N900-Add-device-tree.patch b/patches/linux-3.12/0201-ARM-dts-N900-Add-device-tree.patch new file mode 100644 index 0000000..dfaac92 --- /dev/null +++ b/patches/linux-3.12/0201-ARM-dts-N900-Add-device-tree.patch @@ -0,0 +1,126 @@ +From: Pavel Machek <pavel@ucw.cz> +Date: Tue, 13 Aug 2013 15:36:36 +0200 +Subject: [PATCH] ARM: dts: N900: Add device tree + +This adds device tree with necessary support to boot with functional +video (on both emulator and real N900 device). + +Signed-off-by: Pavel Machek <pavel@ucw.cz> +Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/omap3-n900.dts | 92 ++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 93 insertions(+) + create mode 100644 arch/arm/boot/dts/omap3-n900.dts + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 802720e..a7cae53 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -172,6 +172,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ + omap3-devkit8000.dtb \ + omap3-beagle-xm.dtb \ + omap3-evm.dtb \ ++ omap3-n900.dtb \ + omap3-tobi.dtb \ + omap3-igep0020.dtb \ + omap3-igep0030.dtb \ +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +new file mode 100644 +index 0000000..d64fa04 +--- /dev/null ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -0,0 +1,92 @@ ++/* ++ * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz> ++ * Copyright 2013 Aaro Koskinen <aaro.koskinen@iki.fi> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 (or later) as ++ * published by the Free Software Foundation. ++ */ ++ ++/dts-v1/; ++ ++#include "omap34xx.dtsi" ++ ++/ { ++ model = "Nokia N900"; ++ compatible = "nokia,omap3-n900", "ti,omap3"; ++ ++ cpus { ++ cpu@0 { ++ cpu0-supply = <&vcc>; ++ }; ++ }; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x80000000 0x10000000>; /* 256 MB */ ++ }; ++ ++}; ++ ++&i2c1 { ++ clock-frequency = <2200000>; ++ ++ twl: twl@48 { ++ reg = <0x48>; ++ interrupts = <7>; /* SYS_NIRQ cascaded to intc */ ++ interrupt-parent = <&intc>; ++ }; ++}; ++ ++#include "twl4030.dtsi" ++ ++&twl_gpio { ++ ti,pullups = <0x0>; ++ ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */ ++}; ++ ++&i2c2 { ++ clock-frequency = <400000>; ++}; ++ ++&i2c3 { ++ clock-frequency = <100000>; ++}; ++ ++&mmc1 { ++ status = "disabled"; ++}; ++ ++&mmc2 { ++ status = "disabled"; ++}; ++ ++&mmc3 { ++ status = "disabled"; ++}; ++ ++&mcspi1 { ++ /* ++ * For some reason, touchscreen is necessary for screen to work at ++ * all on real hw. It works well without it on emulator. ++ * ++ * Also... order in the device tree actually matters here. ++ */ ++ tsc2005@0 { ++ compatible = "tsc2005"; ++ spi-max-frequency = <6000000>; ++ reg = <0>; ++ }; ++ mipid@2 { ++ compatible = "acx565akm"; ++ spi-max-frequency = <6000000>; ++ reg = <2>; ++ }; ++}; ++ ++&usb_otg_hs { ++ interface-type = <0>; ++ usb-phy = <&usb2_phy>; ++ mode = <2>; ++ power = <50>; ++}; diff --git a/patches/linux-3.12/0202-ARM-dts-omap3-igep-add-pinmux-node-for-GPIO-LED-conf.patch b/patches/linux-3.12/0202-ARM-dts-omap3-igep-add-pinmux-node-for-GPIO-LED-conf.patch new file mode 100644 index 0000000..2baaee9 --- /dev/null +++ b/patches/linux-3.12/0202-ARM-dts-omap3-igep-add-pinmux-node-for-GPIO-LED-conf.patch @@ -0,0 +1,36 @@ +From: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Date: Thu, 20 Jun 2013 16:42:30 +0200 +Subject: [PATCH] ARM: dts: omap3-igep: add pinmux node for GPIO LED + configuration + +IGEP boards have a number of LED connected to OMAP or TWL GPIO +lines. The actual wiring is different on each board so each board +DT has need to configure the mux correctly. + +Even though it works with the current DT, the kernel complains with: + +[2.305023] leds-gpio leds.18: pins are not configured from the driver + +Add an empty pinmux_leds_pins pinctrl child node so boards can +override with the correct mux configuration and not depend on +default values for the GPIO LEDs to work. + +Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-igep.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi +index 2326d11..0f92224 100644 +--- a/arch/arm/boot/dts/omap3-igep.dtsi ++++ b/arch/arm/boot/dts/omap3-igep.dtsi +@@ -77,6 +77,8 @@ + 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ + >; + }; ++ ++ leds_pins: pinmux_leds_pins { }; + }; + + &i2c1 { diff --git a/patches/linux-3.12/0203-ARM-dts-omap3-igep0020-add-mux-conf-for-GPIO-LEDs.patch b/patches/linux-3.12/0203-ARM-dts-omap3-igep0020-add-mux-conf-for-GPIO-LEDs.patch new file mode 100644 index 0000000..dfc6df0 --- /dev/null +++ b/patches/linux-3.12/0203-ARM-dts-omap3-igep0020-add-mux-conf-for-GPIO-LEDs.patch @@ -0,0 +1,44 @@ +From: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Date: Thu, 20 Jun 2013 16:42:31 +0200 +Subject: [PATCH] ARM: dts: omap3-igep0020: add mux conf for GPIO LEDs + +The IGEPv2 has a number of GPIO LED connected to OMAP +pins. Configure these pins as output GPIO. + +Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Tested-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-igep0020.dts | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts +index e8c4828..51c084e 100644 +--- a/arch/arm/boot/dts/omap3-igep0020.dts ++++ b/arch/arm/boot/dts/omap3-igep0020.dts +@@ -16,7 +16,10 @@ + compatible = "isee,omap3-igep0020", "ti,omap3"; + + leds { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&leds_pins>; + compatible = "gpio-leds"; ++ + boot { + label = "omap3:green:boot"; + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; +@@ -54,6 +57,14 @@ + }; + }; + ++&leds_pins { ++ pinctrl-single,pins = < ++ 0x5c4 (PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */ ++ 0x5c6 (PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */ ++ 0x5c8 (PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */ ++ >; ++}; ++ + &i2c3 { + clock-frequency = <100000>; + diff --git a/patches/linux-3.12/0204-ARM-dts-omap3-igep0030-add-mux-conf-for-GPIO-LED.patch b/patches/linux-3.12/0204-ARM-dts-omap3-igep0030-add-mux-conf-for-GPIO-LED.patch new file mode 100644 index 0000000..946e3d8 --- /dev/null +++ b/patches/linux-3.12/0204-ARM-dts-omap3-igep0030-add-mux-conf-for-GPIO-LED.patch @@ -0,0 +1,42 @@ +From: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Date: Thu, 20 Jun 2013 16:42:32 +0200 +Subject: [PATCH] ARM: dts: omap3-igep0030: add mux conf for GPIO LED + +The IGEP COM MOdule has a GPIO LED connected to OMAP +pins. Configure this pin as output GPIO. + +Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Tested-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-igep0030.dts | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts +index 644d053..eee3c63 100644 +--- a/arch/arm/boot/dts/omap3-igep0030.dts ++++ b/arch/arm/boot/dts/omap3-igep0030.dts +@@ -16,7 +16,10 @@ + compatible = "isee,omap3-igep0030", "ti,omap3"; + + leds { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&leds_pins>; + compatible = "gpio-leds"; ++ + boot { + label = "omap3:green:boot"; + gpios = <&twl_gpio 13 GPIO_ACTIVE_LOW>; +@@ -43,6 +46,12 @@ + }; + }; + ++&leds_pins { ++ pinctrl-single,pins = < ++ 0x5b0 (PIN_OUTPUT | MUX_MODE4) /* etk_d2.gpio_16 */ ++ >; ++}; ++ + &gpmc { + ranges = <0 0 0x00000000 0x20000000>; + diff --git a/patches/linux-3.12/0205-ARM-dts-AM33XX-Add-PMU-support.patch b/patches/linux-3.12/0205-ARM-dts-AM33XX-Add-PMU-support.patch new file mode 100644 index 0000000..886c2ba --- /dev/null +++ b/patches/linux-3.12/0205-ARM-dts-AM33XX-Add-PMU-support.patch @@ -0,0 +1,31 @@ +From: Alexandre Belloni <alexandre.belloni@free-electrons.com> +Date: Sat, 3 Aug 2013 20:00:54 +0200 +Subject: [PATCH] ARM: dts: AM33XX: Add PMU support + +ARM Performance Monitor Units are available on the am33xx, +add the support in the dtsi. + +Tested with perf and oprofile on a regular beaglebone. + +Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am33xx.dtsi | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index 14510ee..b820352 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -57,6 +57,11 @@ + }; + }; + ++ pmu { ++ compatible = "arm,cortex-a8-pmu"; ++ interrupts = <3>; ++ }; ++ + /* + * The soc node represents the soc top level view. It is uses for IPs + * that are not memory mapped in the MPU view or for the MPU itself. diff --git a/patches/linux-3.12/0206-ARM-dts-AM33xx-Correct-gpio-interrupt-cells-property.patch b/patches/linux-3.12/0206-ARM-dts-AM33xx-Correct-gpio-interrupt-cells-property.patch new file mode 100644 index 0000000..0798c8e --- /dev/null +++ b/patches/linux-3.12/0206-ARM-dts-AM33xx-Correct-gpio-interrupt-cells-property.patch @@ -0,0 +1,57 @@ +From: Lars Poeschel <poeschel@lemonage.de> +Date: Wed, 7 Aug 2013 13:06:32 +0200 +Subject: [PATCH] ARM: dts: AM33xx: Correct gpio #interrupt-cells property + +Following commit ff5c9059 and therefore other omap platforms using +the gpio-omap driver correct the #interrupt-cells property on am33xx +too. The omap gpio binding documentaion also states that +the #interrupt-cells property should be 2. + +Signed-off-by: Lars Poeschel <poeschel@lemonage.de> +Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> +Acked-by: Mark Rutland <mark.rutland@arm.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am33xx.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index b820352..2d571c8 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -111,7 +111,7 @@ + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; +- #interrupt-cells = <1>; ++ #interrupt-cells = <2>; + reg = <0x44e07000 0x1000>; + interrupts = <96>; + }; +@@ -122,7 +122,7 @@ + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; +- #interrupt-cells = <1>; ++ #interrupt-cells = <2>; + reg = <0x4804c000 0x1000>; + interrupts = <98>; + }; +@@ -133,7 +133,7 @@ + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; +- #interrupt-cells = <1>; ++ #interrupt-cells = <2>; + reg = <0x481ac000 0x1000>; + interrupts = <32>; + }; +@@ -144,7 +144,7 @@ + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; +- #interrupt-cells = <1>; ++ #interrupt-cells = <2>; + reg = <0x481ae000 0x1000>; + interrupts = <62>; + }; diff --git a/patches/linux-3.12/0207-ARM-dts-omap5-uevm-Split-SMPS10-in-two-nodes.patch b/patches/linux-3.12/0207-ARM-dts-omap5-uevm-Split-SMPS10-in-two-nodes.patch new file mode 100644 index 0000000..b422e23 --- /dev/null +++ b/patches/linux-3.12/0207-ARM-dts-omap5-uevm-Split-SMPS10-in-two-nodes.patch @@ -0,0 +1,38 @@ +From: Kishon Vijay Abraham I <kishon@ti.com> +Date: Mon, 12 Aug 2013 15:07:01 +0530 +Subject: [PATCH] ARM: dts: omap5-uevm: Split SMPS10 in two nodes + +SMPS10 has two outputs OUT1 and OUT2. Hence SMPS10 is modeled as +two regulators. The DT node is split to reflect it. + +Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5-uevm.dts | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts +index 65d7b60..05b9b12 100644 +--- a/arch/arm/boot/dts/omap5-uevm.dts ++++ b/arch/arm/boot/dts/omap5-uevm.dts +@@ -334,9 +334,18 @@ + ti,smps-range = <0x80>; + }; + +- smps10_reg: smps10 { ++ smps10_out2_reg: smps10_out2 { + /* VBUS_5V_OTG */ +- regulator-name = "smps10"; ++ regulator-name = "smps10_out2"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ smps10_out1_reg: smps10_out1 { ++ /* VBUS_5V_OTG */ ++ regulator-name = "smps10_out1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; diff --git a/patches/linux-3.12/0208-ARM-dts-Remove-0x-s-from-OMAP2420-H4-DTS-file.patch b/patches/linux-3.12/0208-ARM-dts-Remove-0x-s-from-OMAP2420-H4-DTS-file.patch new file mode 100644 index 0000000..f81d5e0 --- /dev/null +++ b/patches/linux-3.12/0208-ARM-dts-Remove-0x-s-from-OMAP2420-H4-DTS-file.patch @@ -0,0 +1,34 @@ +From: Lee Jones <lee.jones@linaro.org> +Date: Mon, 22 Jul 2013 11:52:31 +0100 +Subject: [PATCH] ARM: dts: Remove '0x's from OMAP2420 H4 DTS file + +Cc: Tony Lindgren <tony@atomide.com> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap2420-h4.dts | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts +index 224c08f..34cdecb 100644 +--- a/arch/arm/boot/dts/omap2420-h4.dts ++++ b/arch/arm/boot/dts/omap2420-h4.dts +@@ -50,15 +50,15 @@ + label = "bootloader"; + reg = <0 0x20000>; + }; +- partition@0x20000 { ++ partition@20000 { + label = "params"; + reg = <0x20000 0x20000>; + }; +- partition@0x40000 { ++ partition@40000 { + label = "kernel"; + reg = <0x40000 0x200000>; + }; +- partition@0x240000 { ++ partition@240000 { + label = "file-system"; + reg = <0x240000 0x3dc0000>; + }; diff --git a/patches/linux-3.12/0209-ARM-dts-Remove-0x-s-from-OMAP3-IGEP0020-DTS-file.patch b/patches/linux-3.12/0209-ARM-dts-Remove-0x-s-from-OMAP3-IGEP0020-DTS-file.patch new file mode 100644 index 0000000..5ed144d --- /dev/null +++ b/patches/linux-3.12/0209-ARM-dts-Remove-0x-s-from-OMAP3-IGEP0020-DTS-file.patch @@ -0,0 +1,39 @@ +From: Lee Jones <lee.jones@linaro.org> +Date: Mon, 22 Jul 2013 11:52:32 +0100 +Subject: [PATCH] ARM: dts: Remove '0x's from OMAP3 IGEP0020 DTS file + +Cc: Tony Lindgren <tony@atomide.com> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-igep0020.dts | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts +index 51c084e..eedf0d8 100644 +--- a/arch/arm/boot/dts/omap3-igep0020.dts ++++ b/arch/arm/boot/dts/omap3-igep0020.dts +@@ -110,19 +110,19 @@ + label = "SPL"; + reg = <0 0x100000>; + }; +- partition@0x80000 { ++ partition@80000 { + label = "U-Boot"; + reg = <0x100000 0x180000>; + }; +- partition@0x1c0000 { ++ partition@1c0000 { + label = "Environment"; + reg = <0x280000 0x100000>; + }; +- partition@0x280000 { ++ partition@280000 { + label = "Kernel"; + reg = <0x380000 0x300000>; + }; +- partition@0x780000 { ++ partition@780000 { + label = "Filesystem"; + reg = <0x680000 0x1f980000>; + }; diff --git a/patches/linux-3.12/0210-ARM-dts-Remove-0x-s-from-OMAP3-IGEP0030-DTS-file.patch b/patches/linux-3.12/0210-ARM-dts-Remove-0x-s-from-OMAP3-IGEP0030-DTS-file.patch new file mode 100644 index 0000000..c5655b3 --- /dev/null +++ b/patches/linux-3.12/0210-ARM-dts-Remove-0x-s-from-OMAP3-IGEP0030-DTS-file.patch @@ -0,0 +1,39 @@ +From: Lee Jones <lee.jones@linaro.org> +Date: Mon, 22 Jul 2013 11:52:33 +0100 +Subject: [PATCH] ARM: dts: Remove '0x's from OMAP3 IGEP0030 DTS file + +Cc: Tony Lindgren <tony@atomide.com> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-igep0030.dts | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts +index eee3c63..525e6d9 100644 +--- a/arch/arm/boot/dts/omap3-igep0030.dts ++++ b/arch/arm/boot/dts/omap3-igep0030.dts +@@ -83,19 +83,19 @@ + label = "SPL"; + reg = <0 0x100000>; + }; +- partition@0x80000 { ++ partition@80000 { + label = "U-Boot"; + reg = <0x100000 0x180000>; + }; +- partition@0x1c0000 { ++ partition@1c0000 { + label = "Environment"; + reg = <0x280000 0x100000>; + }; +- partition@0x280000 { ++ partition@280000 { + label = "Kernel"; + reg = <0x380000 0x300000>; + }; +- partition@0x780000 { ++ partition@780000 { + label = "Filesystem"; + reg = <0x680000 0x1f980000>; + }; diff --git a/patches/linux-3.12/0211-ARM-dts-Remove-0x-s-from-OMAP3-DTS-file.patch b/patches/linux-3.12/0211-ARM-dts-Remove-0x-s-from-OMAP3-DTS-file.patch new file mode 100644 index 0000000..a27f7f9 --- /dev/null +++ b/patches/linux-3.12/0211-ARM-dts-Remove-0x-s-from-OMAP3-DTS-file.patch @@ -0,0 +1,24 @@ +From: Lee Jones <lee.jones@linaro.org> +Date: Mon, 22 Jul 2013 11:52:34 +0100 +Subject: [PATCH] ARM: dts: Remove '0x's from OMAP3 DTS file + +Cc: Tony Lindgren <tony@atomide.com> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi +index b41bd57..b87d6d3 100644 +--- a/arch/arm/boot/dts/omap3.dtsi ++++ b/arch/arm/boot/dts/omap3.dtsi +@@ -111,7 +111,7 @@ + pinctrl-single,function-mask = <0xff1f>; + }; + +- omap3_pmx_wkup: pinmux@0x48002a00 { ++ omap3_pmx_wkup: pinmux@48002a00 { + compatible = "ti,omap3-padconf", "pinctrl-single"; + reg = <0x48002a00 0x5c>; + #address-cells = <1>; diff --git a/patches/linux-3.12/0212-ARM-dts-Remove-0x-s-from-OMAP3430-SDP-DTS-file.patch b/patches/linux-3.12/0212-ARM-dts-Remove-0x-s-from-OMAP3430-SDP-DTS-file.patch new file mode 100644 index 0000000..f94e301 --- /dev/null +++ b/patches/linux-3.12/0212-ARM-dts-Remove-0x-s-from-OMAP3430-SDP-DTS-file.patch @@ -0,0 +1,82 @@ +From: Lee Jones <lee.jones@linaro.org> +Date: Mon, 22 Jul 2013 11:52:35 +0100 +Subject: [PATCH] ARM: dts: Remove '0x's from OMAP3430 SDP DTS file + +Cc: Tony Lindgren <tony@atomide.com> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3430-sdp.dts | 22 +++++++++++----------- + 1 file changed, 11 insertions(+), 11 deletions(-) + +diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts +index e2249bc..281914e 100644 +--- a/arch/arm/boot/dts/omap3430-sdp.dts ++++ b/arch/arm/boot/dts/omap3430-sdp.dts +@@ -84,15 +84,15 @@ + label = "bootloader-nor"; + reg = <0 0x40000>; + }; +- partition@0x40000 { ++ partition@40000 { + label = "params-nor"; + reg = <0x40000 0x40000>; + }; +- partition@0x80000 { ++ partition@80000 { + label = "kernel-nor"; + reg = <0x80000 0x200000>; + }; +- partition@0x280000 { ++ partition@280000 { + label = "filesystem-nor"; + reg = <0x240000 0x7d80000>; + }; +@@ -125,19 +125,19 @@ + label = "xloader-nand"; + reg = <0 0x80000>; + }; +- partition@0x80000 { ++ partition@80000 { + label = "bootloader-nand"; + reg = <0x80000 0x140000>; + }; +- partition@0x1c0000 { ++ partition@1c0000 { + label = "params-nand"; + reg = <0x1c0000 0xc0000>; + }; +- partition@0x280000 { ++ partition@280000 { + label = "kernel-nand"; + reg = <0x280000 0x500000>; + }; +- partition@0x780000 { ++ partition@780000 { + label = "filesystem-nand"; + reg = <0x780000 0x7880000>; + }; +@@ -170,19 +170,19 @@ + label = "xloader-onenand"; + reg = <0 0x80000>; + }; +- partition@0x80000 { ++ partition@80000 { + label = "bootloader-onenand"; + reg = <0x80000 0x40000>; + }; +- partition@0xc0000 { ++ partition@c0000 { + label = "params-onenand"; + reg = <0xc0000 0x20000>; + }; +- partition@0xe0000 { ++ partition@e0000 { + label = "kernel-onenand"; + reg = <0xe0000 0x200000>; + }; +- partition@0x2e0000 { ++ partition@2e0000 { + label = "filesystem-onenand"; + reg = <0x2e0000 0xfd20000>; + }; diff --git a/patches/linux-3.12/0213-ARM-dts-Remove-0x-s-from-OMAP4-DTS-file.patch b/patches/linux-3.12/0213-ARM-dts-Remove-0x-s-from-OMAP4-DTS-file.patch new file mode 100644 index 0000000..9b16910 --- /dev/null +++ b/patches/linux-3.12/0213-ARM-dts-Remove-0x-s-from-OMAP4-DTS-file.patch @@ -0,0 +1,24 @@ +From: Lee Jones <lee.jones@linaro.org> +Date: Mon, 22 Jul 2013 11:52:36 +0100 +Subject: [PATCH] ARM: dts: Remove '0x's from OMAP4 DTS file + +Cc: Tony Lindgren <tony@atomide.com> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap4.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi +index 22d9f2b..45708e1 100644 +--- a/arch/arm/boot/dts/omap4.dtsi ++++ b/arch/arm/boot/dts/omap4.dtsi +@@ -56,7 +56,7 @@ + cache-level = <2>; + }; + +- local-timer@0x48240600 { ++ local-timer@48240600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x48240600 0x20>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>; diff --git a/patches/linux-3.12/0214-ARM-dts-Remove-0x-s-from-OMAP5-DTS-file.patch b/patches/linux-3.12/0214-ARM-dts-Remove-0x-s-from-OMAP5-DTS-file.patch new file mode 100644 index 0000000..42bd002 --- /dev/null +++ b/patches/linux-3.12/0214-ARM-dts-Remove-0x-s-from-OMAP5-DTS-file.patch @@ -0,0 +1,33 @@ +From: Lee Jones <lee.jones@linaro.org> +Date: Mon, 22 Jul 2013 11:52:37 +0100 +Subject: [PATCH] ARM: dts: Remove '0x's from OMAP5 DTS file + +Cc: Tony Lindgren <tony@atomide.com> +Signed-off-by: Lee Jones <lee.jones@linaro.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi +index 7cdea1b..ecc06a9 100644 +--- a/arch/arm/boot/dts/omap5.dtsi ++++ b/arch/arm/boot/dts/omap5.dtsi +@@ -604,7 +604,7 @@ + ti,hwmods = "wd_timer2"; + }; + +- emif1: emif@0x4c000000 { ++ emif1: emif@4c000000 { + compatible = "ti,emif-4d5"; + ti,hwmods = "emif1"; + phy-type = <2>; /* DDR PHY type: Intelli PHY */ +@@ -615,7 +615,7 @@ + hw-caps-temp-alert; + }; + +- emif2: emif@0x4d000000 { ++ emif2: emif@4d000000 { + compatible = "ti,emif-4d5"; + ti,hwmods = "emif2"; + phy-type = <2>; /* DDR PHY type: Intelli PHY */ diff --git a/patches/linux-3.12/0215-ARM-dts-twl6030-Move-common-configuration-for-OMAP4-.patch b/patches/linux-3.12/0215-ARM-dts-twl6030-Move-common-configuration-for-OMAP4-.patch new file mode 100644 index 0000000..5714e82 --- /dev/null +++ b/patches/linux-3.12/0215-ARM-dts-twl6030-Move-common-configuration-for-OMAP4-.patch @@ -0,0 +1,164 @@ +From: Ruslan Bilovol <ruslan.bilovol@ti.com> +Date: Wed, 14 Aug 2013 11:35:47 +0300 +Subject: [PATCH] ARM: dts: twl6030: Move common configuration for OMAP4 boards + in a separate dtsi file + +The OMAP4 SoC family uses specially-designed PMIC (power management IC) +companion chip for power management needs: TWL6030/TWL6032. +Therefore there is a typical connection of PMIC to OMAP4 so we can +move it into separate .dtsi file and do not duplicate over +board-specific files. + +Tested on OMAP4 SDP board and Pandaboard ES2. + +Signed-off-by: Ruslan Bilovol <ruslan.bilovol@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap4-panda-common.dtsi | 21 +---------------- + arch/arm/boot/dts/omap4-sdp.dts | 21 +---------------- + arch/arm/boot/dts/twl6030_omap4.dtsi | 38 +++++++++++++++++++++++++++++++ + 3 files changed, 40 insertions(+), 40 deletions(-) + create mode 100644 arch/arm/boot/dts/twl6030_omap4.dtsi + +diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi +index 814ab67..43b7661 100644 +--- a/arch/arm/boot/dts/omap4-panda-common.dtsi ++++ b/arch/arm/boot/dts/omap4-panda-common.dtsi +@@ -122,23 +122,9 @@ + }; + }; + +-&omap4_pmx_wkup { +- pinctrl-names = "default"; +- pinctrl-0 = < +- &twl6030_wkup_pins +- >; +- +- twl6030_wkup_pins: pinmux_twl6030_wkup_pins { +- pinctrl-single,pins = < +- 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ +- >; +- }; +-}; +- + &omap4_pmx_core { + pinctrl-names = "default"; + pinctrl-0 = < +- &twl6030_pins + &twl6040_pins + &mcpdm_pins + &mcbsp1_pins +@@ -147,12 +133,6 @@ + &hsusbb1_pins + >; + +- twl6030_pins: pinmux_twl6030_pins { +- pinctrl-single,pins = < +- 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ +- >; +- }; +- + twl6040_pins: pinmux_twl6040_pins { + pinctrl-single,pins = < + 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ +@@ -305,6 +285,7 @@ + }; + + #include "twl6030.dtsi" ++#include "twl6030_omap4.dtsi" + + &i2c2 { + pinctrl-names = "default"; +diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts +index 4f78380..5fc3f43 100644 +--- a/arch/arm/boot/dts/omap4-sdp.dts ++++ b/arch/arm/boot/dts/omap4-sdp.dts +@@ -155,23 +155,9 @@ + }; + }; + +-&omap4_pmx_wkup { +- pinctrl-names = "default"; +- pinctrl-0 = < +- &twl6030_wkup_pins +- >; +- +- twl6030_wkup_pins: pinmux_twl6030_wkup_pins { +- pinctrl-single,pins = < +- 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ +- >; +- }; +-}; +- + &omap4_pmx_core { + pinctrl-names = "default"; + pinctrl-0 = < +- &twl6030_pins + &twl6040_pins + &mcpdm_pins + &dmic_pins +@@ -206,12 +192,6 @@ + >; + }; + +- twl6030_pins: pinmux_twl6030_pins { +- pinctrl-single,pins = < +- 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ +- >; +- }; +- + twl6040_pins: pinmux_twl6040_pins { + pinctrl-single,pins = < + 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ +@@ -370,6 +350,7 @@ + }; + + #include "twl6030.dtsi" ++#include "twl6030_omap4.dtsi" + + &i2c2 { + pinctrl-names = "default"; +diff --git a/arch/arm/boot/dts/twl6030_omap4.dtsi b/arch/arm/boot/dts/twl6030_omap4.dtsi +new file mode 100644 +index 0000000..a4fa570 +--- /dev/null ++++ b/arch/arm/boot/dts/twl6030_omap4.dtsi +@@ -0,0 +1,38 @@ ++/* ++ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++&twl { ++ /* ++ * On most OMAP4 platforms, the twl6030 IRQ line is connected ++ * to the SYS_NIRQ1 line on OMAP and the twl6030 MSECURE line is ++ * connected to the fref_clk0_out.sys_drm_msecure line. ++ * Therefore, configure the defaults for the SYS_NIRQ1 and ++ * fref_clk0_out.sys_drm_msecure pins here. ++ */ ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &twl6030_pins ++ &twl6030_wkup_pins ++ >; ++}; ++ ++&omap4_pmx_wkup { ++ twl6030_wkup_pins: pinmux_twl6030_wkup_pins { ++ pinctrl-single,pins = < ++ 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ ++ >; ++ }; ++}; ++ ++&omap4_pmx_core { ++ twl6030_pins: pinmux_twl6030_pins { ++ pinctrl-single,pins = < ++ 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ ++ >; ++ }; ++}; diff --git a/patches/linux-3.12/0216-ARM-dts-DRA7-Add-the-dts-files-for-dra7-SoC-and-dra7.patch b/patches/linux-3.12/0216-ARM-dts-DRA7-Add-the-dts-files-for-dra7-SoC-and-dra7.patch new file mode 100644 index 0000000..9a86429 --- /dev/null +++ b/patches/linux-3.12/0216-ARM-dts-DRA7-Add-the-dts-files-for-dra7-SoC-and-dra7.patch @@ -0,0 +1,822 @@ +From: R Sricharan <r.sricharan@ti.com> +Date: Wed, 14 Aug 2013 19:08:20 +0530 +Subject: [PATCH] ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm + board + +Add minimal device tree source needed for DRA7 based SoCs. +Also add a board dts file for the dra7-evm (based on dra752) +which contains 1.5G of memory with 1G interleaved and 512MB +non-interleaved. Also added in the board file are pin configuration +details for i2c, mcspi and uart devices on board. + +Signed-off-by: R Sricharan <r.sricharan@ti.com> +Signed-off-by: Rajendra Nayak <rnayak@ti.com> +Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/Makefile | 3 +- + arch/arm/boot/dts/dra7-evm.dts | 140 ++++++++++ + arch/arm/boot/dts/dra7.dtsi | 575 ++++++++++++++++++++++++++++++++++++++ + include/dt-bindings/pinctrl/dra.h | 50 ++++ + 4 files changed, 767 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/boot/dts/dra7-evm.dts + create mode 100644 arch/arm/boot/dts/dra7.dtsi + create mode 100644 include/dt-bindings/pinctrl/dra.h + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index a7cae53..b057b0e 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -189,7 +189,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ + am335x-boneblack.dtb \ + am3517-evm.dtb \ + am3517_mt_ventoux.dtb \ +- am43x-epos-evm.dtb ++ am43x-epos-evm.dtb \ ++ dra7-evm.dtb + dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb + dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb + dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ +diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts +new file mode 100644 +index 0000000..ca5dab2 +--- /dev/null ++++ b/arch/arm/boot/dts/dra7-evm.dts +@@ -0,0 +1,140 @@ ++/* ++ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++/dts-v1/; ++ ++#include "dra7.dtsi" ++ ++/ { ++ model = "TI DRA7"; ++ compatible = "ti,dra7-evm", "ti,dra752", "ti,dra7"; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x80000000 0x60000000>; /* 1536 MB */ ++ }; ++}; ++ ++&dra7_pmx_core { ++ i2c1_pins: pinmux_i2c1_pins { ++ pinctrl-single,pins = < ++ 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */ ++ 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */ ++ >; ++ }; ++ ++ i2c2_pins: pinmux_i2c2_pins { ++ pinctrl-single,pins = < ++ 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */ ++ 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */ ++ >; ++ }; ++ ++ i2c3_pins: pinmux_i2c3_pins { ++ pinctrl-single,pins = < ++ 0x410 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */ ++ 0x414 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */ ++ >; ++ }; ++ ++ mcspi1_pins: pinmux_mcspi1_pins { ++ pinctrl-single,pins = < ++ 0x3a4 (PIN_INPUT | MUX_MODE0) /* spi2_clk */ ++ 0x3a8 (PIN_INPUT | MUX_MODE0) /* spi2_d1 */ ++ 0x3ac (PIN_INPUT | MUX_MODE0) /* spi2_d0 */ ++ 0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ ++ 0x3b4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs1 */ ++ 0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs2 */ ++ 0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs3 */ ++ >; ++ }; ++ ++ mcspi2_pins: pinmux_mcspi2_pins { ++ pinctrl-single,pins = < ++ 0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */ ++ 0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ ++ 0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ ++ 0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ ++ >; ++ }; ++ ++ uart1_pins: pinmux_uart1_pins { ++ pinctrl-single,pins = < ++ 0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */ ++ 0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */ ++ 0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */ ++ 0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */ ++ >; ++ }; ++ ++ uart2_pins: pinmux_uart2_pins { ++ pinctrl-single,pins = < ++ 0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */ ++ 0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */ ++ 0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */ ++ 0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */ ++ >; ++ }; ++ ++ uart3_pins: pinmux_uart3_pins { ++ pinctrl-single,pins = < ++ 0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */ ++ 0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */ ++ >; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ clock-frequency = <400000>; ++}; ++ ++&i2c2 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; ++ clock-frequency = <400000>; ++}; ++ ++&i2c3 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c3_pins>; ++ clock-frequency = <3400000>; ++}; ++ ++&mcspi1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcspi1_pins>; ++}; ++ ++&mcspi2 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcspi2_pins>; ++}; ++ ++&uart1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++}; ++ ++&uart2 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2_pins>; ++}; ++ ++&uart3 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; ++}; +diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi +new file mode 100644 +index 0000000..c01ef76 +--- /dev/null ++++ b/arch/arm/boot/dts/dra7.dtsi +@@ -0,0 +1,575 @@ ++/* ++ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * Based on "omap4.dtsi" ++ */ ++ ++#include <dt-bindings/interrupt-controller/arm-gic.h> ++#include <dt-bindings/pinctrl/dra.h> ++ ++#include "skeleton.dtsi" ++ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ compatible = "ti,dra7xx"; ++ interrupt-parent = <&gic>; ++ ++ aliases { ++ serial0 = &uart1; ++ serial1 = &uart2; ++ serial2 = &uart3; ++ serial3 = &uart4; ++ serial4 = &uart5; ++ serial5 = &uart6; ++ }; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a15"; ++ reg = <0>; ++ }; ++ cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a15"; ++ reg = <1>; ++ }; ++ }; ++ ++ timer { ++ compatible = "arm,armv7-timer"; ++ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, ++ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, ++ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, ++ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; ++ }; ++ ++ gic: interrupt-controller@48211000 { ++ compatible = "arm,cortex-a15-gic"; ++ interrupt-controller; ++ #interrupt-cells = <3>; ++ reg = <0x48211000 0x1000>, ++ <0x48212000 0x1000>, ++ <0x48214000 0x2000>, ++ <0x48216000 0x2000>; ++ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; ++ }; ++ ++ /* ++ * The soc node represents the soc top level view. It is uses for IPs ++ * that are not memory mapped in the MPU view or for the MPU itself. ++ */ ++ soc { ++ compatible = "ti,omap-infra"; ++ mpu { ++ compatible = "ti,omap5-mpu"; ++ ti,hwmods = "mpu"; ++ }; ++ }; ++ ++ /* ++ * XXX: Use a flat representation of the SOC interconnect. ++ * The real OMAP interconnect network is quite complex. ++ * Since that will not bring real advantage to represent that in DT for ++ * the moment, just use a fake OCP bus entry to represent the whole bus ++ * hierarchy. ++ */ ++ ocp { ++ compatible = "ti,omap4-l3-noc", "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ti,hwmods = "l3_main_1", "l3_main_2"; ++ reg = <0x44000000 0x2000>, ++ <0x44800000 0x3000>; ++ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; ++ ++ counter32k: counter@4ae04000 { ++ compatible = "ti,omap-counter32k"; ++ reg = <0x4ae04000 0x40>; ++ ti,hwmods = "counter_32k"; ++ }; ++ ++ dra7_pmx_core: pinmux@4a003400 { ++ compatible = "pinctrl-single"; ++ reg = <0x4a003400 0x0464>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-single,register-width = <32>; ++ pinctrl-single,function-mask = <0x3fffffff>; ++ }; ++ ++ sdma: dma-controller@4a056000 { ++ compatible = "ti,omap4430-sdma"; ++ reg = <0x4a056000 0x1000>; ++ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; ++ #dma-cells = <1>; ++ #dma-channels = <32>; ++ #dma-requests = <127>; ++ }; ++ ++ gpio1: gpio@4ae10000 { ++ compatible = "ti,omap4-gpio"; ++ reg = <0x4ae10000 0x200>; ++ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "gpio1"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ gpio2: gpio@48055000 { ++ compatible = "ti,omap4-gpio"; ++ reg = <0x48055000 0x200>; ++ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "gpio2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ gpio3: gpio@48057000 { ++ compatible = "ti,omap4-gpio"; ++ reg = <0x48057000 0x200>; ++ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "gpio3"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ gpio4: gpio@48059000 { ++ compatible = "ti,omap4-gpio"; ++ reg = <0x48059000 0x200>; ++ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "gpio4"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ gpio5: gpio@4805b000 { ++ compatible = "ti,omap4-gpio"; ++ reg = <0x4805b000 0x200>; ++ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "gpio5"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ gpio6: gpio@4805d000 { ++ compatible = "ti,omap4-gpio"; ++ reg = <0x4805d000 0x200>; ++ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "gpio6"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ gpio7: gpio@48051000 { ++ compatible = "ti,omap4-gpio"; ++ reg = <0x48051000 0x200>; ++ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "gpio7"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ gpio8: gpio@48053000 { ++ compatible = "ti,omap4-gpio"; ++ reg = <0x48053000 0x200>; ++ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "gpio8"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++ ++ uart1: serial@4806a000 { ++ compatible = "ti,omap4-uart"; ++ reg = <0x4806a000 0x100>; ++ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart1"; ++ clock-frequency = <48000000>; ++ status = "disabled"; ++ }; ++ ++ uart2: serial@4806c000 { ++ compatible = "ti,omap4-uart"; ++ reg = <0x4806c000 0x100>; ++ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart2"; ++ clock-frequency = <48000000>; ++ status = "disabled"; ++ }; ++ ++ uart3: serial@48020000 { ++ compatible = "ti,omap4-uart"; ++ reg = <0x48020000 0x100>; ++ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart3"; ++ clock-frequency = <48000000>; ++ status = "disabled"; ++ }; ++ ++ uart4: serial@4806e000 { ++ compatible = "ti,omap4-uart"; ++ reg = <0x4806e000 0x100>; ++ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart4"; ++ clock-frequency = <48000000>; ++ status = "disabled"; ++ }; ++ ++ uart5: serial@48066000 { ++ compatible = "ti,omap4-uart"; ++ reg = <0x48066000 0x100>; ++ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart5"; ++ clock-frequency = <48000000>; ++ status = "disabled"; ++ }; ++ ++ uart6: serial@48068000 { ++ compatible = "ti,omap4-uart"; ++ reg = <0x48068000 0x100>; ++ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart6"; ++ clock-frequency = <48000000>; ++ status = "disabled"; ++ }; ++ ++ uart7: serial@48420000 { ++ compatible = "ti,omap4-uart"; ++ reg = <0x48420000 0x100>; ++ ti,hwmods = "uart7"; ++ clock-frequency = <48000000>; ++ status = "disabled"; ++ }; ++ ++ uart8: serial@48422000 { ++ compatible = "ti,omap4-uart"; ++ reg = <0x48422000 0x100>; ++ ti,hwmods = "uart8"; ++ clock-frequency = <48000000>; ++ status = "disabled"; ++ }; ++ ++ uart9: serial@48424000 { ++ compatible = "ti,omap4-uart"; ++ reg = <0x48424000 0x100>; ++ ti,hwmods = "uart9"; ++ clock-frequency = <48000000>; ++ status = "disabled"; ++ }; ++ ++ uart10: serial@4ae2b000 { ++ compatible = "ti,omap4-uart"; ++ reg = <0x4ae2b000 0x100>; ++ ti,hwmods = "uart10"; ++ clock-frequency = <48000000>; ++ status = "disabled"; ++ }; ++ ++ timer1: timer@4ae18000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x4ae18000 0x80>; ++ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer1"; ++ ti,timer-alwon; ++ }; ++ ++ timer2: timer@48032000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x48032000 0x80>; ++ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer2"; ++ }; ++ ++ timer3: timer@48034000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x48034000 0x80>; ++ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer3"; ++ }; ++ ++ timer4: timer@48036000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x48036000 0x80>; ++ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer4"; ++ }; ++ ++ timer5: timer@48820000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x48820000 0x80>; ++ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer5"; ++ ti,timer-dsp; ++ }; ++ ++ timer6: timer@48822000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x48822000 0x80>; ++ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer6"; ++ ti,timer-dsp; ++ ti,timer-pwm; ++ }; ++ ++ timer7: timer@48824000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x48824000 0x80>; ++ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer7"; ++ ti,timer-dsp; ++ }; ++ ++ timer8: timer@48826000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x48826000 0x80>; ++ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer8"; ++ ti,timer-dsp; ++ ti,timer-pwm; ++ }; ++ ++ timer9: timer@4803e000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x4803e000 0x80>; ++ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer9"; ++ }; ++ ++ timer10: timer@48086000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x48086000 0x80>; ++ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer10"; ++ }; ++ ++ timer11: timer@48088000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x48088000 0x80>; ++ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer11"; ++ ti,timer-pwm; ++ }; ++ ++ timer13: timer@48828000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x48828000 0x80>; ++ ti,hwmods = "timer13"; ++ status = "disabled"; ++ }; ++ ++ timer14: timer@4882a000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x4882a000 0x80>; ++ ti,hwmods = "timer14"; ++ status = "disabled"; ++ }; ++ ++ timer15: timer@4882c000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x4882c000 0x80>; ++ ti,hwmods = "timer15"; ++ status = "disabled"; ++ }; ++ ++ timer16: timer@4882e000 { ++ compatible = "ti,omap5430-timer"; ++ reg = <0x4882e000 0x80>; ++ ti,hwmods = "timer16"; ++ status = "disabled"; ++ }; ++ ++ wdt2: wdt@4ae14000 { ++ compatible = "ti,omap4-wdt"; ++ reg = <0x4ae14000 0x80>; ++ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "wd_timer2"; ++ }; ++ ++ i2c1: i2c@48070000 { ++ compatible = "ti,omap4-i2c"; ++ reg = <0x48070000 0x100>; ++ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ti,hwmods = "i2c1"; ++ status = "disabled"; ++ }; ++ ++ i2c2: i2c@48072000 { ++ compatible = "ti,omap4-i2c"; ++ reg = <0x48072000 0x100>; ++ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ti,hwmods = "i2c2"; ++ status = "disabled"; ++ }; ++ ++ i2c3: i2c@48060000 { ++ compatible = "ti,omap4-i2c"; ++ reg = <0x48060000 0x100>; ++ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ti,hwmods = "i2c3"; ++ status = "disabled"; ++ }; ++ ++ i2c4: i2c@4807a000 { ++ compatible = "ti,omap4-i2c"; ++ reg = <0x4807a000 0x100>; ++ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ti,hwmods = "i2c4"; ++ status = "disabled"; ++ }; ++ ++ i2c5: i2c@4807c000 { ++ compatible = "ti,omap4-i2c"; ++ reg = <0x4807c000 0x100>; ++ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ti,hwmods = "i2c5"; ++ status = "disabled"; ++ }; ++ ++ mmc1: mmc@4809c000 { ++ compatible = "ti,omap4-hsmmc"; ++ reg = <0x4809c000 0x400>; ++ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "mmc1"; ++ ti,dual-volt; ++ ti,needs-special-reset; ++ dmas = <&sdma 61>, <&sdma 62>; ++ dma-names = "tx", "rx"; ++ status = "disabled"; ++ }; ++ ++ mmc2: mmc@480b4000 { ++ compatible = "ti,omap4-hsmmc"; ++ reg = <0x480b4000 0x400>; ++ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "mmc2"; ++ ti,needs-special-reset; ++ dmas = <&sdma 47>, <&sdma 48>; ++ dma-names = "tx", "rx"; ++ status = "disabled"; ++ }; ++ ++ mmc3: mmc@480ad000 { ++ compatible = "ti,omap4-hsmmc"; ++ reg = <0x480ad000 0x400>; ++ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "mmc3"; ++ ti,needs-special-reset; ++ dmas = <&sdma 77>, <&sdma 78>; ++ dma-names = "tx", "rx"; ++ status = "disabled"; ++ }; ++ ++ mmc4: mmc@480d1000 { ++ compatible = "ti,omap4-hsmmc"; ++ reg = <0x480d1000 0x400>; ++ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "mmc4"; ++ ti,needs-special-reset; ++ dmas = <&sdma 57>, <&sdma 58>; ++ dma-names = "tx", "rx"; ++ status = "disabled"; ++ }; ++ ++ mcspi1: spi@48098000 { ++ compatible = "ti,omap4-mcspi"; ++ reg = <0x48098000 0x200>; ++ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ti,hwmods = "mcspi1"; ++ ti,spi-num-cs = <4>; ++ dmas = <&sdma 35>, ++ <&sdma 36>, ++ <&sdma 37>, ++ <&sdma 38>, ++ <&sdma 39>, ++ <&sdma 40>, ++ <&sdma 41>, ++ <&sdma 42>; ++ dma-names = "tx0", "rx0", "tx1", "rx1", ++ "tx2", "rx2", "tx3", "rx3"; ++ status = "disabled"; ++ }; ++ ++ mcspi2: spi@4809a000 { ++ compatible = "ti,omap4-mcspi"; ++ reg = <0x4809a000 0x200>; ++ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ti,hwmods = "mcspi2"; ++ ti,spi-num-cs = <2>; ++ dmas = <&sdma 43>, ++ <&sdma 44>, ++ <&sdma 45>, ++ <&sdma 46>; ++ dma-names = "tx0", "rx0", "tx1", "rx1"; ++ status = "disabled"; ++ }; ++ ++ mcspi3: spi@480b8000 { ++ compatible = "ti,omap4-mcspi"; ++ reg = <0x480b8000 0x200>; ++ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ti,hwmods = "mcspi3"; ++ ti,spi-num-cs = <2>; ++ dmas = <&sdma 15>, <&sdma 16>; ++ dma-names = "tx0", "rx0"; ++ status = "disabled"; ++ }; ++ ++ mcspi4: spi@480ba000 { ++ compatible = "ti,omap4-mcspi"; ++ reg = <0x480ba000 0x200>; ++ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ti,hwmods = "mcspi4"; ++ ti,spi-num-cs = <1>; ++ dmas = <&sdma 70>, <&sdma 71>; ++ dma-names = "tx0", "rx0"; ++ status = "disabled"; ++ }; ++ }; ++}; +diff --git a/include/dt-bindings/pinctrl/dra.h b/include/dt-bindings/pinctrl/dra.h +new file mode 100644 +index 0000000..002a285 +--- /dev/null ++++ b/include/dt-bindings/pinctrl/dra.h +@@ -0,0 +1,50 @@ ++/* ++ * This header provides constants for DRA pinctrl bindings. ++ * ++ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ ++ * Author: Rajendra Nayak <rnayak@ti.com> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef _DT_BINDINGS_PINCTRL_DRA_H ++#define _DT_BINDINGS_PINCTRL_DRA_H ++ ++/* DRA7 mux mode options for each pin. See TRM for options */ ++#define MUX_MODE0 0x0 ++#define MUX_MODE1 0x1 ++#define MUX_MODE2 0x2 ++#define MUX_MODE3 0x3 ++#define MUX_MODE4 0x4 ++#define MUX_MODE5 0x5 ++#define MUX_MODE6 0x6 ++#define MUX_MODE7 0x7 ++#define MUX_MODE8 0x8 ++#define MUX_MODE9 0x9 ++#define MUX_MODE10 0xa ++#define MUX_MODE11 0xb ++#define MUX_MODE12 0xc ++#define MUX_MODE13 0xd ++#define MUX_MODE14 0xe ++#define MUX_MODE15 0xf ++ ++#define PULL_ENA (1 << 16) ++#define PULL_UP (1 << 17) ++#define INPUT_EN (1 << 18) ++#define SLEWCONTROL (1 << 19) ++#define WAKEUP_EN (1 << 24) ++#define WAKEUP_EVENT (1 << 25) ++ ++/* Active pin states */ ++#define PIN_OUTPUT 0 ++#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP) ++#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA) ++#define PIN_INPUT INPUT_EN ++#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) ++#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) ++#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) ++ ++#endif ++ diff --git a/patches/linux-3.12/0217-ARM-dts-AM4372-cpu-s-node-per-latest-binding.patch b/patches/linux-3.12/0217-ARM-dts-AM4372-cpu-s-node-per-latest-binding.patch new file mode 100644 index 0000000..f2b66c8 --- /dev/null +++ b/patches/linux-3.12/0217-ARM-dts-AM4372-cpu-s-node-per-latest-binding.patch @@ -0,0 +1,30 @@ +From: Afzal Mohammed <afzal@ti.com> +Date: Fri, 2 Aug 2013 19:16:13 +0530 +Subject: [PATCH] ARM: dts: AM4372: cpu(s) node per latest binding + +Update AM4372 cpu node to the latest cpus/cpu bindings for ARM. + +Signed-off-by: Afzal Mohammed <afzal@ti.com> +Acked-by: Mark Rutland <mark.rutland@arm.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am4372.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi +index ddc1df7..4635e7f 100644 +--- a/arch/arm/boot/dts/am4372.dtsi ++++ b/arch/arm/boot/dts/am4372.dtsi +@@ -22,8 +22,12 @@ + }; + + cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; + cpu@0 { + compatible = "arm,cortex-a9"; ++ device_type = "cpu"; ++ reg = <0>; + }; + }; + diff --git a/patches/linux-3.12/0218-ARM-dts-AM4372-add-few-nodes.patch b/patches/linux-3.12/0218-ARM-dts-AM4372-add-few-nodes.patch new file mode 100644 index 0000000..d767d29 --- /dev/null +++ b/patches/linux-3.12/0218-ARM-dts-AM4372-add-few-nodes.patch @@ -0,0 +1,402 @@ +From: Afzal Mohammed <afzal@ti.com> +Date: Fri, 2 Aug 2013 19:16:35 +0530 +Subject: [PATCH] ARM: dts: AM4372: add few nodes + +Populate uarts, timers, rtc, wdt, gpio, i2c, spi, cpsw & pwm nodes. + +Reason for adding these nodes early - hwmod code required address +space of peripherals corresponding to these nodes (as address space +details are removed from hwmod database). + +uart0, timers - 1 & 2 and synctimer were already present, so here the +remaining uarts & timers are added. + +All properties as per the existing binding has been added for uart, +timer, rtc, wdt & gpio. Even though that was not the current scope +of work, felt adding those would reduce or require no effort later +to get these peripherals working. + +For i2c, spi, cpsw & pwm - only the properties that were sure to be +correct has been added (main intention is to make hwmod happy and +avoid any later modification to here added properties). + +While at it add "ti,hwmod" property to already existing nodes. + +Signed-off-by: Afzal Mohammed <afzal@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am4372.dtsi | 343 ++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 343 insertions(+) + +diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi +index 4635e7f..0fe393a 100644 +--- a/arch/arm/boot/dts/am4372.dtsi ++++ b/arch/arm/boot/dts/am4372.dtsi +@@ -49,6 +49,47 @@ + compatible = "ti,am4372-uart","ti,omap2-uart"; + reg = <0x44e09000 0x2000>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart1"; ++ }; ++ ++ uart1: serial@48022000 { ++ compatible = "ti,am4372-uart","ti,omap2-uart"; ++ reg = <0x48022000 0x2000>; ++ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart2"; ++ status = "disabled"; ++ }; ++ ++ uart2: serial@48024000 { ++ compatible = "ti,am4372-uart","ti,omap2-uart"; ++ reg = <0x48024000 0x2000>; ++ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart3"; ++ status = "disabled"; ++ }; ++ ++ uart3: serial@481a6000 { ++ compatible = "ti,am4372-uart","ti,omap2-uart"; ++ reg = <0x481a6000 0x2000>; ++ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart4"; ++ status = "disabled"; ++ }; ++ ++ uart4: serial@481a8000 { ++ compatible = "ti,am4372-uart","ti,omap2-uart"; ++ reg = <0x481a8000 0x2000>; ++ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart5"; ++ status = "disabled"; ++ }; ++ ++ uart5: serial@481aa000 { ++ compatible = "ti,am4372-uart","ti,omap2-uart"; ++ reg = <0x481aa000 0x2000>; ++ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "uart6"; ++ status = "disabled"; + }; + + timer1: timer@44e31000 { +@@ -56,17 +97,319 @@ + reg = <0x44e31000 0x400>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; + ti,timer-alwon; ++ ti,hwmods = "timer1"; + }; + + timer2: timer@48040000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x48040000 0x400>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer2"; ++ }; ++ ++ timer3: timer@48042000 { ++ compatible = "ti,am4372-timer","ti,am335x-timer"; ++ reg = <0x48042000 0x400>; ++ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer3"; ++ status = "disabled"; ++ }; ++ ++ timer4: timer@48044000 { ++ compatible = "ti,am4372-timer","ti,am335x-timer"; ++ reg = <0x48044000 0x400>; ++ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; ++ ti,timer-pwm; ++ ti,hwmods = "timer4"; ++ status = "disabled"; ++ }; ++ ++ timer5: timer@48046000 { ++ compatible = "ti,am4372-timer","ti,am335x-timer"; ++ reg = <0x48046000 0x400>; ++ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; ++ ti,timer-pwm; ++ ti,hwmods = "timer5"; ++ status = "disabled"; ++ }; ++ ++ timer6: timer@48048000 { ++ compatible = "ti,am4372-timer","ti,am335x-timer"; ++ reg = <0x48048000 0x400>; ++ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; ++ ti,timer-pwm; ++ ti,hwmods = "timer6"; ++ status = "disabled"; ++ }; ++ ++ timer7: timer@4804a000 { ++ compatible = "ti,am4372-timer","ti,am335x-timer"; ++ reg = <0x4804a000 0x400>; ++ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; ++ ti,timer-pwm; ++ ti,hwmods = "timer7"; ++ status = "disabled"; ++ }; ++ ++ timer8: timer@481c1000 { ++ compatible = "ti,am4372-timer","ti,am335x-timer"; ++ reg = <0x481c1000 0x400>; ++ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer8"; ++ status = "disabled"; ++ }; ++ ++ timer9: timer@4833d000 { ++ compatible = "ti,am4372-timer","ti,am335x-timer"; ++ reg = <0x4833d000 0x400>; ++ interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer9"; ++ status = "disabled"; ++ }; ++ ++ timer10: timer@4833f000 { ++ compatible = "ti,am4372-timer","ti,am335x-timer"; ++ reg = <0x4833f000 0x400>; ++ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer10"; ++ status = "disabled"; ++ }; ++ ++ timer11: timer@48341000 { ++ compatible = "ti,am4372-timer","ti,am335x-timer"; ++ reg = <0x48341000 0x400>; ++ interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "timer11"; ++ status = "disabled"; + }; + + counter32k: counter@44e86000 { + compatible = "ti,am4372-counter32k","ti,omap-counter32k"; + reg = <0x44e86000 0x40>; ++ ti,hwmods = "counter_32k"; ++ }; ++ ++ rtc@44e3e000 { ++ compatible = "ti,am4372-rtc","ti,da830-rtc"; ++ reg = <0x44e3e000 0x1000>; ++ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH ++ GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "rtc"; ++ status = "disabled"; ++ }; ++ ++ wdt@44e35000 { ++ compatible = "ti,am4372-wdt","ti,omap3-wdt"; ++ reg = <0x44e35000 0x1000>; ++ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "wd_timer2"; ++ status = "disabled"; ++ }; ++ ++ gpio0: gpio@44e07000 { ++ compatible = "ti,am4372-gpio","ti,omap4-gpio"; ++ reg = <0x44e07000 0x1000>; ++ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ ti,hwmods = "gpio1"; ++ status = "disabled"; ++ }; ++ ++ gpio1: gpio@4804c000 { ++ compatible = "ti,am4372-gpio","ti,omap4-gpio"; ++ reg = <0x4804c000 0x1000>; ++ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ ti,hwmods = "gpio2"; ++ status = "disabled"; ++ }; ++ ++ gpio2: gpio@481ac000 { ++ compatible = "ti,am4372-gpio","ti,omap4-gpio"; ++ reg = <0x481ac000 0x1000>; ++ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ ti,hwmods = "gpio3"; ++ status = "disabled"; ++ }; ++ ++ gpio3: gpio@481ae000 { ++ compatible = "ti,am4372-gpio","ti,omap4-gpio"; ++ reg = <0x481ae000 0x1000>; ++ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ ti,hwmods = "gpio4"; ++ status = "disabled"; ++ }; ++ ++ gpio4: gpio@48320000 { ++ compatible = "ti,am4372-gpio","ti,omap4-gpio"; ++ reg = <0x48320000 0x1000>; ++ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ ti,hwmods = "gpio5"; ++ status = "disabled"; ++ }; ++ ++ gpio5: gpio@48322000 { ++ compatible = "ti,am4372-gpio","ti,omap4-gpio"; ++ reg = <0x48322000 0x1000>; ++ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ ti,hwmods = "gpio6"; ++ status = "disabled"; ++ }; ++ ++ i2c0: i2c@44e0b000 { ++ compatible = "ti,am4372-i2c","ti,omap4-i2c"; ++ reg = <0x44e0b000 0x1000>; ++ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "i2c1"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c1: i2c@4802a000 { ++ compatible = "ti,am4372-i2c","ti,omap4-i2c"; ++ reg = <0x4802a000 0x1000>; ++ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "i2c2"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c2: i2c@4819c000 { ++ compatible = "ti,am4372-i2c","ti,omap4-i2c"; ++ reg = <0x4819c000 0x1000>; ++ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "i2c3"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi0: spi@48030000 { ++ compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; ++ reg = <0x48030000 0x400>; ++ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "spi0"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi1: spi@481a0000 { ++ compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; ++ reg = <0x481a0000 0x400>; ++ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "spi1"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi2: spi@481a2000 { ++ compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; ++ reg = <0x481a2000 0x400>; ++ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "spi2"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi3: spi@481a4000 { ++ compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; ++ reg = <0x481a4000 0x400>; ++ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "spi3"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi4: spi@48345000 { ++ compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; ++ reg = <0x48345000 0x400>; ++ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "spi4"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ mac: ethernet@4a100000 { ++ compatible = "ti,am4372-cpsw","ti,cpsw"; ++ reg = <0x4a100000 0x800 ++ 0x4a101200 0x100>; ++ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH ++ GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH ++ GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH ++ GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "cpgmac0"; ++ status = "disabled"; ++ }; ++ ++ epwmss0: epwmss@48300000 { ++ compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; ++ reg = <0x48300000 0x10>; ++ ti,hwmods = "epwmss0"; ++ status = "disabled"; ++ }; ++ ++ epwmss1: epwmss@48302000 { ++ compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; ++ reg = <0x48302000 0x10>; ++ ti,hwmods = "epwmss1"; ++ status = "disabled"; ++ }; ++ ++ epwmss2: epwmss@48304000 { ++ compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; ++ reg = <0x48304000 0x10>; ++ ti,hwmods = "epwmss2"; ++ status = "disabled"; ++ }; ++ ++ epwmss3: epwmss@48306000 { ++ compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; ++ reg = <0x48306000 0x10>; ++ ti,hwmods = "epwmss3"; ++ status = "disabled"; ++ }; ++ ++ epwmss4: epwmss@48308000 { ++ compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; ++ reg = <0x48308000 0x10>; ++ ti,hwmods = "epwmss4"; ++ status = "disabled"; ++ }; ++ ++ epwmss5: epwmss@4830a000 { ++ compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; ++ reg = <0x4830a000 0x10>; ++ ti,hwmods = "epwmss5"; ++ status = "disabled"; + }; + }; + }; diff --git a/patches/linux-3.12/0219-ARM-dts-Add-devicetree-for-gta04-board.patch b/patches/linux-3.12/0219-ARM-dts-Add-devicetree-for-gta04-board.patch new file mode 100644 index 0000000..8744497 --- /dev/null +++ b/patches/linux-3.12/0219-ARM-dts-Add-devicetree-for-gta04-board.patch @@ -0,0 +1,201 @@ +From: Marek Belisko <marek@goldelico.com> +Date: Thu, 15 Aug 2013 22:43:05 +0200 +Subject: [PATCH] ARM: dts: Add devicetree for gta04 board. + +This adds devicetree for gta04 (Openmoko next generation board) with necessary +support for mmc, usb, leds and button. + +Signed-off-by: Marek Belisko <marek@goldelico.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/omap3-gta04.dts | 168 ++++++++++++++++++++++++++++++++++++++ + 2 files changed, 169 insertions(+) + create mode 100644 arch/arm/boot/dts/omap3-gta04.dts + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index b057b0e..1be0c95 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -174,6 +174,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ + omap3-evm.dtb \ + omap3-n900.dtb \ + omap3-tobi.dtb \ ++ omap3-gta04.dtb \ + omap3-igep0020.dtb \ + omap3-igep0030.dtb \ + omap4-panda.dtb \ +diff --git a/arch/arm/boot/dts/omap3-gta04.dts b/arch/arm/boot/dts/omap3-gta04.dts +new file mode 100644 +index 0000000..a84684a +--- /dev/null ++++ b/arch/arm/boot/dts/omap3-gta04.dts +@@ -0,0 +1,168 @@ ++/* ++ * Copyright (C) 2013 Marek Belisko <marek@goldelico.com> ++ * ++ * Based on omap3-beagle-xm.dts ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++/dts-v1/; ++ ++#include "omap36xx.dtsi" ++ ++/ { ++ model = "OMAP3 GTA04"; ++ compatible = "ti,omap3-gta04", "ti,omap3"; ++ ++ cpus { ++ cpu@0 { ++ cpu0-supply = <&vcc>; ++ }; ++ }; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x80000000 0x20000000>; /* 512 MB */ ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ ++ aux-button { ++ label = "aux"; ++ linux,code = <169>; ++ gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; ++ gpio-key,wakeup; ++ }; ++ }; ++}; ++ ++&omap3_pmx_core { ++ uart1_pins: pinmux_uart1_pins { ++ pinctrl-single,pins = < ++ 0x152 (PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ ++ 0x14c (PIN_OUTPUT |MUX_MODE0) /* uart1_tx.uart1_tx */ ++ >; ++ }; ++ ++ uart2_pins: pinmux_uart2_pins { ++ pinctrl-single,pins = < ++ 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ ++ 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ ++ >; ++ }; ++ ++ uart3_pins: pinmux_uart3_pins { ++ pinctrl-single,pins = < ++ 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */ ++ 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */ ++ >; ++ }; ++ ++ mmc1_pins: pinmux_mmc1_pins { ++ pinctrl-single,pins = < ++ 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ ++ 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ ++ 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ ++ 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ ++ 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ ++ 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ ++ >; ++ }; ++}; ++ ++&i2c1 { ++ clock-frequency = <2600000>; ++ ++ twl: twl@48 { ++ reg = <0x48>; ++ interrupts = <7>; /* SYS_NIRQ cascaded to intc */ ++ interrupt-parent = <&intc>; ++ }; ++}; ++ ++#include "twl4030.dtsi" ++#include "twl4030_omap3.dtsi" ++ ++&i2c2 { ++ clock-frequency = <400000>; ++ ++ /* pressure sensor */ ++ bmp085@77 { ++ compatible = "bosch,bmp085"; ++ reg = <0x77>; ++ }; ++ ++ /* leds */ ++ tca6507@45 { ++ compatible = "ti,tca6507"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x45>; ++ ++ gta04_led0: red_aux@0 { ++ label = "gta04:red:aux"; ++ reg = <0x0>; ++ }; ++ ++ gta04_led1: green_aux@1 { ++ label = "gta04:green:aux"; ++ reg = <0x1>; ++ }; ++ ++ gta04_led3: red_power@3 { ++ label = "gta04:red:power"; ++ reg = <0x3>; ++ linux,default-trigger = "default-on"; ++ }; ++ ++ gta04_led4: green_power@4 { ++ label = "gta04:green:power"; ++ reg = <0x4>; ++ }; ++ }; ++}; ++ ++&i2c3 { ++ clock-frequency = <100000>; ++}; ++ ++&usb_otg_hs { ++ interface-type = <0>; ++ usb-phy = <&usb2_phy>; ++ mode = <3>; ++ power = <50>; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ vmmc-supply = <&vmmc1>; ++ vmmc_aux-supply = <&vsim>; ++ bus-width = <4>; ++}; ++ ++&mmc2 { ++ status = "disabled"; ++}; ++ ++&mmc3 { ++ status = "disabled"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2_pins>; ++}; ++ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; ++}; ++ diff --git a/patches/linux-3.12/0220-ARM-dts-omap3-beagle-Make-USB-host-pin-naming-consis.patch b/patches/linux-3.12/0220-ARM-dts-omap3-beagle-Make-USB-host-pin-naming-consis.patch new file mode 100644 index 0000000..6d2c657 --- /dev/null +++ b/patches/linux-3.12/0220-ARM-dts-omap3-beagle-Make-USB-host-pin-naming-consis.patch @@ -0,0 +1,48 @@ +From: Roger Quadros <rogerq@ti.com> +Date: Thu, 15 Aug 2013 13:18:28 +0300 +Subject: [PATCH] ARM: dts: omap3-beagle: Make USB host pin naming consistent + +Use a common naming scheme "mode0name.modename flags" for the +USB host pins to be consistent. + +Signed-off-by: Roger Quadros <rogerq@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-beagle.dts | 24 ++++++++++++------------ + 1 file changed, 12 insertions(+), 12 deletions(-) + +diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts +index dfd8310..2e29e81 100644 +--- a/arch/arm/boot/dts/omap3-beagle.dts ++++ b/arch/arm/boot/dts/omap3-beagle.dts +@@ -101,18 +101,18 @@ + + hsusbb2_pins: pinmux_hsusbb2_pins { + pinctrl-single,pins = < +- 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_clk */ +- 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_stp */ +- 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dir */ +- 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_nxt */ +- 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat0 */ +- 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat1 */ +- 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat2 */ +- 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat3 */ +- 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat4 */ +- 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat5 */ +- 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat6 */ +- 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat7 */ ++ 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ ++ 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ ++ 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ ++ 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ ++ 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ ++ 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ ++ 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ ++ 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ ++ 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ ++ 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ ++ 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ ++ 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ + >; + }; + diff --git a/patches/linux-3.12/0221-ARM-dts-OMAP5-add-palmas-usb-node.patch b/patches/linux-3.12/0221-ARM-dts-OMAP5-add-palmas-usb-node.patch new file mode 100644 index 0000000..3f4e9bb --- /dev/null +++ b/patches/linux-3.12/0221-ARM-dts-OMAP5-add-palmas-usb-node.patch @@ -0,0 +1,61 @@ +From: Felipe Balbi <balbi@ti.com> +Date: Wed, 21 Aug 2013 20:01:32 +0530 +Subject: [PATCH] ARM: dts: OMAP5: add palmas-usb node + +Without this node, there will be no palmas driver to notify +dwc3 that a cable has been connected and, without that, dwc3 +will never initialize. + +Signed-off-by: Felipe Balbi <balbi@ti.com> +[kishon@ti.com: added dt properties for enabling vbus/id interrupts +and fixed vbus-supply value after SMPS10 is modeled as 2 regulators] +Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5-uevm.dts | 12 ++++++++++++ + arch/arm/boot/dts/omap5.dtsi | 2 +- + 2 files changed, 13 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts +index 05b9b12..da25a14 100644 +--- a/arch/arm/boot/dts/omap5-uevm.dts ++++ b/arch/arm/boot/dts/omap5-uevm.dts +@@ -272,6 +272,13 @@ + interrupt-controller; + #interrupt-cells = <2>; + ++ extcon_usb3: palmas_usb { ++ compatible = "ti,palmas-usb-vid"; ++ ti,enable-vbus-detection; ++ ti,enable-id-detection; ++ ti,wakeup; ++ }; ++ + palmas_pmic { + compatible = "ti,palmas-pmic"; + interrupt-parent = <&palmas>; +@@ -479,6 +486,11 @@ + phys = <0 &hsusb2_phy &hsusb3_phy>; + }; + ++&usb3 { ++ extcon = <&extcon_usb3>; ++ vbus-supply = <&smps10_out1_reg>; ++}; ++ + &mcspi1 { + + }; +diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi +index ecc06a9..6192c45 100644 +--- a/arch/arm/boot/dts/omap5.dtsi ++++ b/arch/arm/boot/dts/omap5.dtsi +@@ -634,7 +634,7 @@ + ti,type = <2>; + }; + +- omap_dwc3@4a020000 { ++ usb3: omap_dwc3@4a020000 { + compatible = "ti,dwc3"; + ti,hwmods = "usb_otg_ss"; + reg = <0x4a020000 0x10000>; diff --git a/patches/linux-3.12/0222-ARM-dts-AM33XX-Add-EDMA-support.patch b/patches/linux-3.12/0222-ARM-dts-AM33XX-Add-EDMA-support.patch new file mode 100644 index 0000000..ee0193c --- /dev/null +++ b/patches/linux-3.12/0222-ARM-dts-AM33XX-Add-EDMA-support.patch @@ -0,0 +1,42 @@ +From: Matt Porter <mdp@ti.com> +Date: Tue, 10 Sep 2013 14:24:37 -0500 +Subject: [PATCH] ARM: dts: AM33XX: Add EDMA support + +Adds AM33XX EDMA support to the am33xx.dtsi as documented in +Documentation/devicetree/bindings/dma/ti-edma.txt + +[Joel Fernandes <joelf@ti.com>] +Drop DT entries that are non-hardware-description as discussed in [1] + +[1] https://patchwork.kernel.org/patch/2226761/ + +Signed-off-by: Matt Porter <mporter@ti.com> +Signed-off-by: Joel A Fernandes <joelagnel@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am33xx.dtsi | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index 2d571c8..799f133 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -105,6 +105,18 @@ + reg = <0x48200000 0x1000>; + }; + ++ edma: edma@49000000 { ++ compatible = "ti,edma3"; ++ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; ++ reg = <0x49000000 0x10000>, ++ <0x44e10f90 0x10>; ++ interrupts = <12 13 14>; ++ #dma-cells = <1>; ++ dma-channels = <64>; ++ ti,edma-regions = <4>; ++ ti,edma-slots = <256>; ++ }; ++ + gpio0: gpio@44e07000 { + compatible = "ti,omap4-gpio"; + ti,hwmods = "gpio1"; diff --git a/patches/linux-3.12/0223-ARM-dts-AM33XX-Add-SPI-DMA-support.patch b/patches/linux-3.12/0223-ARM-dts-AM33XX-Add-SPI-DMA-support.patch new file mode 100644 index 0000000..6ce05b1 --- /dev/null +++ b/patches/linux-3.12/0223-ARM-dts-AM33XX-Add-SPI-DMA-support.patch @@ -0,0 +1,41 @@ +From: Matt Porter <mporter@ti.com> +Date: Tue, 10 Sep 2013 14:24:38 -0500 +Subject: [PATCH] ARM: dts: AM33XX: Add SPI DMA support + +Adds DMA resources to the AM33XX SPI nodes. + +Signed-off-by: Matt Porter <mporter@ti.com> +Signed-off-by: Joel A Fernandes <joelagnel@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am33xx.dtsi | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index 799f133..a49da7f 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -340,6 +340,11 @@ + interrupts = <65>; + ti,spi-num-cs = <2>; + ti,hwmods = "spi0"; ++ dmas = <&edma 16 ++ &edma 17 ++ &edma 18 ++ &edma 19>; ++ dma-names = "tx0", "rx0", "tx1", "rx1"; + status = "disabled"; + }; + +@@ -351,6 +356,11 @@ + interrupts = <125>; + ti,spi-num-cs = <2>; + ti,hwmods = "spi1"; ++ dmas = <&edma 42 ++ &edma 43 ++ &edma 44 ++ &edma 45>; ++ dma-names = "tx0", "rx0", "tx1", "rx1"; + status = "disabled"; + }; + diff --git a/patches/linux-3.12/0224-ARM-dts-AM33XX-Add-MMC-support-and-documentation.patch b/patches/linux-3.12/0224-ARM-dts-AM33XX-Add-MMC-support-and-documentation.patch new file mode 100644 index 0000000..06f2fa0 --- /dev/null +++ b/patches/linux-3.12/0224-ARM-dts-AM33XX-Add-MMC-support-and-documentation.patch @@ -0,0 +1,180 @@ +From: Matt Porter <mporter@ti.com> +Date: Tue, 10 Sep 2013 14:24:39 -0500 +Subject: [PATCH] ARM: dts: AM33XX: Add MMC support and documentation + +Adds AM33XX MMC support for am335x-bone, am335x-evm and am335x-evmsk boards. + +Also added is the DMA binding definitions based on the generic DMA request +binding. + +Additional changes made to DTS: +* Interrupt, reg and compatible properties added +* ti,needs-special-hs-handling added + +Signed-off-by: Matt Porter <mporter@ti.com> +Acked-by: Tony Lindgren <tony@atomide.com> +Signed-off-by: Joel Fernandes <joelf@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + .../devicetree/bindings/mmc/ti-omap-hsmmc.txt | 26 ++++++++++++++- + arch/arm/boot/dts/am335x-bone.dts | 11 +++++++ + arch/arm/boot/dts/am335x-evm.dts | 7 ++++ + arch/arm/boot/dts/am335x-evmsk.dts | 7 ++++ + arch/arm/boot/dts/am33xx.dtsi | 38 ++++++++++++++++++++++ + 5 files changed, 88 insertions(+), 1 deletion(-) + +diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt +index ed271fc..8c8908a 100644 +--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt ++++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt +@@ -20,8 +20,29 @@ ti,dual-volt: boolean, supports dual voltage cards + ti,non-removable: non-removable slot (like eMMC) + ti,needs-special-reset: Requires a special softreset sequence + ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed ++dmas: List of DMA specifiers with the controller specific format ++as described in the generic DMA client binding. A tx and rx ++specifier is required. ++dma-names: List of DMA request names. These strings correspond ++1:1 with the DMA specifiers listed in dmas. The string naming is ++to be "rx" and "tx" for RX and TX DMA requests, respectively. ++ ++Examples: ++ ++[hwmod populated DMA resources] ++ ++ mmc1: mmc@0x4809c000 { ++ compatible = "ti,omap4-hsmmc"; ++ reg = <0x4809c000 0x400>; ++ ti,hwmods = "mmc1"; ++ ti,dual-volt; ++ bus-width = <4>; ++ vmmc-supply = <&vmmc>; /* phandle to regulator node */ ++ ti,non-removable; ++ }; ++ ++[generic DMA request binding] + +-Example: + mmc1: mmc@0x4809c000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x4809c000 0x400>; +@@ -30,4 +51,7 @@ Example: + bus-width = <4>; + vmmc-supply = <&vmmc>; /* phandle to regulator node */ + ti,non-removable; ++ dmas = <&edma 24 ++ &edma 25>; ++ dma-names = "tx", "rx"; + }; +diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts +index 7993c48..d5f43fe 100644 +--- a/arch/arm/boot/dts/am335x-bone.dts ++++ b/arch/arm/boot/dts/am335x-bone.dts +@@ -9,3 +9,14 @@ + + #include "am33xx.dtsi" + #include "am335x-bone-common.dtsi" ++ ++&ldo3_reg { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++}; ++ ++&mmc1 { ++ status = "okay"; ++ vmmc-supply = <&ldo3_reg>; ++}; +diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts +index e8ec875..bc4a69d 100644 +--- a/arch/arm/boot/dts/am335x-evm.dts ++++ b/arch/arm/boot/dts/am335x-evm.dts +@@ -477,6 +477,8 @@ + }; + + vmmc_reg: regulator@12 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; +@@ -517,3 +519,8 @@ + ti,adc-channels = <4 5 6 7>; + }; + }; ++ ++&mmc1 { ++ status = "okay"; ++ vmmc-supply = <&vmmc_reg>; ++}; +diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts +index 4f339fa..55fd194 100644 +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -393,6 +393,8 @@ + }; + + vmmc_reg: regulator@12 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; +@@ -419,3 +421,8 @@ + phy_id = <&davinci_mdio>, <1>; + phy-mode = "rgmii-txid"; + }; ++ ++&mmc1 { ++ status = "okay"; ++ vmmc-supply = <&vmmc_reg>; ++}; +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index a49da7f..179b0bc 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -245,6 +245,44 @@ + status = "disabled"; + }; + ++ mmc1: mmc@48060000 { ++ compatible = "ti,omap4-hsmmc"; ++ ti,hwmods = "mmc1"; ++ ti,dual-volt; ++ ti,needs-special-reset; ++ ti,needs-special-hs-handling; ++ dmas = <&edma 24 ++ &edma 25>; ++ dma-names = "tx", "rx"; ++ interrupts = <64>; ++ interrupt-parent = <&intc>; ++ reg = <0x48060000 0x1000>; ++ status = "disabled"; ++ }; ++ ++ mmc2: mmc@481d8000 { ++ compatible = "ti,omap4-hsmmc"; ++ ti,hwmods = "mmc2"; ++ ti,needs-special-reset; ++ dmas = <&edma 2 ++ &edma 3>; ++ dma-names = "tx", "rx"; ++ interrupts = <28>; ++ interrupt-parent = <&intc>; ++ reg = <0x481d8000 0x1000>; ++ status = "disabled"; ++ }; ++ ++ mmc3: mmc@47810000 { ++ compatible = "ti,omap4-hsmmc"; ++ ti,hwmods = "mmc3"; ++ ti,needs-special-reset; ++ interrupts = <29>; ++ interrupt-parent = <&intc>; ++ reg = <0x47810000 0x1000>; ++ status = "disabled"; ++ }; ++ + wdt2: wdt@44e35000 { + compatible = "ti,omap3-wdt"; + ti,hwmods = "wd_timer2"; diff --git a/patches/linux-3.12/0225-ARM-dts-am335x-bone-add-CD-for-mmc1.patch b/patches/linux-3.12/0225-ARM-dts-am335x-bone-add-CD-for-mmc1.patch new file mode 100644 index 0000000..d3567d3 --- /dev/null +++ b/patches/linux-3.12/0225-ARM-dts-am335x-bone-add-CD-for-mmc1.patch @@ -0,0 +1,56 @@ +From: Alexander Holler <holler@ahsoftware.de> +Date: Thu, 12 Sep 2013 20:35:32 +0200 +Subject: [PATCH] ARM: dts: am335x-bone: add CD for mmc1 + +This enables the use of MMC cards even when no card was inserted at boot. + +Signed-off-by: Alexander Holler <holler@ahsoftware.de> +Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> +Tested-by: Kevin Hilman <khilman@linaro.org> +Reviewed-by: Nishanth Menon <nm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-bone-common.dtsi | 14 ++++++++++++++ + arch/arm/boot/dts/am335x-bone.dts | 1 - + 2 files changed, 14 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi +index 2f66ded..0d95d54 100644 +--- a/arch/arm/boot/dts/am335x-bone-common.dtsi ++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi +@@ -107,6 +107,12 @@ + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; ++ ++ mmc1_pins: pinmux_mmc1_pins { ++ pinctrl-single,pins = < ++ 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ ++ >; ++ }; + }; + + ocp { +@@ -260,3 +266,11 @@ + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; + }; ++ ++&mmc1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; ++ cd-inverted; ++}; +diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts +index d5f43fe..0d63348 100644 +--- a/arch/arm/boot/dts/am335x-bone.dts ++++ b/arch/arm/boot/dts/am335x-bone.dts +@@ -17,6 +17,5 @@ + }; + + &mmc1 { +- status = "okay"; + vmmc-supply = <&ldo3_reg>; + }; diff --git a/patches/linux-3.12/0226-ARM-dts-am335x-boneblack-add-eMMC-DT-entry.patch b/patches/linux-3.12/0226-ARM-dts-am335x-boneblack-add-eMMC-DT-entry.patch new file mode 100644 index 0000000..beeb6cf --- /dev/null +++ b/patches/linux-3.12/0226-ARM-dts-am335x-boneblack-add-eMMC-DT-entry.patch @@ -0,0 +1,78 @@ +From: Koen Kooi <koen@dominion.thruhere.net> +Date: Thu, 12 Sep 2013 20:35:33 +0200 +Subject: [PATCH] ARM: dts: am335x-boneblack: add eMMC DT entry + +The pinmux is specified in am335x-bone-common.dtsi to be +reused by the eMMC cape. + +Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> +Tested-by: Kevin Hilman <khilman@linaro.org> +Reviewed-by: Nishanth Menon <nm@ti.com> +[bcousson@baylibre.com: Fix traling spaces and useless comments] +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-bone-common.dtsi | 22 ++++++++++++++++++++++ + arch/arm/boot/dts/am335x-boneblack.dts | 13 +++++++++++++ + 2 files changed, 35 insertions(+) + +diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi +index 0d95d54..c560cb7 100644 +--- a/arch/arm/boot/dts/am335x-bone-common.dtsi ++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi +@@ -113,6 +113,21 @@ + 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ + >; + }; ++ ++ emmc_pins: pinmux_emmc_pins { ++ pinctrl-single,pins = < ++ 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ ++ 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */ ++ 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ ++ 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ ++ 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ ++ 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ ++ 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ ++ 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ ++ 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ ++ 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ ++ >; ++ }; + }; + + ocp { +@@ -242,6 +257,13 @@ + regulator-always-on; + }; + }; ++ ++ vmmcsd_fixed: fixedregulator@0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vmmcsd_fixed"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; + }; + + &cpsw_emac0 { +diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts +index 197cadf..16b3bea 100644 +--- a/arch/arm/boot/dts/am335x-boneblack.dts ++++ b/arch/arm/boot/dts/am335x-boneblack.dts +@@ -15,3 +15,16 @@ + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; ++ ++&mmc1 { ++ vmmc-supply = <&vmmcsd_fixed>; ++}; ++ ++&mmc2 { ++ vmmc-supply = <&vmmcsd_fixed>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_pins>; ++ bus-width = <8>; ++ status = "okay"; ++ ti,vcc-aux-disable-is-sleep; ++}; diff --git a/patches/linux-3.12/0227-ARM-dts-am335x-bone-common-switch-mmc1-to-4-bit-mode.patch b/patches/linux-3.12/0227-ARM-dts-am335x-bone-common-switch-mmc1-to-4-bit-mode.patch new file mode 100644 index 0000000..427b95c --- /dev/null +++ b/patches/linux-3.12/0227-ARM-dts-am335x-bone-common-switch-mmc1-to-4-bit-mode.patch @@ -0,0 +1,26 @@ +From: Koen Kooi <koen@dominion.thruhere.net> +Date: Thu, 12 Sep 2013 20:35:34 +0200 +Subject: [PATCH] ARM: dts: am335x-bone-common: switch mmc1 to 4-bit mode + +The micro-SD slot hooks up all four data pins so lets' use them. + +Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> +Tested-by: Kevin Hilman <khilman@linaro.org> +Reviewed-by: Nishanth Menon <nm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-bone-common.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi +index c560cb7..fbb11dd 100644 +--- a/arch/arm/boot/dts/am335x-bone-common.dtsi ++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi +@@ -291,6 +291,7 @@ + + &mmc1 { + status = "okay"; ++ bus-width = <0x4>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; diff --git a/patches/linux-3.12/0228-ARM-dts-am335x-bone-common-add-cpu0-and-mmc1-trigger.patch b/patches/linux-3.12/0228-ARM-dts-am335x-bone-common-add-cpu0-and-mmc1-trigger.patch new file mode 100644 index 0000000..7c49f10 --- /dev/null +++ b/patches/linux-3.12/0228-ARM-dts-am335x-bone-common-add-cpu0-and-mmc1-trigger.patch @@ -0,0 +1,43 @@ +From: Koen Kooi <koen@dominion.thruhere.net> +Date: Thu, 12 Sep 2013 20:35:35 +0200 +Subject: [PATCH] ARM: dts: am335x-bone-common: add cpu0 and mmc1 triggers + +This matches the vendor 3.8.x configuration that is shipping +with the boards. + +The LED layout is now: + USR0: heartbeat + USR1: mmc0 (micro-SD slot) + USR2: cpu0 + USR3: mmc1 (eMMC) + +The cpu0 triggers was put in between the mmc triggers to make +is easier to see where the disk activity is. + +Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> +Tested-by: Kevin Hilman <khilman@linaro.org> +Reviewed-by: Nishanth Menon <nm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-bone-common.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi +index fbb11dd..56361ce 100644 +--- a/arch/arm/boot/dts/am335x-bone-common.dtsi ++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi +@@ -204,12 +204,14 @@ + led@4 { + label = "beaglebone:green:usr2"; + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "cpu0"; + default-state = "off"; + }; + + led@5 { + label = "beaglebone:green:usr3"; + gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "mmc1"; + default-state = "off"; + }; + }; diff --git a/patches/linux-3.12/0229-ARM-dts-AM33XX-use-pinmux-node-defined-in-included-f.patch b/patches/linux-3.12/0229-ARM-dts-AM33XX-use-pinmux-node-defined-in-included-f.patch new file mode 100644 index 0000000..09b183e --- /dev/null +++ b/patches/linux-3.12/0229-ARM-dts-AM33XX-use-pinmux-node-defined-in-included-f.patch @@ -0,0 +1,804 @@ +From: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Date: Fri, 20 Sep 2013 17:00:00 +0200 +Subject: [PATCH] ARM: dts: AM33XX: use pinmux node defined in included file + +am33xx boards DTS include the am33xx.dtsi Device Tree +source file that already define a pinmux device node for +the AM33XX SoC Pin Multiplex. + +Redefining this for each board makes the Device Tree files +harder to modify and maintain so let's just use what is +already defined in the included .dtsi file. + +Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-bone-common.dtsi | 218 ++++++++++++------------- + arch/arm/boot/dts/am335x-evm.dts | 254 ++++++++++++++--------------- + arch/arm/boot/dts/am335x-evmsk.dts | 258 +++++++++++++++--------------- + 3 files changed, 365 insertions(+), 365 deletions(-) + +diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi +index 56361ce..29799ac 100644 +--- a/arch/arm/boot/dts/am335x-bone-common.dtsi ++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi +@@ -21,115 +21,6 @@ + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + +- am33xx_pinmux: pinmux@44e10800 { +- pinctrl-names = "default"; +- pinctrl-0 = <&clkout2_pin>; +- +- user_leds_s0: user_leds_s0 { +- pinctrl-single,pins = < +- 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ +- 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ +- 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ +- 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ +- >; +- }; +- +- i2c0_pins: pinmux_i2c0_pins { +- pinctrl-single,pins = < +- 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ +- 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ +- >; +- }; +- +- uart0_pins: pinmux_uart0_pins { +- pinctrl-single,pins = < +- 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ +- 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ +- >; +- }; +- +- clkout2_pin: pinmux_clkout2_pin { +- pinctrl-single,pins = < +- 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ +- >; +- }; +- +- cpsw_default: cpsw_default { +- pinctrl-single,pins = < +- /* Slave 1 */ +- 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ +- 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ +- 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ +- 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ +- 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ +- 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ +- 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ +- 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ +- 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ +- 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ +- 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ +- 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ +- 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ +- >; +- }; +- +- cpsw_sleep: cpsw_sleep { +- pinctrl-single,pins = < +- /* Slave 1 reset value */ +- 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- >; +- }; +- +- davinci_mdio_default: davinci_mdio_default { +- pinctrl-single,pins = < +- /* MDIO */ +- 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ +- 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ +- >; +- }; +- +- davinci_mdio_sleep: davinci_mdio_sleep { +- pinctrl-single,pins = < +- /* MDIO reset value */ +- 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- >; +- }; +- +- mmc1_pins: pinmux_mmc1_pins { +- pinctrl-single,pins = < +- 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ +- >; +- }; +- +- emmc_pins: pinmux_emmc_pins { +- pinctrl-single,pins = < +- 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ +- 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */ +- 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ +- 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ +- 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ +- 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ +- 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ +- 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ +- 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ +- 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ +- >; +- }; +- }; +- + ocp { + uart0: serial@44e09000 { + pinctrl-names = "default"; +@@ -217,6 +108,115 @@ + }; + }; + ++&am33xx_pinmux { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&clkout2_pin>; ++ ++ user_leds_s0: user_leds_s0 { ++ pinctrl-single,pins = < ++ 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ ++ 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ ++ 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ ++ 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ ++ >; ++ }; ++ ++ i2c0_pins: pinmux_i2c0_pins { ++ pinctrl-single,pins = < ++ 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ ++ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ ++ >; ++ }; ++ ++ uart0_pins: pinmux_uart0_pins { ++ pinctrl-single,pins = < ++ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ ++ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ ++ >; ++ }; ++ ++ clkout2_pin: pinmux_clkout2_pin { ++ pinctrl-single,pins = < ++ 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ ++ >; ++ }; ++ ++ cpsw_default: cpsw_default { ++ pinctrl-single,pins = < ++ /* Slave 1 */ ++ 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ ++ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ ++ 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ ++ 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ ++ 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ ++ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ ++ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ ++ 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ ++ 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ ++ 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ ++ 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ ++ 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ ++ 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ ++ >; ++ }; ++ ++ cpsw_sleep: cpsw_sleep { ++ pinctrl-single,pins = < ++ /* Slave 1 reset value */ ++ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ >; ++ }; ++ ++ davinci_mdio_default: davinci_mdio_default { ++ pinctrl-single,pins = < ++ /* MDIO */ ++ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ ++ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ ++ >; ++ }; ++ ++ davinci_mdio_sleep: davinci_mdio_sleep { ++ pinctrl-single,pins = < ++ /* MDIO reset value */ ++ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ >; ++ }; ++ ++ mmc1_pins: pinmux_mmc1_pins { ++ pinctrl-single,pins = < ++ 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ ++ >; ++ }; ++ ++ emmc_pins: pinmux_emmc_pins { ++ pinctrl-single,pins = < ++ 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ ++ 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */ ++ 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ ++ 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ ++ 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ ++ 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ ++ 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ ++ 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ ++ 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ ++ 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ ++ >; ++ }; ++}; ++ + /include/ "tps65217.dtsi" + + &tps { +diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts +index bc4a69d..1525cd6 100644 +--- a/arch/arm/boot/dts/am335x-evm.dts ++++ b/arch/arm/boot/dts/am335x-evm.dts +@@ -24,133 +24,6 @@ + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + +- am33xx_pinmux: pinmux@44e10800 { +- pinctrl-names = "default"; +- pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>; +- +- matrix_keypad_s0: matrix_keypad_s0 { +- pinctrl-single,pins = < +- 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ +- 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */ +- 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ +- 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */ +- 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */ +- >; +- }; +- +- volume_keys_s0: volume_keys_s0 { +- pinctrl-single,pins = < +- 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */ +- 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */ +- >; +- }; +- +- i2c0_pins: pinmux_i2c0_pins { +- pinctrl-single,pins = < +- 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ +- 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ +- >; +- }; +- +- i2c1_pins: pinmux_i2c1_pins { +- pinctrl-single,pins = < +- 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ +- 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ +- >; +- }; +- +- uart0_pins: pinmux_uart0_pins { +- pinctrl-single,pins = < +- 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ +- 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ +- >; +- }; +- +- clkout2_pin: pinmux_clkout2_pin { +- pinctrl-single,pins = < +- 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ +- >; +- }; +- +- nandflash_pins_s0: nandflash_pins_s0 { +- pinctrl-single,pins = < +- 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ +- 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ +- 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ +- 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ +- 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ +- 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ +- 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ +- 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ +- 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ +- 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ +- 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ +- 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ +- 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ +- 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ +- 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ +- >; +- }; +- +- ecap0_pins: backlight_pins { +- pinctrl-single,pins = < +- 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ +- >; +- }; +- +- cpsw_default: cpsw_default { +- pinctrl-single,pins = < +- /* Slave 1 */ +- 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ +- 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ +- 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ +- 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ +- 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ +- 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ +- 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ +- 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ +- 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ +- 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ +- 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ +- 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ +- >; +- }; +- +- cpsw_sleep: cpsw_sleep { +- pinctrl-single,pins = < +- /* Slave 1 reset value */ +- 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- >; +- }; +- +- davinci_mdio_default: davinci_mdio_default { +- pinctrl-single,pins = < +- /* MDIO */ +- 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ +- 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ +- >; +- }; +- +- davinci_mdio_sleep: davinci_mdio_sleep { +- pinctrl-single,pins = < +- /* MDIO reset value */ +- 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- >; +- }; +- }; +- + ocp { + uart0: serial@44e09000 { + pinctrl-names = "default"; +@@ -405,6 +278,133 @@ + }; + }; + ++&am33xx_pinmux { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>; ++ ++ matrix_keypad_s0: matrix_keypad_s0 { ++ pinctrl-single,pins = < ++ 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ ++ 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */ ++ 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ ++ 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */ ++ 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */ ++ >; ++ }; ++ ++ volume_keys_s0: volume_keys_s0 { ++ pinctrl-single,pins = < ++ 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */ ++ 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */ ++ >; ++ }; ++ ++ i2c0_pins: pinmux_i2c0_pins { ++ pinctrl-single,pins = < ++ 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ ++ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ ++ >; ++ }; ++ ++ i2c1_pins: pinmux_i2c1_pins { ++ pinctrl-single,pins = < ++ 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ ++ 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ ++ >; ++ }; ++ ++ uart0_pins: pinmux_uart0_pins { ++ pinctrl-single,pins = < ++ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ ++ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ ++ >; ++ }; ++ ++ clkout2_pin: pinmux_clkout2_pin { ++ pinctrl-single,pins = < ++ 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ ++ >; ++ }; ++ ++ nandflash_pins_s0: nandflash_pins_s0 { ++ pinctrl-single,pins = < ++ 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ ++ 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ ++ 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ ++ 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ ++ 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ ++ 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ ++ 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ ++ 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ ++ 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ ++ 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ ++ 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ ++ 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ ++ 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ ++ 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ ++ 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ ++ >; ++ }; ++ ++ ecap0_pins: backlight_pins { ++ pinctrl-single,pins = < ++ 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ ++ >; ++ }; ++ ++ cpsw_default: cpsw_default { ++ pinctrl-single,pins = < ++ /* Slave 1 */ ++ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ ++ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ ++ 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ ++ 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ ++ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ ++ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ ++ 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ ++ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ ++ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ ++ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ ++ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ ++ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ ++ >; ++ }; ++ ++ cpsw_sleep: cpsw_sleep { ++ pinctrl-single,pins = < ++ /* Slave 1 reset value */ ++ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ >; ++ }; ++ ++ davinci_mdio_default: davinci_mdio_default { ++ pinctrl-single,pins = < ++ /* MDIO */ ++ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ ++ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ ++ >; ++ }; ++ ++ davinci_mdio_sleep: davinci_mdio_sleep { ++ pinctrl-single,pins = < ++ /* MDIO reset value */ ++ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ >; ++ }; ++}; ++ + #include "tps65910.dtsi" + + &tps { +diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts +index 55fd194..f0066fe 100644 +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -31,135 +31,6 @@ + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + +- am33xx_pinmux: pinmux@44e10800 { +- pinctrl-names = "default"; +- pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; +- +- user_leds_s0: user_leds_s0 { +- pinctrl-single,pins = < +- 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ +- 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ +- 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ +- 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ +- >; +- }; +- +- gpio_keys_s0: gpio_keys_s0 { +- pinctrl-single,pins = < +- 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ +- 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ +- 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ +- 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ +- >; +- }; +- +- i2c0_pins: pinmux_i2c0_pins { +- pinctrl-single,pins = < +- 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ +- 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ +- >; +- }; +- +- uart0_pins: pinmux_uart0_pins { +- pinctrl-single,pins = < +- 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ +- 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ +- >; +- }; +- +- clkout2_pin: pinmux_clkout2_pin { +- pinctrl-single,pins = < +- 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ +- >; +- }; +- +- ecap2_pins: backlight_pins { +- pinctrl-single,pins = < +- 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ +- >; +- }; +- +- cpsw_default: cpsw_default { +- pinctrl-single,pins = < +- /* Slave 1 */ +- 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ +- 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ +- 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ +- 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ +- 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ +- 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ +- 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ +- 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ +- 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ +- 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ +- 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ +- 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ +- +- /* Slave 2 */ +- 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ +- 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ +- 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ +- 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ +- 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ +- 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ +- 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ +- 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ +- 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ +- 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ +- 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ +- 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ +- >; +- }; +- +- cpsw_sleep: cpsw_sleep { +- pinctrl-single,pins = < +- /* Slave 1 reset value */ +- 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- +- /* Slave 2 reset value*/ +- 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- >; +- }; +- +- davinci_mdio_default: davinci_mdio_default { +- pinctrl-single,pins = < +- /* MDIO */ +- 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ +- 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ +- >; +- }; +- +- davinci_mdio_sleep: davinci_mdio_sleep { +- pinctrl-single,pins = < +- /* MDIO reset value */ +- 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) +- 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) +- >; +- }; +- }; +- + ocp { + uart0: serial@44e09000 { + pinctrl-names = "default"; +@@ -321,6 +192,135 @@ + }; + }; + ++&am33xx_pinmux { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; ++ ++ user_leds_s0: user_leds_s0 { ++ pinctrl-single,pins = < ++ 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ ++ 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ ++ 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ ++ 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ ++ >; ++ }; ++ ++ gpio_keys_s0: gpio_keys_s0 { ++ pinctrl-single,pins = < ++ 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ ++ 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ ++ 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ ++ 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ ++ >; ++ }; ++ ++ i2c0_pins: pinmux_i2c0_pins { ++ pinctrl-single,pins = < ++ 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ ++ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ ++ >; ++ }; ++ ++ uart0_pins: pinmux_uart0_pins { ++ pinctrl-single,pins = < ++ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ ++ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ ++ >; ++ }; ++ ++ clkout2_pin: pinmux_clkout2_pin { ++ pinctrl-single,pins = < ++ 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ ++ >; ++ }; ++ ++ ecap2_pins: backlight_pins { ++ pinctrl-single,pins = < ++ 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ ++ >; ++ }; ++ ++ cpsw_default: cpsw_default { ++ pinctrl-single,pins = < ++ /* Slave 1 */ ++ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ ++ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ ++ 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ ++ 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ ++ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ ++ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ ++ 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ ++ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ ++ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ ++ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ ++ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ ++ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ ++ ++ /* Slave 2 */ ++ 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ ++ 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ ++ 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ ++ 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ ++ 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ ++ 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ ++ 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ ++ 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ ++ 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ ++ 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ ++ 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ ++ 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ ++ >; ++ }; ++ ++ cpsw_sleep: cpsw_sleep { ++ pinctrl-single,pins = < ++ /* Slave 1 reset value */ ++ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ ++ /* Slave 2 reset value*/ ++ 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ >; ++ }; ++ ++ davinci_mdio_default: davinci_mdio_default { ++ pinctrl-single,pins = < ++ /* MDIO */ ++ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ ++ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ ++ >; ++ }; ++ ++ davinci_mdio_sleep: davinci_mdio_sleep { ++ pinctrl-single,pins = < ++ /* MDIO reset value */ ++ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ >; ++ }; ++}; ++ + #include "tps65910.dtsi" + + &tps { diff --git a/patches/linux-3.12/0230-ARM-dts-AM33XX-don-t-redefine-OCP-bus-and-device-nod.patch b/patches/linux-3.12/0230-ARM-dts-AM33XX-don-t-redefine-OCP-bus-and-device-nod.patch new file mode 100644 index 0000000..8561bf0 --- /dev/null +++ b/patches/linux-3.12/0230-ARM-dts-AM33XX-don-t-redefine-OCP-bus-and-device-nod.patch @@ -0,0 +1,703 @@ +From: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Date: Fri, 20 Sep 2013 17:42:19 +0200 +Subject: [PATCH] ARM: dts: AM33XX: don't redefine OCP bus and device nodes + +The On Chip Peripherals (OCP) device node is a simplified +representation of the AM33XX SoC interconnect. An OCP dev +node is already defined in the am33xx.dtsi Device Tree +source file included by am33xx based boards so there is +no need to redefine this on each board DT file. + +Also, the OCP and IP modules directly connected to it are SoC +internal details that is better to keep outside of board files. + +Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-bone-common.dtsi | 100 ++++---- + arch/arm/boot/dts/am335x-evm.dts | 380 +++++++++++++++--------------- + arch/arm/boot/dts/am335x-evmsk.dts | 148 ++++++------ + 3 files changed, 311 insertions(+), 317 deletions(-) + +diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi +index 29799ac..ff5c3ca 100644 +--- a/arch/arm/boot/dts/am335x-bone-common.dtsi ++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi +@@ -21,57 +21,6 @@ + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + +- ocp { +- uart0: serial@44e09000 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_pins>; +- +- status = "okay"; +- }; +- +- musb: usb@47400000 { +- status = "okay"; +- +- control@44e10000 { +- status = "okay"; +- }; +- +- usb-phy@47401300 { +- status = "okay"; +- }; +- +- usb-phy@47401b00 { +- status = "okay"; +- }; +- +- usb@47401000 { +- status = "okay"; +- }; +- +- usb@47401800 { +- status = "okay"; +- dr_mode = "host"; +- }; +- +- dma-controller@07402000 { +- status = "okay"; +- }; +- }; +- +- i2c0: i2c@44e0b000 { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c0_pins>; +- +- status = "okay"; +- clock-frequency = <400000>; +- +- tps: tps@24 { +- reg = <0x24>; +- }; +- +- }; +- }; +- + leds { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; +@@ -217,6 +166,55 @@ + }; + }; + ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++ ++ status = "okay"; ++}; ++ ++&usb { ++ status = "okay"; ++ ++ control@44e10000 { ++ status = "okay"; ++ }; ++ ++ usb-phy@47401300 { ++ status = "okay"; ++ }; ++ ++ usb-phy@47401b00 { ++ status = "okay"; ++ }; ++ ++ usb@47401000 { ++ status = "okay"; ++ }; ++ ++ usb@47401800 { ++ status = "okay"; ++ dr_mode = "host"; ++ }; ++ ++ dma-controller@07402000 { ++ status = "okay"; ++ }; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ ++ status = "okay"; ++ clock-frequency = <400000>; ++ ++ tps: tps@24 { ++ reg = <0x24>; ++ }; ++ ++}; ++ + /include/ "tps65217.dtsi" + + &tps { +diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts +index 1525cd6..23b0a3e 100644 +--- a/arch/arm/boot/dts/am335x-evm.dts ++++ b/arch/arm/boot/dts/am335x-evm.dts +@@ -24,197 +24,6 @@ + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + +- ocp { +- uart0: serial@44e09000 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_pins>; +- +- status = "okay"; +- }; +- +- i2c0: i2c@44e0b000 { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c0_pins>; +- +- status = "okay"; +- clock-frequency = <400000>; +- +- tps: tps@2d { +- reg = <0x2d>; +- }; +- }; +- +- musb: usb@47400000 { +- status = "okay"; +- +- control@44e10000 { +- status = "okay"; +- }; +- +- usb-phy@47401300 { +- status = "okay"; +- }; +- +- usb-phy@47401b00 { +- status = "okay"; +- }; +- +- usb@47401000 { +- status = "okay"; +- }; +- +- usb@47401800 { +- status = "okay"; +- dr_mode = "host"; +- }; +- +- dma-controller@07402000 { +- status = "okay"; +- }; +- }; +- +- i2c1: i2c@4802a000 { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c1_pins>; +- +- status = "okay"; +- clock-frequency = <100000>; +- +- lis331dlh: lis331dlh@18 { +- compatible = "st,lis331dlh", "st,lis3lv02d"; +- reg = <0x18>; +- Vdd-supply = <&lis3_reg>; +- Vdd_IO-supply = <&lis3_reg>; +- +- st,click-single-x; +- st,click-single-y; +- st,click-single-z; +- st,click-thresh-x = <10>; +- st,click-thresh-y = <10>; +- st,click-thresh-z = <10>; +- st,irq1-click; +- st,irq2-click; +- st,wakeup-x-lo; +- st,wakeup-x-hi; +- st,wakeup-y-lo; +- st,wakeup-y-hi; +- st,wakeup-z-lo; +- st,wakeup-z-hi; +- st,min-limit-x = <120>; +- st,min-limit-y = <120>; +- st,min-limit-z = <140>; +- st,max-limit-x = <550>; +- st,max-limit-y = <550>; +- st,max-limit-z = <750>; +- }; +- +- tsl2550: tsl2550@39 { +- compatible = "taos,tsl2550"; +- reg = <0x39>; +- }; +- +- tmp275: tmp275@48 { +- compatible = "ti,tmp275"; +- reg = <0x48>; +- }; +- }; +- +- elm: elm@48080000 { +- status = "okay"; +- }; +- +- epwmss0: epwmss@48300000 { +- status = "okay"; +- +- ecap0: ecap@48300100 { +- status = "okay"; +- pinctrl-names = "default"; +- pinctrl-0 = <&ecap0_pins>; +- }; +- }; +- +- gpmc: gpmc@50000000 { +- status = "okay"; +- pinctrl-names = "default"; +- pinctrl-0 = <&nandflash_pins_s0>; +- ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ +- nand@0,0 { +- reg = <0 0 0>; /* CS0, offset 0 */ +- nand-bus-width = <8>; +- ti,nand-ecc-opt = "bch8"; +- gpmc,device-nand = "true"; +- gpmc,device-width = <1>; +- gpmc,sync-clk-ps = <0>; +- gpmc,cs-on-ns = <0>; +- gpmc,cs-rd-off-ns = <44>; +- gpmc,cs-wr-off-ns = <44>; +- gpmc,adv-on-ns = <6>; +- gpmc,adv-rd-off-ns = <34>; +- gpmc,adv-wr-off-ns = <44>; +- gpmc,we-on-ns = <0>; +- gpmc,we-off-ns = <40>; +- gpmc,oe-on-ns = <0>; +- gpmc,oe-off-ns = <54>; +- gpmc,access-ns = <64>; +- gpmc,rd-cycle-ns = <82>; +- gpmc,wr-cycle-ns = <82>; +- gpmc,wait-on-read = "true"; +- gpmc,wait-on-write = "true"; +- gpmc,bus-turnaround-ns = <0>; +- gpmc,cycle2cycle-delay-ns = <0>; +- gpmc,clk-activation-ns = <0>; +- gpmc,wait-monitoring-ns = <0>; +- gpmc,wr-access-ns = <40>; +- gpmc,wr-data-mux-bus-ns = <0>; +- +- #address-cells = <1>; +- #size-cells = <1>; +- elm_id = <&elm>; +- +- /* MTD partition table */ +- partition@0 { +- label = "SPL1"; +- reg = <0x00000000 0x000020000>; +- }; +- +- partition@1 { +- label = "SPL2"; +- reg = <0x00020000 0x00020000>; +- }; +- +- partition@2 { +- label = "SPL3"; +- reg = <0x00040000 0x00020000>; +- }; +- +- partition@3 { +- label = "SPL4"; +- reg = <0x00060000 0x00020000>; +- }; +- +- partition@4 { +- label = "U-boot"; +- reg = <0x00080000 0x001e0000>; +- }; +- +- partition@5 { +- label = "environment"; +- reg = <0x00260000 0x00020000>; +- }; +- +- partition@6 { +- label = "Kernel"; +- reg = <0x00280000 0x00500000>; +- }; +- +- partition@7 { +- label = "File-System"; +- reg = <0x00780000 0x0F880000>; +- }; +- }; +- }; +- }; +- + vbat: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vbat"; +@@ -405,6 +214,195 @@ + }; + }; + ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++ ++ status = "okay"; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ ++ status = "okay"; ++ clock-frequency = <400000>; ++ ++ tps: tps@2d { ++ reg = <0x2d>; ++ }; ++}; ++ ++&usb { ++ status = "okay"; ++ ++ control@44e10000 { ++ status = "okay"; ++ }; ++ ++ usb-phy@47401300 { ++ status = "okay"; ++ }; ++ ++ usb-phy@47401b00 { ++ status = "okay"; ++ }; ++ ++ usb@47401000 { ++ status = "okay"; ++ }; ++ ++ usb@47401800 { ++ status = "okay"; ++ dr_mode = "host"; ++ }; ++ ++ dma-controller@07402000 { ++ status = "okay"; ++ }; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ ++ status = "okay"; ++ clock-frequency = <100000>; ++ ++ lis331dlh: lis331dlh@18 { ++ compatible = "st,lis331dlh", "st,lis3lv02d"; ++ reg = <0x18>; ++ Vdd-supply = <&lis3_reg>; ++ Vdd_IO-supply = <&lis3_reg>; ++ ++ st,click-single-x; ++ st,click-single-y; ++ st,click-single-z; ++ st,click-thresh-x = <10>; ++ st,click-thresh-y = <10>; ++ st,click-thresh-z = <10>; ++ st,irq1-click; ++ st,irq2-click; ++ st,wakeup-x-lo; ++ st,wakeup-x-hi; ++ st,wakeup-y-lo; ++ st,wakeup-y-hi; ++ st,wakeup-z-lo; ++ st,wakeup-z-hi; ++ st,min-limit-x = <120>; ++ st,min-limit-y = <120>; ++ st,min-limit-z = <140>; ++ st,max-limit-x = <550>; ++ st,max-limit-y = <550>; ++ st,max-limit-z = <750>; ++ }; ++ ++ tsl2550: tsl2550@39 { ++ compatible = "taos,tsl2550"; ++ reg = <0x39>; ++ }; ++ ++ tmp275: tmp275@48 { ++ compatible = "ti,tmp275"; ++ reg = <0x48>; ++ }; ++}; ++ ++&elm { ++ status = "okay"; ++}; ++ ++&epwmss0 { ++ status = "okay"; ++ ++ ecap0: ecap@48300100 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ecap0_pins>; ++ }; ++}; ++ ++&gpmc { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&nandflash_pins_s0>; ++ ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ ++ nand@0,0 { ++ reg = <0 0 0>; /* CS0, offset 0 */ ++ nand-bus-width = <8>; ++ ti,nand-ecc-opt = "bch8"; ++ gpmc,device-nand = "true"; ++ gpmc,device-width = <1>; ++ gpmc,sync-clk-ps = <0>; ++ gpmc,cs-on-ns = <0>; ++ gpmc,cs-rd-off-ns = <44>; ++ gpmc,cs-wr-off-ns = <44>; ++ gpmc,adv-on-ns = <6>; ++ gpmc,adv-rd-off-ns = <34>; ++ gpmc,adv-wr-off-ns = <44>; ++ gpmc,we-on-ns = <0>; ++ gpmc,we-off-ns = <40>; ++ gpmc,oe-on-ns = <0>; ++ gpmc,oe-off-ns = <54>; ++ gpmc,access-ns = <64>; ++ gpmc,rd-cycle-ns = <82>; ++ gpmc,wr-cycle-ns = <82>; ++ gpmc,wait-on-read = "true"; ++ gpmc,wait-on-write = "true"; ++ gpmc,bus-turnaround-ns = <0>; ++ gpmc,cycle2cycle-delay-ns = <0>; ++ gpmc,clk-activation-ns = <0>; ++ gpmc,wait-monitoring-ns = <0>; ++ gpmc,wr-access-ns = <40>; ++ gpmc,wr-data-mux-bus-ns = <0>; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ elm_id = <&elm>; ++ ++ /* MTD partition table */ ++ partition@0 { ++ label = "SPL1"; ++ reg = <0x00000000 0x000020000>; ++ }; ++ ++ partition@1 { ++ label = "SPL2"; ++ reg = <0x00020000 0x00020000>; ++ }; ++ ++ partition@2 { ++ label = "SPL3"; ++ reg = <0x00040000 0x00020000>; ++ }; ++ ++ partition@3 { ++ label = "SPL4"; ++ reg = <0x00060000 0x00020000>; ++ }; ++ ++ partition@4 { ++ label = "U-boot"; ++ reg = <0x00080000 0x001e0000>; ++ }; ++ ++ partition@5 { ++ label = "environment"; ++ reg = <0x00260000 0x00020000>; ++ }; ++ ++ partition@6 { ++ label = "Kernel"; ++ reg = <0x00280000 0x00500000>; ++ }; ++ ++ partition@7 { ++ label = "File-System"; ++ reg = <0x00780000 0x0F880000>; ++ }; ++ }; ++}; ++ + #include "tps65910.dtsi" + + &tps { +diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts +index f0066fe..bc93895 100644 +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -31,81 +31,6 @@ + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + +- ocp { +- uart0: serial@44e09000 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_pins>; +- +- status = "okay"; +- }; +- +- i2c0: i2c@44e0b000 { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c0_pins>; +- +- status = "okay"; +- clock-frequency = <400000>; +- +- tps: tps@2d { +- reg = <0x2d>; +- }; +- +- lis331dlh: lis331dlh@18 { +- compatible = "st,lis331dlh", "st,lis3lv02d"; +- reg = <0x18>; +- Vdd-supply = <&lis3_reg>; +- Vdd_IO-supply = <&lis3_reg>; +- +- st,click-single-x; +- st,click-single-y; +- st,click-single-z; +- st,click-thresh-x = <10>; +- st,click-thresh-y = <10>; +- st,click-thresh-z = <10>; +- st,irq1-click; +- st,irq2-click; +- st,wakeup-x-lo; +- st,wakeup-x-hi; +- st,wakeup-y-lo; +- st,wakeup-y-hi; +- st,wakeup-z-lo; +- st,wakeup-z-hi; +- st,min-limit-x = <120>; +- st,min-limit-y = <120>; +- st,min-limit-z = <140>; +- st,max-limit-x = <550>; +- st,max-limit-y = <550>; +- st,max-limit-z = <750>; +- }; +- }; +- +- musb: usb@47400000 { +- status = "okay"; +- +- control@44e10000 { +- status = "okay"; +- }; +- +- usb-phy@47401300 { +- status = "okay"; +- }; +- +- usb@47401000 { +- status = "okay"; +- }; +- }; +- +- epwmss2: epwmss@48304000 { +- status = "okay"; +- +- ecap2: ecap@48304100 { +- status = "okay"; +- pinctrl-names = "default"; +- pinctrl-0 = <&ecap2_pins>; +- }; +- }; +- }; +- + vbat: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vbat"; +@@ -321,6 +246,79 @@ + }; + }; + ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++ ++ status = "okay"; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ ++ status = "okay"; ++ clock-frequency = <400000>; ++ ++ tps: tps@2d { ++ reg = <0x2d>; ++ }; ++ ++ lis331dlh: lis331dlh@18 { ++ compatible = "st,lis331dlh", "st,lis3lv02d"; ++ reg = <0x18>; ++ Vdd-supply = <&lis3_reg>; ++ Vdd_IO-supply = <&lis3_reg>; ++ ++ st,click-single-x; ++ st,click-single-y; ++ st,click-single-z; ++ st,click-thresh-x = <10>; ++ st,click-thresh-y = <10>; ++ st,click-thresh-z = <10>; ++ st,irq1-click; ++ st,irq2-click; ++ st,wakeup-x-lo; ++ st,wakeup-x-hi; ++ st,wakeup-y-lo; ++ st,wakeup-y-hi; ++ st,wakeup-z-lo; ++ st,wakeup-z-hi; ++ st,min-limit-x = <120>; ++ st,min-limit-y = <120>; ++ st,min-limit-z = <140>; ++ st,max-limit-x = <550>; ++ st,max-limit-y = <550>; ++ st,max-limit-z = <750>; ++ }; ++}; ++ ++&usb { ++ status = "okay"; ++ ++ control@44e10000 { ++ status = "okay"; ++ }; ++ ++ usb-phy@47401300 { ++ status = "okay"; ++ }; ++ ++ usb@47401000 { ++ status = "okay"; ++ }; ++}; ++ ++&epwmss2 { ++ status = "okay"; ++ ++ ecap2: ecap@48304100 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ecap2_pins>; ++ }; ++}; ++ + #include "tps65910.dtsi" + + &tps { diff --git a/patches/linux-3.12/0231-ARM-dts-omap3-devkit8000-fix-a-typo-in-GMPC-node.patch b/patches/linux-3.12/0231-ARM-dts-omap3-devkit8000-fix-a-typo-in-GMPC-node.patch new file mode 100644 index 0000000..522c3de --- /dev/null +++ b/patches/linux-3.12/0231-ARM-dts-omap3-devkit8000-fix-a-typo-in-GMPC-node.patch @@ -0,0 +1,26 @@ +From: Aaro Koskinen <aaro.koskinen@iki.fi> +Date: Sat, 21 Sep 2013 02:40:14 +0300 +Subject: [PATCH] ARM: dts: omap3-devkit8000: fix a typo in GMPC node + +"gpmc,sync-clki-ps" is not defined/documented, it should be +"gpmc,sync-clk-ps" instead. + +Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-devkit8000.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts +index 7ef2827..4665421 100644 +--- a/arch/arm/boot/dts/omap3-devkit8000.dts ++++ b/arch/arm/boot/dts/omap3-devkit8000.dts +@@ -125,7 +125,7 @@ + nand-bus-width = <16>; + + gpmc,device-nand; +- gpmc,sync-clki-ps = <0>; ++ gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; diff --git a/patches/linux-3.12/0232-ARM-dts-DRA7-Add-TPS659038-PMIC-nodes.patch b/patches/linux-3.12/0232-ARM-dts-DRA7-Add-TPS659038-PMIC-nodes.patch new file mode 100644 index 0000000..1c51029 --- /dev/null +++ b/patches/linux-3.12/0232-ARM-dts-DRA7-Add-TPS659038-PMIC-nodes.patch @@ -0,0 +1,146 @@ +From: Keerthy <j-keerthy@ti.com> +Date: Mon, 26 Aug 2013 11:06:51 +0530 +Subject: [PATCH] ARM: dts: DRA7: Add TPS659038 PMIC nodes + +Add DT nodes for TPS659038 PMIC on DRA7 boards. + +It is based on top of: +http://comments.gmane.org/gmane.linux.ports.arm.omap/102459. + +Documentation: +- Documentation/devicetree/bindings/mfd/palmas.txt +- Documentation/devicetree/bindings/regulator/palmas-pmic.txt + +Boot Tested on DRA7 d1 Board. + +Signed-off-by: Keerthy <j-keerthy@ti.com> +Acked-by: Nishanth Menon <nm@ti.com> +[bcousson@baylibre.com: Fix indentation and changelog] +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/dra7-evm.dts | 112 +++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 112 insertions(+) + +diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts +index ca5dab2..fbbe406 100644 +--- a/arch/arm/boot/dts/dra7-evm.dts ++++ b/arch/arm/boot/dts/dra7-evm.dts +@@ -93,6 +93,118 @@ + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <400000>; ++ ++ tps659038: tps659038@58 { ++ compatible = "ti,tps659038"; ++ reg = <0x58>; ++ ++ tps659038_pmic { ++ compatible = "ti,tps659038-pmic"; ++ ++ regulators { ++ smps123_reg: smps123 { ++ /* VDD_MPU */ ++ regulator-name = "smps123"; ++ regulator-min-microvolt = < 850000>; ++ regulator-max-microvolt = <1250000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ smps45_reg: smps45 { ++ /* VDD_DSPEVE */ ++ regulator-name = "smps45"; ++ regulator-min-microvolt = < 850000>; ++ regulator-max-microvolt = <1150000>; ++ regulator-boot-on; ++ }; ++ ++ smps6_reg: smps6 { ++ /* VDD_GPU - over VDD_SMPS6 */ ++ regulator-name = "smps6"; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <12500000>; ++ regulator-boot-on; ++ }; ++ ++ smps7_reg: smps7 { ++ /* CORE_VDD */ ++ regulator-name = "smps7"; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <1030000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ smps8_reg: smps8 { ++ /* VDD_IVAHD */ ++ regulator-name = "smps8"; ++ regulator-min-microvolt = < 850000>; ++ regulator-max-microvolt = <1250000>; ++ regulator-boot-on; ++ }; ++ ++ smps9_reg: smps9 { ++ /* VDDS1V8 */ ++ regulator-name = "smps9"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ ldo1_reg: ldo1 { ++ /* LDO1_OUT --> SDIO */ ++ regulator-name = "ldo1"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ }; ++ ++ ldo2_reg: ldo2 { ++ /* VDD_RTCIO */ ++ /* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */ ++ regulator-name = "ldo2"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ }; ++ ++ ldo3_reg: ldo3 { ++ /* VDDA_1V8_PHY */ ++ regulator-name = "ldo3"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-boot-on; ++ }; ++ ++ ldo9_reg: ldo9 { ++ /* VDD_RTC */ ++ regulator-name = "ldo9"; ++ regulator-min-microvolt = <1050000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-boot-on; ++ }; ++ ++ ldoln_reg: ldoln { ++ /* VDDA_1V8_PLL */ ++ regulator-name = "ldoln"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ ldousb_reg: ldousb { ++ /* VDDA_3V_USB: VDDA_USBHS33 */ ++ regulator-name = "ldousb"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ }; ++ }; ++ }; ++ }; + }; + + &i2c2 { diff --git a/patches/linux-3.12/0233-ARM-dts-AM33XX-add-ethernet-alias-s-for-am33xx.patch b/patches/linux-3.12/0233-ARM-dts-AM33XX-add-ethernet-alias-s-for-am33xx.patch new file mode 100644 index 0000000..892dd4f --- /dev/null +++ b/patches/linux-3.12/0233-ARM-dts-AM33XX-add-ethernet-alias-s-for-am33xx.patch @@ -0,0 +1,30 @@ +From: Dan Murphy <dmurphy@ti.com> +Date: Wed, 2 Oct 2013 12:58:33 -0500 +Subject: [PATCH] ARM: dts: AM33XX: add ethernet alias's for am33xx + +Set the alias for ethernet0 and ethernet1 so that uBoot +can set the MAC address appropriately. + +Currently u-boot cannot find the alias and there for does +not set the MAC address. + +Signed-off-by: Dan Murphy <dmurphy@ti.com> +Tested-by: Mugunthan V N <mugunthanvnm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am33xx.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index 179b0bc..5704c25 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -30,6 +30,8 @@ + usb1 = &usb1; + phy0 = &usb0_phy; + phy1 = &usb1_phy; ++ ethernet0 = &cpsw_emac0; ++ ethernet1 = &cpsw_emac1; + }; + + cpus { diff --git a/patches/linux-3.12/0234-ARM-dts-omap3-beagle-Use-reset-gpios-for-hsusb2_rese.patch b/patches/linux-3.12/0234-ARM-dts-omap3-beagle-Use-reset-gpios-for-hsusb2_rese.patch new file mode 100644 index 0000000..f7865a8 --- /dev/null +++ b/patches/linux-3.12/0234-ARM-dts-omap3-beagle-Use-reset-gpios-for-hsusb2_rese.patch @@ -0,0 +1,44 @@ +From: Roger Quadros <rogerq@ti.com> +Date: Tue, 24 Sep 2013 11:53:51 +0300 +Subject: [PATCH] ARM: dts: omap3-beagle: Use reset-gpios for hsusb2_reset + +We no longer need to model the RESET line as a regulator since +the USB phy-nop driver accepts "reset-gpios" property. + +Signed-off-by: Roger Quadros <rogerq@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-beagle.dts | 13 +------------ + 1 file changed, 1 insertion(+), 12 deletions(-) + +diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts +index 2e29e81..1237822 100644 +--- a/arch/arm/boot/dts/omap3-beagle.dts ++++ b/arch/arm/boot/dts/omap3-beagle.dts +@@ -44,17 +44,6 @@ + }; + }; + +- /* HS USB Port 2 RESET */ +- hsusb2_reset: hsusb2_reset_reg { +- compatible = "regulator-fixed"; +- regulator-name = "hsusb2_reset"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio5 19 0>; /* gpio_147 */ +- startup-delay-us = <70000>; +- enable-active-high; +- }; +- + /* HS USB Port 2 Power */ + hsusb2_power: hsusb2_power_reg { + compatible = "regulator-fixed"; +@@ -68,7 +57,7 @@ + /* HS USB Host PHY on PORT 2 */ + hsusb2_phy: hsusb2_phy { + compatible = "usb-nop-xceiv"; +- reset-supply = <&hsusb2_reset>; ++ reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */ + vcc-supply = <&hsusb2_power>; + }; + diff --git a/patches/linux-3.12/0235-ARM-dts-omap4-panda-Use-reset-gpios-for-hsusb1_reset.patch b/patches/linux-3.12/0235-ARM-dts-omap4-panda-Use-reset-gpios-for-hsusb1_reset.patch new file mode 100644 index 0000000..8d180ac --- /dev/null +++ b/patches/linux-3.12/0235-ARM-dts-omap4-panda-Use-reset-gpios-for-hsusb1_reset.patch @@ -0,0 +1,49 @@ +From: Roger Quadros <rogerq@ti.com> +Date: Tue, 24 Sep 2013 11:53:52 +0300 +Subject: [PATCH] ARM: dts: omap4-panda: Use reset-gpios for hsusb1_reset + +We no longer need to model the RESET line as a regulator since +the USB phy-nop driver accepts "reset-gpios" property. + +Signed-off-by: Roger Quadros <rogerq@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap4-panda-common.dtsi | 18 +----------------- + 1 file changed, 1 insertion(+), 17 deletions(-) + +diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi +index 43b7661..3e6801c 100644 +--- a/arch/arm/boot/dts/omap4-panda-common.dtsi ++++ b/arch/arm/boot/dts/omap4-panda-common.dtsi +@@ -60,22 +60,6 @@ + "AFMR", "Line In"; + }; + +- /* +- * Temp hack: Need to be replaced with the proper gpio-controlled +- * reset driver as soon it will be merged. +- * http://thread.gmane.org/gmane.linux.drivers.devicetree/36830 +- */ +- /* HS USB Port 1 RESET */ +- hsusb1_reset: hsusb1_reset_reg { +- compatible = "regulator-fixed"; +- regulator-name = "hsusb1_reset"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio2 30 0>; /* gpio_62 */ +- startup-delay-us = <70000>; +- enable-active-high; +- }; +- + /* HS USB Port 1 Power */ + hsusb1_power: hsusb1_power_reg { + compatible = "regulator-fixed"; +@@ -97,7 +81,7 @@ + /* HS USB Host PHY on PORT 1 */ + hsusb1_phy: hsusb1_phy { + compatible = "usb-nop-xceiv"; +- reset-supply = <&hsusb1_reset>; ++ reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */ + vcc-supply = <&hsusb1_power>; + /** + * FIXME: diff --git a/patches/linux-3.12/0236-ARM-dts-omap5-uevm-Use-reset-gpios-for-hsusb2-3_rese.patch b/patches/linux-3.12/0236-ARM-dts-omap5-uevm-Use-reset-gpios-for-hsusb2-3_rese.patch new file mode 100644 index 0000000..f75008a --- /dev/null +++ b/patches/linux-3.12/0236-ARM-dts-omap5-uevm-Use-reset-gpios-for-hsusb2-3_rese.patch @@ -0,0 +1,63 @@ +From: Roger Quadros <rogerq@ti.com> +Date: Tue, 24 Sep 2013 11:53:53 +0300 +Subject: [PATCH] ARM: dts: omap5-uevm: Use reset-gpios for hsusb2/3_reset + +We no longer need to model the RESET line as a regulator since +the USB phy-nop driver accepts "reset-gpios" property. + +Signed-off-by: Roger Quadros <rogerq@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5-uevm.dts | 26 ++------------------------ + 1 file changed, 2 insertions(+), 24 deletions(-) + +diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts +index da25a14..748f6bf 100644 +--- a/arch/arm/boot/dts/omap5-uevm.dts ++++ b/arch/arm/boot/dts/omap5-uevm.dts +@@ -27,21 +27,10 @@ + regulator-max-microvolt = <3000000>; + }; + +- /* HS USB Port 2 RESET */ +- hsusb2_reset: hsusb2_reset_reg { +- compatible = "regulator-fixed"; +- regulator-name = "hsusb2_reset"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */ +- startup-delay-us = <70000>; +- enable-active-high; +- }; +- + /* HS USB Host PHY on PORT 2 */ + hsusb2_phy: hsusb2_phy { + compatible = "usb-nop-xceiv"; +- reset-supply = <&hsusb2_reset>; ++ reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */ + /** + * FIXME + * Put the right clock phandle here when available +@@ -51,21 +40,10 @@ + clock-frequency = <19200000>; + }; + +- /* HS USB Port 3 RESET */ +- hsusb3_reset: hsusb3_reset_reg { +- compatible = "regulator-fixed"; +- regulator-name = "hsusb3_reset"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */ +- startup-delay-us = <70000>; +- enable-active-high; +- }; +- + /* HS USB Host PHY on PORT 3 */ + hsusb3_phy: hsusb3_phy { + compatible = "usb-nop-xceiv"; +- reset-supply = <&hsusb3_reset>; ++ reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */ + }; + + leds { diff --git a/patches/linux-3.12/0237-ARM-dts-omap3-beagle-xm-Add-USB-Host-support.patch b/patches/linux-3.12/0237-ARM-dts-omap3-beagle-xm-Add-USB-Host-support.patch new file mode 100644 index 0000000..1de1d4c --- /dev/null +++ b/patches/linux-3.12/0237-ARM-dts-omap3-beagle-xm-Add-USB-Host-support.patch @@ -0,0 +1,111 @@ +From: Roger Quadros <rogerq@ti.com> +Date: Tue, 24 Sep 2013 11:53:55 +0300 +Subject: [PATCH] ARM: dts: omap3-beagle-xm: Add USB Host support + +Provide RESET GPIO and Power regulator for the USB PHY, +the USB Host port mode and the PHY device for the controller. +Also provide pin multiplexer information for USB host pins. + +We also relocate omap3_pmx_core pin definations so that they +are close to omap3_pmx_wkup pin definations. + +Signed-off-by: Roger Quadros <rogerq@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-beagle-xm.dts | 65 ++++++++++++++++++++++++++++++----- + 1 file changed, 56 insertions(+), 9 deletions(-) + +diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts +index 2816bf6..2e88095 100644 +--- a/arch/arm/boot/dts/omap3-beagle-xm.dts ++++ b/arch/arm/boot/dts/omap3-beagle-xm.dts +@@ -69,6 +69,23 @@ + }; + + }; ++ ++ /* HS USB Port 2 Power */ ++ hsusb2_power: hsusb2_power_reg { ++ compatible = "regulator-fixed"; ++ regulator-name = "hsusb2_vbus"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&twl_gpio 18 0>; /* GPIO LEDA */ ++ startup-delay-us = <70000>; ++ }; ++ ++ /* HS USB Host PHY on PORT 2 */ ++ hsusb2_phy: hsusb2_phy { ++ compatible = "usb-nop-xceiv"; ++ reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */ ++ vcc-supply = <&hsusb2_power>; ++ }; + }; + + &omap3_pmx_wkup { +@@ -79,6 +96,37 @@ + }; + }; + ++&omap3_pmx_core { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &hsusbb2_pins ++ >; ++ ++ uart3_pins: pinmux_uart3_pins { ++ pinctrl-single,pins = < ++ 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ ++ 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ ++ >; ++ }; ++ ++ hsusbb2_pins: pinmux_hsusbb2_pins { ++ pinctrl-single,pins = < ++ 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ ++ 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ ++ 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ ++ 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ ++ 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ ++ 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ ++ 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ ++ 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ ++ 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ ++ 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ ++ 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ ++ 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ ++ >; ++ }; ++}; ++ + &i2c1 { + clock-frequency = <2600000>; + +@@ -148,15 +196,6 @@ + power = <50>; + }; + +-&omap3_pmx_core { +- uart3_pins: pinmux_uart3_pins { +- pinctrl-single,pins = < +- 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ +- 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ +- >; +- }; +-}; +- + &uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +@@ -166,3 +205,11 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gpio1_pins>; + }; ++ ++&usbhshost { ++ port2-mode = "ehci-phy"; ++}; ++ ++&usbhsehci { ++ phys = <0 &hsusb2_phy>; ++}; diff --git a/patches/linux-3.12/0238-ARM-dts-omap3-beagle-Add-USB-OTG-PHY-details.patch b/patches/linux-3.12/0238-ARM-dts-omap3-beagle-Add-USB-OTG-PHY-details.patch new file mode 100644 index 0000000..b20a6a5 --- /dev/null +++ b/patches/linux-3.12/0238-ARM-dts-omap3-beagle-Add-USB-OTG-PHY-details.patch @@ -0,0 +1,28 @@ +From: Roger Quadros <rogerq@ti.com> +Date: Tue, 24 Sep 2013 11:53:56 +0300 +Subject: [PATCH] ARM: dts: omap3-beagle: Add USB OTG PHY details + +Add information about the USB OTG PHY. Without this +the OTG port on beagle will not work. + +Signed-off-by: Roger Quadros <rogerq@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-beagle.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts +index 1237822..7669c16 100644 +--- a/arch/arm/boot/dts/omap3-beagle.dts ++++ b/arch/arm/boot/dts/omap3-beagle.dts +@@ -169,3 +169,10 @@ + pinctrl-names = "default"; + pinctrl-0 = <&gpio1_pins>; + }; ++ ++&usb_otg_hs { ++ interface-type = <0>; ++ usb-phy = <&usb2_phy>; ++ mode = <3>; ++ power = <50>; ++}; diff --git a/patches/linux-3.12/0239-ARM-dts-am335x-boneblack-move-fixed-regulator-to-boa.patch b/patches/linux-3.12/0239-ARM-dts-am335x-boneblack-move-fixed-regulator-to-boa.patch new file mode 100644 index 0000000..b8f1c4a --- /dev/null +++ b/patches/linux-3.12/0239-ARM-dts-am335x-boneblack-move-fixed-regulator-to-boa.patch @@ -0,0 +1,54 @@ +From: Nishanth Menon <nm@ti.com> +Date: Mon, 30 Sep 2013 09:40:16 -0500 +Subject: [PATCH] ARM: dts: am335x-boneblack: move fixed regulator to board + level + +3.3V fixed regulator does not belong to TPS node - as a result +the fixed regulator is never probed and MMC is continually deferred +due to lack of regulator. + +Move the fixed regulator to be at root of platform. + +Cc: Joel Fernandes <joelf@ti.com> +Cc: Sekhar Nori <nsekhar@ti.com> +Cc: Koen Kooi <koen@dominion.thruhere.net> +Signed-off-by: Nishanth Menon <nm@ti.com> +Tested-by: Felipe Balbi <balbi@ti.com> +Tested-by: Balaji T K <balajitk@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-bone-common.dtsi | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi +index ff5c3ca..b3e6fcf 100644 +--- a/arch/arm/boot/dts/am335x-bone-common.dtsi ++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi +@@ -55,6 +55,13 @@ + default-state = "off"; + }; + }; ++ ++ vmmcsd_fixed: fixedregulator@0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vmmcsd_fixed"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; + }; + + &am33xx_pinmux { +@@ -257,13 +264,6 @@ + regulator-always-on; + }; + }; +- +- vmmcsd_fixed: fixedregulator@0 { +- compatible = "regulator-fixed"; +- regulator-name = "vmmcsd_fixed"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- }; + }; + + &cpsw_emac0 { diff --git a/patches/linux-3.12/0240-ARM-dts-AM33XX-Add-support-for-IGEP-COM-AQUILA.patch b/patches/linux-3.12/0240-ARM-dts-AM33XX-Add-support-for-IGEP-COM-AQUILA.patch new file mode 100644 index 0000000..9a717bb --- /dev/null +++ b/patches/linux-3.12/0240-ARM-dts-AM33XX-Add-support-for-IGEP-COM-AQUILA.patch @@ -0,0 +1,295 @@ +From: Enric Balletbo i Serra <eballetbo@gmail.com> +Date: Tue, 10 Sep 2013 16:55:48 +0200 +Subject: [PATCH] ARM: dts: AM33XX: Add support for IGEP COM AQUILA + +The IGEP COM AQUILA is industrial processors SODIMM module with +following highlights: + + o AM3352/AM3354/AM3358/AM3359 Texas Instruments processor + o Cortex-A8 ARM CPU + o 3.3 volts Inputs / Outputs use industrial + o 256 MB DDR3 SDRAM / 128 Megabytes FLASH + o MicroSD card reader on-board + o Ethernet controller on-board + o JTAG debug connector available + o Designed for industrial range purposes + +Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> +Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-igep0033.dtsi | 265 +++++++++++++++++++++++++++++++++ + 1 file changed, 265 insertions(+) + create mode 100644 arch/arm/boot/dts/am335x-igep0033.dtsi + +diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi +new file mode 100644 +index 0000000..06eba07 +--- /dev/null ++++ b/arch/arm/boot/dts/am335x-igep0033.dtsi +@@ -0,0 +1,265 @@ ++/* ++ * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x ++ * ++ * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++/dts-v1/; ++ ++#include "am33xx.dtsi" ++ ++/ { ++ cpus { ++ cpu@0 { ++ cpu0-supply = <&vdd1_reg>; ++ }; ++ }; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x80000000 0x10000000>; /* 256 MB */ ++ }; ++ ++ leds { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&leds_pins>; ++ ++ compatible = "gpio-leds"; ++ ++ led@0 { ++ label = "com:green:user"; ++ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ }; ++ ++ vbat: fixedregulator@0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vbat"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-boot-on; ++ }; ++}; ++ ++&am33xx_pinmux { ++ i2c0_pins: pinmux_i2c0_pins { ++ pinctrl-single,pins = < ++ 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ ++ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ ++ >; ++ }; ++ ++ nandflash_pins: pinmux_nandflash_pins { ++ pinctrl-single,pins = < ++ 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ ++ 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ ++ 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ ++ 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ ++ 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ ++ 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ ++ 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ ++ 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ ++ 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ ++ 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ ++ 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ ++ 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ ++ 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ ++ 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ ++ 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ ++ >; ++ }; ++ ++ uart0_pins: pinmux_uart0_pins { ++ pinctrl-single,pins = < ++ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ ++ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ ++ >; ++ }; ++ ++ leds_pins: pinmux_leds_pins { ++ pinctrl-single,pins = < ++ 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ ++ >; ++ }; ++}; ++ ++&cpsw_emac0 { ++ phy_id = <&davinci_mdio>, <0>; ++}; ++ ++&cpsw_emac1 { ++ phy_id = <&davinci_mdio>, <1>; ++}; ++ ++&elm { ++ status = "okay"; ++}; ++ ++&gpmc { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&nandflash_pins>; ++ ++ ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ ++ ++ nand@0,0 { ++ reg = <0 0 0>; /* CS0, offset 0 */ ++ nand-bus-width = <8>; ++ ti,nand-ecc-opt = "bch8"; ++ gpmc,device-nand = "true"; ++ gpmc,device-width = <1>; ++ gpmc,sync-clk-ps = <0>; ++ gpmc,cs-on-ns = <0>; ++ gpmc,cs-rd-off-ns = <44>; ++ gpmc,cs-wr-off-ns = <44>; ++ gpmc,adv-on-ns = <6>; ++ gpmc,adv-rd-off-ns = <34>; ++ gpmc,adv-wr-off-ns = <44>; ++ gpmc,we-on-ns = <0>; ++ gpmc,we-off-ns = <40>; ++ gpmc,oe-on-ns = <0>; ++ gpmc,oe-off-ns = <54>; ++ gpmc,access-ns = <64>; ++ gpmc,rd-cycle-ns = <82>; ++ gpmc,wr-cycle-ns = <82>; ++ gpmc,wait-on-read = "true"; ++ gpmc,wait-on-write = "true"; ++ gpmc,bus-turnaround-ns = <0>; ++ gpmc,cycle2cycle-delay-ns = <0>; ++ gpmc,clk-activation-ns = <0>; ++ gpmc,wait-monitoring-ns = <0>; ++ gpmc,wr-access-ns = <40>; ++ gpmc,wr-data-mux-bus-ns = <0>; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ elm_id = <&elm>; ++ ++ /* MTD partition table */ ++ partition@0 { ++ label = "SPL"; ++ reg = <0x00000000 0x000080000>; ++ }; ++ ++ partition@1 { ++ label = "U-boot"; ++ reg = <0x00080000 0x001e0000>; ++ }; ++ ++ partition@2 { ++ label = "U-Boot Env"; ++ reg = <0x00260000 0x00020000>; ++ }; ++ ++ partition@3 { ++ label = "Kernel"; ++ reg = <0x00280000 0x00500000>; ++ }; ++ ++ partition@4 { ++ label = "File System"; ++ reg = <0x00780000 0x007880000>; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ ++ clock-frequency = <400000>; ++ ++ tps: tps@2d { ++ reg = <0x2d>; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++}; ++ ++#include "tps65910.dtsi" ++ ++&tps { ++ vcc1-supply = <&vbat>; ++ vcc2-supply = <&vbat>; ++ vcc3-supply = <&vbat>; ++ vcc4-supply = <&vbat>; ++ vcc5-supply = <&vbat>; ++ vcc6-supply = <&vbat>; ++ vcc7-supply = <&vbat>; ++ vccio-supply = <&vbat>; ++ ++ regulators { ++ vrtc_reg: regulator@0 { ++ regulator-always-on; ++ }; ++ ++ vio_reg: regulator@1 { ++ regulator-always-on; ++ }; ++ ++ vdd1_reg: regulator@2 { ++ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ ++ regulator-name = "vdd_mpu"; ++ regulator-min-microvolt = <912500>; ++ regulator-max-microvolt = <1312500>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ vdd2_reg: regulator@3 { ++ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ ++ regulator-name = "vdd_core"; ++ regulator-min-microvolt = <912500>; ++ regulator-max-microvolt = <1150000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ vdd3_reg: regulator@4 { ++ regulator-always-on; ++ }; ++ ++ vdig1_reg: regulator@5 { ++ regulator-always-on; ++ }; ++ ++ vdig2_reg: regulator@6 { ++ regulator-always-on; ++ }; ++ ++ vpll_reg: regulator@7 { ++ regulator-always-on; ++ }; ++ ++ vdac_reg: regulator@8 { ++ regulator-always-on; ++ }; ++ ++ vaux1_reg: regulator@9 { ++ regulator-always-on; ++ }; ++ ++ vaux2_reg: regulator@10 { ++ regulator-always-on; ++ }; ++ ++ vaux33_reg: regulator@11 { ++ regulator-always-on; ++ }; ++ ++ vmmc_reg: regulator@12 { ++ regulator-always-on; ++ }; ++ }; ++}; ++ diff --git a/patches/linux-3.12/0241-ARM-dts-AM33XX-Add-support-for-IGEP-AQUILA-EXPANSION.patch b/patches/linux-3.12/0241-ARM-dts-AM33XX-Add-support-for-IGEP-AQUILA-EXPANSION.patch new file mode 100644 index 0000000..b8a2802 --- /dev/null +++ b/patches/linux-3.12/0241-ARM-dts-AM33XX-Add-support-for-IGEP-AQUILA-EXPANSION.patch @@ -0,0 +1,61 @@ +From: Enric Balletbo i Serra <eballetbo@gmail.com> +Date: Tue, 10 Sep 2013 16:55:49 +0200 +Subject: [PATCH] ARM: dts: AM33XX: Add support for IGEP AQUILA EXPANSION + board. + +The IGEP AQUILA EXPANSION board is a development platform +for the IGEP COM AQUILA AM335x boards. + +The board adds the following connectivity: + + o USB OTG + o USB HOST + o HDMI + o Ethernet + o Serial Debug (3.3V) + o 2x46 pin headers + o EEPROM + +Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> +Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/am335x-base0033.dts | 16 ++++++++++++++++ + 2 files changed, 17 insertions(+) + create mode 100644 arch/arm/boot/dts/am335x-base0033.dts + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 1be0c95..9df7d2c 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ + am335x-evmsk.dtb \ + am335x-bone.dtb \ + am335x-boneblack.dtb \ ++ am335x-base0033.dtb \ + am3517-evm.dtb \ + am3517_mt_ventoux.dtb \ + am43x-epos-evm.dtb \ +diff --git a/arch/arm/boot/dts/am335x-base0033.dts b/arch/arm/boot/dts/am335x-base0033.dts +new file mode 100644 +index 0000000..b4f95c2 +--- /dev/null ++++ b/arch/arm/boot/dts/am335x-base0033.dts +@@ -0,0 +1,16 @@ ++/* ++ * am335x-base0033.dts - Device Tree file for IGEP AQUILA EXPANSION ++ * ++ * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include "am335x-igep0033.dtsi" ++ ++/ { ++ model = "IGEP COM AM335x on AQUILA Expansion"; ++ compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx"; ++}; diff --git a/patches/linux-3.12/0242-ARM-dts-am335x-bone-common-correct-mux-mode-for-cmd-.patch b/patches/linux-3.12/0242-ARM-dts-am335x-bone-common-correct-mux-mode-for-cmd-.patch new file mode 100644 index 0000000..c0423c8 --- /dev/null +++ b/patches/linux-3.12/0242-ARM-dts-am335x-bone-common-correct-mux-mode-for-cmd-.patch @@ -0,0 +1,27 @@ +From: Balaji T K <balajitk@ti.com> +Date: Fri, 27 Sep 2013 17:05:09 +0530 +Subject: [PATCH] ARM: dts: am335x-bone-common: correct mux mode for cmd line + +Set pinmux_emmc_pins mux mode for cmd line to MODE2 in order +to detect eMMC on BBB and BBW + eMMC cape. + +Signed-off-by: Balaji T K <balajitk@ti.com> +Tested-by: Felipe Balbi <balbi@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-bone-common.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi +index b3e6fcf..e3f27ec 100644 +--- a/arch/arm/boot/dts/am335x-bone-common.dtsi ++++ b/arch/arm/boot/dts/am335x-bone-common.dtsi +@@ -160,7 +160,7 @@ + emmc_pins: pinmux_emmc_pins { + pinctrl-single,pins = < + 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ +- 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */ ++ 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ + 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ + 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ + 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ diff --git a/patches/linux-3.12/0243-ARM-dts-am335x-evm-sdk-switch-mmc1-to-4-bit-mode.patch b/patches/linux-3.12/0243-ARM-dts-am335x-evm-sdk-switch-mmc1-to-4-bit-mode.patch new file mode 100644 index 0000000..8b6bd98 --- /dev/null +++ b/patches/linux-3.12/0243-ARM-dts-am335x-evm-sdk-switch-mmc1-to-4-bit-mode.patch @@ -0,0 +1,33 @@ +From: Balaji T K <balajitk@ti.com> +Date: Fri, 27 Sep 2013 17:05:10 +0530 +Subject: [PATCH] ARM: dts: am335x-evm[sdk]: switch mmc1 to 4-bit mode + +Set bus-width to make SD card operate in 4 bit mode. + +Signed-off-by: Balaji T K <balajitk@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-evm.dts | 1 + + arch/arm/boot/dts/am335x-evmsk.dts | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts +index 23b0a3e..028ca09 100644 +--- a/arch/arm/boot/dts/am335x-evm.dts ++++ b/arch/arm/boot/dts/am335x-evm.dts +@@ -521,4 +521,5 @@ + &mmc1 { + status = "okay"; + vmmc-supply = <&vmmc_reg>; ++ bus-width = <4>; + }; +diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts +index bc93895..563a2b1 100644 +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -423,4 +423,5 @@ + &mmc1 { + status = "okay"; + vmmc-supply = <&vmmc_reg>; ++ bus-width = <4>; + }; diff --git a/patches/linux-3.12/0244-ARM-dts-OMAP4-Add-AES-node.patch b/patches/linux-3.12/0244-ARM-dts-OMAP4-Add-AES-node.patch new file mode 100644 index 0000000..9025051 --- /dev/null +++ b/patches/linux-3.12/0244-ARM-dts-OMAP4-Add-AES-node.patch @@ -0,0 +1,32 @@ +From: Joel Fernandes <joelf@ti.com> +Date: Thu, 11 Jul 2013 18:20:05 -0500 +Subject: [PATCH] ARM: dts: OMAP4: Add AES node + +OMAP4 has an AES module that uses the omap-aes crypto driver. +Add DT entries for the same. + +Signed-off-by: Joel Fernandes <joelf@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap4.dtsi | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi +index 45708e1..16a44d6 100644 +--- a/arch/arm/boot/dts/omap4.dtsi ++++ b/arch/arm/boot/dts/omap4.dtsi +@@ -663,5 +663,14 @@ + ram-bits = <12>; + ti,has-mailbox; + }; ++ ++ aes: aes@4b501000 { ++ compatible = "ti,omap4-aes"; ++ ti,hwmods = "aes"; ++ reg = <0x4b501000 0xa0>; ++ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; ++ dmas = <&sdma 111>, <&sdma 110>; ++ dma-names = "tx", "rx"; ++ }; + }; + }; diff --git a/patches/linux-3.12/0245-ARM-dts-OMAP4-Add-DES3DES-node.patch b/patches/linux-3.12/0245-ARM-dts-OMAP4-Add-DES3DES-node.patch new file mode 100644 index 0000000..298bcfc --- /dev/null +++ b/patches/linux-3.12/0245-ARM-dts-OMAP4-Add-DES3DES-node.patch @@ -0,0 +1,32 @@ +From: Joel Fernandes <joelf@ti.com> +Date: Tue, 24 Sep 2013 15:23:33 -0500 +Subject: [PATCH] ARM: dts: OMAP4: Add DES3DES node + +OMAP4 has an DES3DES module that uses the omap-des crypto driver. +Add DT entries for the same. + +Signed-off-by: Joel Fernandes <joelf@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap4.dtsi | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi +index 16a44d6..6be1f56 100644 +--- a/arch/arm/boot/dts/omap4.dtsi ++++ b/arch/arm/boot/dts/omap4.dtsi +@@ -672,5 +672,14 @@ + dmas = <&sdma 111>, <&sdma 110>; + dma-names = "tx", "rx"; + }; ++ ++ des: des@480a5000 { ++ compatible = "ti,omap4-des"; ++ ti,hwmods = "des"; ++ reg = <0x480a5000 0xa0>; ++ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; ++ dmas = <&sdma 117>, <&sdma 116>; ++ dma-names = "tx", "rx"; ++ }; + }; + }; diff --git a/patches/linux-3.12/0246-ARM-dts-AM33XX-Add-SHAM-data-and-documentation.patch b/patches/linux-3.12/0246-ARM-dts-AM33XX-Add-SHAM-data-and-documentation.patch new file mode 100644 index 0000000..35f2ab5 --- /dev/null +++ b/patches/linux-3.12/0246-ARM-dts-AM33XX-Add-SHAM-data-and-documentation.patch @@ -0,0 +1,113 @@ +From: "Mark A. Greer" <mgreer@animalcreek.com> +Date: Fri, 23 Aug 2013 14:12:35 -0700 +Subject: [PATCH] ARM: dts: AM33XX: Add SHAM data and documentation + +Add the generic AM33XX SHAM module's device tree data and +enable it for the am335x-evm, am335x-evmsk, and am335x-bone +platforms. Also add Documentation file describing the data +for the SHAM module. + +Cc: Paul Walmsley <paul@pwsan.com> +Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> +Signed-off-by: Joel Fernandes <joelf@ti.com> +[joelf@ti.com: Dropped interrupt-parent property, documentation fixups] +Acked-by: Mark Rutland <mark.rutland@arm.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + .../devicetree/bindings/crypto/omap-sham.txt | 28 ++++++++++++++++++++++ + arch/arm/boot/dts/am335x-bone.dts | 4 ++++ + arch/arm/boot/dts/am335x-evm.dts | 4 ++++ + arch/arm/boot/dts/am335x-evmsk.dts | 4 ++++ + arch/arm/boot/dts/am33xx.dtsi | 9 +++++++ + 5 files changed, 49 insertions(+) + create mode 100644 Documentation/devicetree/bindings/crypto/omap-sham.txt + +diff --git a/Documentation/devicetree/bindings/crypto/omap-sham.txt b/Documentation/devicetree/bindings/crypto/omap-sham.txt +new file mode 100644 +index 0000000..f839acd +--- /dev/null ++++ b/Documentation/devicetree/bindings/crypto/omap-sham.txt +@@ -0,0 +1,28 @@ ++OMAP SoC SHA crypto Module ++ ++Required properties: ++ ++- compatible : Should contain entries for this and backward compatible ++ SHAM versions: ++ - "ti,omap2-sham" for OMAP2 & OMAP3. ++ - "ti,omap4-sham" for OMAP4 and AM33XX. ++ Note that these two versions are incompatible. ++- ti,hwmods: Name of the hwmod associated with the SHAM module ++- reg : Offset and length of the register set for the module ++- interrupts : the interrupt-specifier for the SHAM module. ++ ++Optional properties: ++- dmas: DMA specifiers for the rx dma. See the DMA client binding, ++ Documentation/devicetree/bindings/dma/dma.txt ++- dma-names: DMA request name. Should be "rx" if a dma is present. ++ ++Example: ++ /* AM335x */ ++ sham: sham@53100000 { ++ compatible = "ti,omap4-sham"; ++ ti,hwmods = "sham"; ++ reg = <0x53100000 0x200>; ++ interrupts = <109>; ++ dmas = <&edma 36>; ++ dma-names = "rx"; ++ }; +diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts +index 0d63348..8a9802e 100644 +--- a/arch/arm/boot/dts/am335x-bone.dts ++++ b/arch/arm/boot/dts/am335x-bone.dts +@@ -19,3 +19,7 @@ + &mmc1 { + vmmc-supply = <&ldo3_reg>; + }; ++ ++&sham { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts +index 028ca09..09786ef 100644 +--- a/arch/arm/boot/dts/am335x-evm.dts ++++ b/arch/arm/boot/dts/am335x-evm.dts +@@ -523,3 +523,7 @@ + vmmc-supply = <&vmmc_reg>; + bus-width = <4>; + }; ++ ++&sham { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts +index 563a2b1..08d5cd9 100644 +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -425,3 +425,7 @@ + vmmc-supply = <&vmmc_reg>; + bus-width = <4>; + }; ++ ++&sham { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index 5704c25..18b4742 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -712,5 +712,14 @@ + #size-cells = <1>; + status = "disabled"; + }; ++ ++ sham: sham@53100000 { ++ compatible = "ti,omap4-sham"; ++ ti,hwmods = "sham"; ++ reg = <0x53100000 0x200>; ++ interrupts = <109>; ++ dmas = <&edma 36>; ++ dma-names = "rx"; ++ }; + }; + }; diff --git a/patches/linux-3.12/0247-ARM-dts-AM33XX-Add-AES-data-and-documentation.patch b/patches/linux-3.12/0247-ARM-dts-AM33XX-Add-AES-data-and-documentation.patch new file mode 100644 index 0000000..0ba534e --- /dev/null +++ b/patches/linux-3.12/0247-ARM-dts-AM33XX-Add-AES-data-and-documentation.patch @@ -0,0 +1,116 @@ +From: "Mark A. Greer" <mgreer@animalcreek.com> +Date: Fri, 23 Aug 2013 14:12:36 -0700 +Subject: [PATCH] ARM: dts: AM33XX: Add AES data and documentation + +Add the generic AM33XX AES module's device tree data and +enable it for the am335x-evm, am335x-evmsk, and am335x-bone +platforms. Also add Documentation file describing the data +for the AES module. + +Cc: Paul Walmsley <paul@pwsan.com> +Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> +Signed-off-by: Joel Fernandes <joelf@ti.com> +[joelf@ti.com: Dropped interrupt-parent property, documentation fixups] +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + .../devicetree/bindings/crypto/omap-aes.txt | 31 ++++++++++++++++++++++ + arch/arm/boot/dts/am335x-bone.dts | 4 +++ + arch/arm/boot/dts/am335x-evm.dts | 4 +++ + arch/arm/boot/dts/am335x-evmsk.dts | 4 +++ + arch/arm/boot/dts/am33xx.dtsi | 10 +++++++ + 5 files changed, 53 insertions(+) + create mode 100644 Documentation/devicetree/bindings/crypto/omap-aes.txt + +diff --git a/Documentation/devicetree/bindings/crypto/omap-aes.txt b/Documentation/devicetree/bindings/crypto/omap-aes.txt +new file mode 100644 +index 0000000..fd97176 +--- /dev/null ++++ b/Documentation/devicetree/bindings/crypto/omap-aes.txt +@@ -0,0 +1,31 @@ ++OMAP SoC AES crypto Module ++ ++Required properties: ++ ++- compatible : Should contain entries for this and backward compatible ++ AES versions: ++ - "ti,omap2-aes" for OMAP2. ++ - "ti,omap3-aes" for OMAP3. ++ - "ti,omap4-aes" for OMAP4 and AM33XX. ++ Note that the OMAP2 and 3 versions are compatible (OMAP3 supports ++ more algorithms) but they are incompatible with OMAP4. ++- ti,hwmods: Name of the hwmod associated with the AES module ++- reg : Offset and length of the register set for the module ++- interrupts : the interrupt-specifier for the AES module. ++ ++Optional properties: ++- dmas: DMA specifiers for tx and rx dma. See the DMA client binding, ++ Documentation/devicetree/bindings/dma/dma.txt ++- dma-names: DMA request names should include "tx" and "rx" if present. ++ ++Example: ++ /* AM335x */ ++ aes: aes@53500000 { ++ compatible = "ti,omap4-aes"; ++ ti,hwmods = "aes"; ++ reg = <0x53500000 0xa0>; ++ interrupts = <102>; ++ dmas = <&edma 6>, ++ <&edma 5>; ++ dma-names = "tx", "rx"; ++ }; +diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts +index 8a9802e..94ee427 100644 +--- a/arch/arm/boot/dts/am335x-bone.dts ++++ b/arch/arm/boot/dts/am335x-bone.dts +@@ -23,3 +23,7 @@ + &sham { + status = "okay"; + }; ++ ++&aes { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts +index 09786ef..ff834ad 100644 +--- a/arch/arm/boot/dts/am335x-evm.dts ++++ b/arch/arm/boot/dts/am335x-evm.dts +@@ -527,3 +527,7 @@ + &sham { + status = "okay"; + }; ++ ++&aes { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts +index 08d5cd9..5f12b28 100644 +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -429,3 +429,7 @@ + &sham { + status = "okay"; + }; ++ ++&aes { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index 18b4742..4f633ed 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -721,5 +721,15 @@ + dmas = <&edma 36>; + dma-names = "rx"; + }; ++ ++ aes: aes@53500000 { ++ compatible = "ti,omap4-aes"; ++ ti,hwmods = "aes"; ++ reg = <0x53500000 0xa0>; ++ interrupts = <102>; ++ dmas = <&edma 6>, ++ <&edma 5>; ++ dma-names = "tx", "rx"; ++ }; + }; + }; diff --git a/patches/linux-3.12/0248-ARM-dts-AM33XX-Fix-AES-interrupt-number.patch b/patches/linux-3.12/0248-ARM-dts-AM33XX-Fix-AES-interrupt-number.patch new file mode 100644 index 0000000..39de9f9 --- /dev/null +++ b/patches/linux-3.12/0248-ARM-dts-AM33XX-Fix-AES-interrupt-number.patch @@ -0,0 +1,27 @@ +From: Joel Fernandes <joelf@ti.com> +Date: Wed, 17 Jul 2013 19:07:52 -0500 +Subject: [PATCH] ARM: dts: AM33XX: Fix AES interrupt number + +AES interrupts were previously not used, but after recent changes +to omap-aes driver, its being used. +Correct the interrupt number to have working PIO mode. + +Signed-off-by: Joel Fernandes <joelf@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am33xx.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index 4f633ed..b1f7e76 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -726,7 +726,7 @@ + compatible = "ti,omap4-aes"; + ti,hwmods = "aes"; + reg = <0x53500000 0xa0>; +- interrupts = <102>; ++ interrupts = <103>; + dmas = <&edma 6>, + <&edma 5>; + dma-names = "tx", "rx"; diff --git a/patches/linux-3.12/0249-ARM-dts-AM437X-Add-AES-node.patch b/patches/linux-3.12/0249-ARM-dts-AM437X-Add-AES-node.patch new file mode 100644 index 0000000..7c302c1 --- /dev/null +++ b/patches/linux-3.12/0249-ARM-dts-AM437X-Add-AES-node.patch @@ -0,0 +1,30 @@ +From: Joel Fernandes <joelf@ti.com> +Date: Tue, 24 Sep 2013 14:35:09 -0500 +Subject: [PATCH] ARM: dts: AM437X: Add AES node + +AM437x SoC has AES module similar to the one on OMAP4. +Add DT node for the same. + +Signed-off-by: Joel Fernandes <joelf@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am4372.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi +index 0fe393a..7e9ff75 100644 +--- a/arch/arm/boot/dts/am4372.dtsi ++++ b/arch/arm/boot/dts/am4372.dtsi +@@ -411,5 +411,12 @@ + ti,hwmods = "epwmss5"; + status = "disabled"; + }; ++ ++ aes: aes@53501000 { ++ compatible = "ti,omap4-aes"; ++ ti,hwmods = "aes"; ++ reg = <0x53501000 0xa0>; ++ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; ++ }; + }; + }; diff --git a/patches/linux-3.12/0250-ARM-dts-AM437X-Add-DES-node.patch b/patches/linux-3.12/0250-ARM-dts-AM437X-Add-DES-node.patch new file mode 100644 index 0000000..15438b7 --- /dev/null +++ b/patches/linux-3.12/0250-ARM-dts-AM437X-Add-DES-node.patch @@ -0,0 +1,30 @@ +From: Joel Fernandes <joelf@ti.com> +Date: Tue, 24 Sep 2013 14:37:33 -0500 +Subject: [PATCH] ARM: dts: AM437X: Add DES node + +AM437x SoC has a DES3DES module similar to the one on OMAP4. +Add DT node for the same. + +Signed-off-by: Joel Fernandes <joelf@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am4372.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi +index 7e9ff75..a403172 100644 +--- a/arch/arm/boot/dts/am4372.dtsi ++++ b/arch/arm/boot/dts/am4372.dtsi +@@ -418,5 +418,12 @@ + reg = <0x53501000 0xa0>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + }; ++ ++ des: des@53701000 { ++ compatible = "ti,omap4-des"; ++ ti,hwmods = "des"; ++ reg = <0x53701000 0xa0>; ++ interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; ++ }; + }; + }; diff --git a/patches/linux-3.12/0251-ARM-dts-AM33XX-Add-LCDC-info-into-am335x-evm.patch b/patches/linux-3.12/0251-ARM-dts-AM33XX-Add-LCDC-info-into-am335x-evm.patch new file mode 100644 index 0000000..d8cec90 --- /dev/null +++ b/patches/linux-3.12/0251-ARM-dts-AM33XX-Add-LCDC-info-into-am335x-evm.patch @@ -0,0 +1,135 @@ +From: Benoit Parrot <bparrot@ti.com> +Date: Thu, 8 Aug 2013 18:28:14 -0500 +Subject: [PATCH] ARM: dts: AM33XX: Add LCDC info into am335x-evm + +Add LCDC device node in DT for am33xx +Add LCDC and Panel info in DT for am335x-evm + +Changes: +- remove redundant/unnecessary SoC specific setting in the board dts +- resolved conflicts on for_3.13/dts + +Signed-off-by: Benoit Parrot <bparrot@ti.com> +Signed-off-by: Joel Fernandes <joelf@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-evm.dts | 71 ++++++++++++++++++++++++++++++++++++++++ + arch/arm/boot/dts/am33xx.dtsi | 9 +++++ + 2 files changed, 80 insertions(+) + +diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts +index ff834ad..eabacf9 100644 +--- a/arch/arm/boot/dts/am335x-evm.dts ++++ b/arch/arm/boot/dts/am335x-evm.dts +@@ -85,6 +85,40 @@ + brightness-levels = <0 51 53 56 62 75 101 152 255>; + default-brightness-level = <8>; + }; ++ ++ panel { ++ compatible = "ti,tilcdc,panel"; ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lcd_pins_s0>; ++ panel-info { ++ ac-bias = <255>; ++ ac-bias-intrpt = <0>; ++ dma-burst-sz = <16>; ++ bpp = <32>; ++ fdd = <0x80>; ++ sync-edge = <0>; ++ sync-ctrl = <1>; ++ raster-order = <0>; ++ fifo-th = <0>; ++ }; ++ ++ display-timings { ++ 800x480p62 { ++ clock-frequency = <30000000>; ++ hactive = <800>; ++ vactive = <480>; ++ hfront-porch = <39>; ++ hback-porch = <39>; ++ hsync-len = <47>; ++ vback-porch = <29>; ++ vfront-porch = <13>; ++ vsync-len = <2>; ++ hsync-active = <1>; ++ vsync-active = <1>; ++ }; ++ }; ++ }; + }; + + &am33xx_pinmux { +@@ -212,6 +246,39 @@ + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; ++ ++ lcd_pins_s0: lcd_pins_s0 { ++ pinctrl-single,pins = < ++ 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */ ++ 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */ ++ 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */ ++ 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */ ++ 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */ ++ 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */ ++ 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */ ++ 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */ ++ 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */ ++ 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */ ++ 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */ ++ 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */ ++ 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */ ++ 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */ ++ 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */ ++ 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */ ++ 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */ ++ 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */ ++ 0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */ ++ 0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */ ++ 0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */ ++ 0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */ ++ 0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */ ++ 0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */ ++ 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */ ++ 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */ ++ 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */ ++ 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */ ++ >; ++ }; + }; + + &uart0 { +@@ -308,6 +375,10 @@ + }; + }; + ++&lcdc { ++ status = "okay"; ++}; ++ + &elm { + status = "okay"; + }; +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index b1f7e76..b7d3abb 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -684,6 +684,15 @@ + status = "disabled"; + }; + ++ lcdc: lcdc@4830e000 { ++ compatible = "ti,am33xx-tilcdc"; ++ reg = <0x4830e000 0x1000>; ++ interrupt-parent = <&intc>; ++ interrupts = <36>; ++ ti,hwmods = "lcdc"; ++ status = "disabled"; ++ }; ++ + tscadc: tscadc@44e0d000 { + compatible = "ti,am3359-tscadc"; + reg = <0x44e0d000 0x1000>; diff --git a/patches/linux-3.12/0252-ARM-dts-AM33XX-beagle-black-add-pinmux-and-hdmi-node.patch b/patches/linux-3.12/0252-ARM-dts-AM33XX-beagle-black-add-pinmux-and-hdmi-node.patch new file mode 100644 index 0000000..3e969b1 --- /dev/null +++ b/patches/linux-3.12/0252-ARM-dts-AM33XX-beagle-black-add-pinmux-and-hdmi-node.patch @@ -0,0 +1,72 @@ +From: Darren Etheridge <detheridge@ti.com> +Date: Fri, 20 Sep 2013 15:01:42 -0500 +Subject: [PATCH] ARM: dts: AM33XX beagle black: add pinmux and hdmi node to + enable display + +Enable the hdmi output and the LCD Controller on BeagleBone +Black. Also configure the correct pinmux for output of +video data from the SoC to the HDMI encoder. + +Signed-off-by: Darren Etheridge <detheridge@ti.com> +Signed-off-by: Joel Fernandes <joelf@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-boneblack.dts | 48 ++++++++++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts +index 16b3bea..6b71ad9 100644 +--- a/arch/arm/boot/dts/am335x-boneblack.dts ++++ b/arch/arm/boot/dts/am335x-boneblack.dts +@@ -28,3 +28,51 @@ + status = "okay"; + ti,vcc-aux-disable-is-sleep; + }; ++ ++&am33xx_pinmux { ++ nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { ++ pinctrl-single,pins = < ++ 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ ++ 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ ++ 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ ++ 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ ++ 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ ++ 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ ++ >; ++ }; ++ nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { ++ pinctrl-single,pins = < ++ 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ ++ >; ++ }; ++}; ++ ++&lcdc { ++ status = "okay"; ++}; ++ ++/ { ++ hdmi { ++ compatible = "ti,tilcdc,slave"; ++ i2c = <&i2c0>; ++ pinctrl-names = "default", "off"; ++ pinctrl-0 = <&nxp_hdmi_bonelt_pins>; ++ pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; ++ status = "okay"; ++ }; ++}; diff --git a/patches/linux-3.12/0253-ARM-dts-omap3-igep-Add-USB-OTG-support.patch b/patches/linux-3.12/0253-ARM-dts-omap3-igep-Add-USB-OTG-support.patch new file mode 100644 index 0000000..0060d7c --- /dev/null +++ b/patches/linux-3.12/0253-ARM-dts-omap3-igep-Add-USB-OTG-support.patch @@ -0,0 +1,33 @@ +From: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Date: Mon, 7 Oct 2013 17:12:23 +0200 +Subject: [PATCH] ARM: dts: omap3-igep: Add USB OTG support + +Commit ad871c10b ("ARM: dts: OMAP: Add usb_otg and glue data to O +added USB OTG support for most OMAP boards but some OMAP3 boards +such as IGEP boards were not updated. This patch adds an USB OTG +device node to these board. + +Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-igep.dtsi | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi +index 0f92224..ba1e58b 100644 +--- a/arch/arm/boot/dts/omap3-igep.dtsi ++++ b/arch/arm/boot/dts/omap3-igep.dtsi +@@ -143,3 +143,12 @@ + &twl_gpio { + ti,use-leds; + }; ++ ++&usb_otg_hs { ++ interface-type = <0>; ++ usb-phy = <&usb2_phy>; ++ phys = <&usb2_phy>; ++ phy-names = "usb2-phy"; ++ mode = <3>; ++ power = <50>; ++}; diff --git a/patches/linux-3.12/0254-ARM-dts-omap3-igep0020-Add-HS-USB-Host-support.patch b/patches/linux-3.12/0254-ARM-dts-omap3-igep0020-Add-HS-USB-Host-support.patch new file mode 100644 index 0000000..88b2093 --- /dev/null +++ b/patches/linux-3.12/0254-ARM-dts-omap3-igep0020-Add-HS-USB-Host-support.patch @@ -0,0 +1,79 @@ +From: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Date: Mon, 7 Oct 2013 17:12:24 +0200 +Subject: [PATCH] ARM: dts: omap3-igep0020: Add HS USB Host support + +Add device nodes for the HS USB Host port 1, USB PHY and its +required regulator and also pin mux setup for HS USB1 pins. + +Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> +Acked-by: Roger Quadros <rogerq@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-igep0020.dts | 49 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 49 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts +index eedf0d8..35346f2 100644 +--- a/arch/arm/boot/dts/omap3-igep0020.dts ++++ b/arch/arm/boot/dts/omap3-igep0020.dts +@@ -55,6 +55,47 @@ + regulator-name = "vdd33a"; + regulator-always-on; + }; ++ ++ /* HS USB Port 1 Power */ ++ hsusb1_power: hsusb1_power_reg { ++ compatible = "regulator-fixed"; ++ regulator-name = "hsusb1_vbus"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */ ++ startup-delay-us = <70000>; ++ }; ++ ++ /* HS USB Host PHY on PORT 1 */ ++ hsusb1_phy: hsusb1_phy { ++ compatible = "usb-nop-xceiv"; ++ reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */ ++ vcc-supply = <&hsusb1_power>; ++ }; ++}; ++ ++&omap3_pmx_core { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &hsusbb1_pins ++ >; ++ ++ hsusbb1_pins: pinmux_hsusbb1_pins { ++ pinctrl-single,pins = < ++ 0x5aa (PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ ++ 0x5a8 (PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ ++ 0x5bc (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */ ++ 0x5be (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */ ++ 0x5ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */ ++ 0x5ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */ ++ 0x5b0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */ ++ 0x5b2 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */ ++ 0x5b4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */ ++ 0x5b6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */ ++ 0x5b8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */ ++ 0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */ ++ >; ++ }; + }; + + &leds_pins { +@@ -166,3 +207,11 @@ + smsc,save-mac-address; + }; + }; ++ ++&usbhshost { ++ port1-mode = "ehci-phy"; ++}; ++ ++&usbhsehci { ++ phys = <&hsusb1_phy>; ++}; diff --git a/patches/linux-3.12/0255-ARM-dts-omap3-igep0020-use-standard-constant-for-IRQ.patch b/patches/linux-3.12/0255-ARM-dts-omap3-igep0020-use-standard-constant-for-IRQ.patch new file mode 100644 index 0000000..976013f --- /dev/null +++ b/patches/linux-3.12/0255-ARM-dts-omap3-igep0020-use-standard-constant-for-IRQ.patch @@ -0,0 +1,27 @@ +From: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Date: Mon, 7 Oct 2013 17:12:25 +0200 +Subject: [PATCH] ARM: dts: omap3-igep0020: use standard constant for IRQ flags + +Commit 840ef8b7 ("ARM: dt: add header to define IRQ flags") added +constants for IRQ edge/level triggered types so use it instead of +a magic number to enhance the DT readability. + +Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-igep0020.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts +index 35346f2..750ce84 100644 +--- a/arch/arm/boot/dts/omap3-igep0020.dts ++++ b/arch/arm/boot/dts/omap3-igep0020.dts +@@ -199,7 +199,7 @@ + gpmc,cycle2cycle-diffcsen; + + interrupt-parent = <&gpio6>; +- interrupts = <16 8>; ++ interrupts = <16 IRQ_TYPE_LEVEL_LOW>; + vmmc-supply = <&vddvario>; + vmmc_aux-supply = <&vdd33a>; + reg-io-width = <4>; diff --git a/patches/linux-3.12/0256-ARM-dts-omap5-uevm-mark-TWL6037-as-system-power-cont.patch b/patches/linux-3.12/0256-ARM-dts-omap5-uevm-mark-TWL6037-as-system-power-cont.patch new file mode 100644 index 0000000..eac8fff --- /dev/null +++ b/patches/linux-3.12/0256-ARM-dts-omap5-uevm-mark-TWL6037-as-system-power-cont.patch @@ -0,0 +1,25 @@ +From: Nishanth Menon <nm@ti.com> +Date: Thu, 19 Sep 2013 14:11:36 -0500 +Subject: [PATCH] ARM: dts: omap5-uevm: mark TWL6037 as system-power-controller + +This allows the palmas pm_power_off to kick in on power off command +and switch off the board. + +Signed-off-by: Nishanth Menon <nm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5-uevm.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts +index 748f6bf..d784b3a 100644 +--- a/arch/arm/boot/dts/omap5-uevm.dts ++++ b/arch/arm/boot/dts/omap5-uevm.dts +@@ -249,6 +249,7 @@ + reg = <0x48>; + interrupt-controller; + #interrupt-cells = <2>; ++ ti,system-power-controller; + + extcon_usb3: palmas_usb { + compatible = "ti,palmas-usb-vid"; diff --git a/patches/linux-3.12/0257-ARM-dts-dra7-evm-Add-mmc1-node-for-micro-sd-support.patch b/patches/linux-3.12/0257-ARM-dts-dra7-evm-Add-mmc1-node-for-micro-sd-support.patch new file mode 100644 index 0000000..29c760e --- /dev/null +++ b/patches/linux-3.12/0257-ARM-dts-dra7-evm-Add-mmc1-node-for-micro-sd-support.patch @@ -0,0 +1,30 @@ +From: Balaji T K <balajitk@ti.com> +Date: Mon, 7 Oct 2013 21:55:03 +0530 +Subject: [PATCH] ARM: dts: dra7-evm: Add mmc1 node for micro-sd support + +Add mmc1 dt node to dra7-evm board. +Input for ldo1 regulator is controlled by gpio 5 of pcf8575 chip (0x21) +on i2c1 bus. When dt support for gpio-pcf857x is available, input supply +will be modelled as cascaded regulator. + +Signed-off-by: Balaji T K <balajitk@ti.com> +Acked-by: Sekhar Nori <nsekhar@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/dra7-evm.dts | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts +index fbbe406..65cd15a 100644 +--- a/arch/arm/boot/dts/dra7-evm.dts ++++ b/arch/arm/boot/dts/dra7-evm.dts +@@ -250,3 +250,9 @@ + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; + }; ++ ++&mmc1 { ++ status = "okay"; ++ vmmc-supply = <&ldo1_reg>; ++ bus-width = <4>; ++}; diff --git a/patches/linux-3.12/0258-ARM-dts-dra7-evm-Add-mmc2-node-for-eMMC-support.patch b/patches/linux-3.12/0258-ARM-dts-dra7-evm-Add-mmc2-node-for-eMMC-support.patch new file mode 100644 index 0000000..a3082c9 --- /dev/null +++ b/patches/linux-3.12/0258-ARM-dts-dra7-evm-Add-mmc2-node-for-eMMC-support.patch @@ -0,0 +1,42 @@ +From: Balaji T K <balajitk@ti.com> +Date: Mon, 7 Oct 2013 21:55:04 +0530 +Subject: [PATCH] ARM: dts: dra7-evm: Add mmc2 node for eMMC support + +Add mmc2 dt node to dra7-evm board +and model eMMC vcc as fixed regulator. + +Signed-off-by: Balaji T K <balajitk@ti.com> +Acked-by: Sekhar Nori <nsekhar@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/dra7-evm.dts | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts +index 65cd15a..3abf5f4 100644 +--- a/arch/arm/boot/dts/dra7-evm.dts ++++ b/arch/arm/boot/dts/dra7-evm.dts +@@ -17,6 +17,13 @@ + device_type = "memory"; + reg = <0x80000000 0x60000000>; /* 1536 MB */ + }; ++ ++ mmc2_3v3: fixedregulator-mmc2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "mmc2_3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; + }; + + &dra7_pmx_core { +@@ -256,3 +263,9 @@ + vmmc-supply = <&ldo1_reg>; + bus-width = <4>; + }; ++ ++&mmc2 { ++ status = "okay"; ++ vmmc-supply = <&mmc2_3v3>; ++ bus-width = <8>; ++}; diff --git a/patches/linux-3.12/0259-ARM-dts-OMAP5-Remove-clock-frequency-field-for-cpu-t.patch b/patches/linux-3.12/0259-ARM-dts-OMAP5-Remove-clock-frequency-field-for-cpu-t.patch new file mode 100644 index 0000000..2ca53e9 --- /dev/null +++ b/patches/linux-3.12/0259-ARM-dts-OMAP5-Remove-clock-frequency-field-for-cpu-t.patch @@ -0,0 +1,29 @@ +From: Sricharan R <r.sricharan@ti.com> +Date: Thu, 10 Oct 2013 13:20:13 +0530 +Subject: [PATCH] ARM: dts: OMAP5: Remove clock-frequency field for cpu timers + +The arm arch timers frequency are now programmed in the CNTFREQ +per-cpu register by the timer code using the secure API [1]. +So remove the redundant entry from the dts. + +[1] http://marc.info/?l=linux-omap&m=138139106312786&w=2 + +Signed-off-by: Sricharan R <r.sricharan@ti.com> +Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5.dtsi | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi +index 6192c45..6a558ce 100644 +--- a/arch/arm/boot/dts/omap5.dtsi ++++ b/arch/arm/boot/dts/omap5.dtsi +@@ -52,7 +52,6 @@ + <GIC_PPI 14 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>; +- clock-frequency = <6144000>; + }; + + gic: interrupt-controller@48211000 { diff --git a/patches/linux-3.12/0260-ARM-dts-omap3-Adapt-USB-OTG-to-generic-PHY-framework.patch b/patches/linux-3.12/0260-ARM-dts-omap3-Adapt-USB-OTG-to-generic-PHY-framework.patch new file mode 100644 index 0000000..cc6231e --- /dev/null +++ b/patches/linux-3.12/0260-ARM-dts-omap3-Adapt-USB-OTG-to-generic-PHY-framework.patch @@ -0,0 +1,46 @@ +From: Roger Quadros <rogerq@ti.com> +Date: Mon, 7 Oct 2013 16:28:13 +0300 +Subject: [PATCH] ARM: dts: omap3: Adapt USB OTG to generic PHY framework + +The generic PHY framewrok expects different properties than the +old USB PHY framework. Supply those properties. + +Fixes USB OTG port on GAT04 and N900 after the Generic PHY framework was +merged in greg/usb-next. [1] + +[1] - https://lkml.org/lkml/2013/9/27/581 + +Signed-off-by: Roger Quadros <rogerq@ti.com> +Acked-by: Felipe Balbi <balbi@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-gta04.dts | 2 ++ + arch/arm/boot/dts/omap3-n900.dts | 2 ++ + 2 files changed, 4 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-gta04.dts b/arch/arm/boot/dts/omap3-gta04.dts +index a84684a..b9b55c9 100644 +--- a/arch/arm/boot/dts/omap3-gta04.dts ++++ b/arch/arm/boot/dts/omap3-gta04.dts +@@ -131,6 +131,8 @@ + &usb_otg_hs { + interface-type = <0>; + usb-phy = <&usb2_phy>; ++ phys = <&usb2_phy>; ++ phy-names = "usb2-phy"; + mode = <3>; + power = <50>; + }; +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index d64fa04..e13b697 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -87,6 +87,8 @@ + &usb_otg_hs { + interface-type = <0>; + usb-phy = <&usb2_phy>; ++ phys = <&usb2_phy>; ++ phy-names = "usb2-phy"; + mode = <2>; + power = <50>; + }; diff --git a/patches/linux-3.12/0261-ARM-dts-omap-Add-reset-idle-on-init-bindings-for-OMA.patch b/patches/linux-3.12/0261-ARM-dts-omap-Add-reset-idle-on-init-bindings-for-OMA.patch new file mode 100644 index 0000000..7e10fa9 --- /dev/null +++ b/patches/linux-3.12/0261-ARM-dts-omap-Add-reset-idle-on-init-bindings-for-OMA.patch @@ -0,0 +1,109 @@ +From: Rajendra Nayak <rnayak@ti.com> +Date: Tue, 15 Oct 2013 12:37:50 +0530 +Subject: [PATCH] ARM: dts: omap: Add reset/idle on init bindings for OMAP + +On OMAP we have co-processor IPs, memory controllers, +GPIOs which control regulators and power switches to +PMIC, and SoC internal Bus IPs, some or most of which +should either not be reset or idled or both at init. +(In some cases there are erratas which prevent an IP +from being reset) +Have a way to pass this information from DT. + +Update the am33xx/omap4 and omap5 dtsi files with the +new bindings for modules which either should not be +idled. reset or both. A later patch would cleanup the +same information that exists today as part of the hwmod +data files. + +Signed-off-by: Rajendra Nayak <rnayak@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + Documentation/devicetree/bindings/arm/omap/omap.txt | 3 ++- + arch/arm/boot/dts/am33xx.dtsi | 2 ++ + arch/arm/boot/dts/omap4.dtsi | 3 +++ + arch/arm/boot/dts/omap5.dtsi | 2 ++ + 4 files changed, 9 insertions(+), 1 deletion(-) + +diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt +index 91b7049..808c154 100644 +--- a/Documentation/devicetree/bindings/arm/omap/omap.txt ++++ b/Documentation/devicetree/bindings/arm/omap/omap.txt +@@ -21,7 +21,8 @@ Required properties: + Optional properties: + - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module + during suspend. +- ++- ti,no-reset-on-init: When present, the module should not be reset at init ++- ti,no-idle-on-init: When present, the module should not be idled at init + + Example: + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index b7d3abb..7947bfb 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -674,6 +674,7 @@ + reg = <0x44d00000 0x4000 /* M3 UMEM */ + 0x44d80000 0x2000>; /* M3 DMEM */ + ti,hwmods = "wkup_m3"; ++ ti,no-reset-on-init; + }; + + elm: elm@48080000 { +@@ -713,6 +714,7 @@ + gpmc: gpmc@50000000 { + compatible = "ti,am3352-gpmc"; + ti,hwmods = "gpmc"; ++ ti,no-idle-on-init; + reg = <0x50000000 0x2000>; + interrupts = <100>; + gpmc,num-cs = <7>; +diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi +index 6be1f56..6ca45b0 100644 +--- a/arch/arm/boot/dts/omap4.dtsi ++++ b/arch/arm/boot/dts/omap4.dtsi +@@ -214,6 +214,7 @@ + gpmc,num-cs = <8>; + gpmc,num-waitpins = <4>; + ti,hwmods = "gpmc"; ++ ti,no-idle-on-init; + }; + + uart1: serial@4806a000 { +@@ -492,6 +493,7 @@ + reg = <0x4c000000 0x100>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + ti,hwmods = "emif1"; ++ ti,no-idle-on-init; + phy-type = <1>; + hw-caps-read-idle-ctrl; + hw-caps-ll-interface; +@@ -503,6 +505,7 @@ + reg = <0x4d000000 0x100>; + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; + ti,hwmods = "emif2"; ++ ti,no-idle-on-init; + phy-type = <1>; + hw-caps-read-idle-ctrl; + hw-caps-ll-interface; +diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi +index 6a558ce..f518ec6 100644 +--- a/arch/arm/boot/dts/omap5.dtsi ++++ b/arch/arm/boot/dts/omap5.dtsi +@@ -606,6 +606,7 @@ + emif1: emif@4c000000 { + compatible = "ti,emif-4d5"; + ti,hwmods = "emif1"; ++ ti,no-idle-on-init; + phy-type = <2>; /* DDR PHY type: Intelli PHY */ + reg = <0x4c000000 0x400>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; +@@ -617,6 +618,7 @@ + emif2: emif@4d000000 { + compatible = "ti,emif-4d5"; + ti,hwmods = "emif2"; ++ ti,no-idle-on-init; + phy-type = <2>; /* DDR PHY type: Intelli PHY */ + reg = <0x4d000000 0x400>; + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; diff --git a/patches/linux-3.12/0262-ARM-dts-am335x-evmsk-Do-not-reset-gpio0.patch b/patches/linux-3.12/0262-ARM-dts-am335x-evmsk-Do-not-reset-gpio0.patch new file mode 100644 index 0000000..25dd15b --- /dev/null +++ b/patches/linux-3.12/0262-ARM-dts-am335x-evmsk-Do-not-reset-gpio0.patch @@ -0,0 +1,28 @@ +From: Rajendra Nayak <rnayak@ti.com> +Date: Wed, 9 Oct 2013 15:42:01 +0530 +Subject: [PATCH] ARM: dts: am335x-evmsk: Do not reset gpio0 + +Do not reset GPIO0 at boot-up because GPIO0 is used +on AM335x EVM-SK to control VTT regulators on DDR3. + +Without this EVM-SK boards fail to boot-up because +of DDR3 corruption. + +Signed-off-by: Rajendra Nayak <rnayak@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-evmsk.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts +index 5f12b28..1a7e0d9 100644 +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -433,3 +433,7 @@ + &aes { + status = "okay"; + }; ++ ++&gpio0 { ++ ti,no-reset-on-init; ++}; diff --git a/patches/linux-3.12/0263-ARM-dts-omap4-panda-es-Do-not-reset-gpio1.patch b/patches/linux-3.12/0263-ARM-dts-omap4-panda-es-Do-not-reset-gpio1.patch new file mode 100644 index 0000000..f716df7 --- /dev/null +++ b/patches/linux-3.12/0263-ARM-dts-omap4-panda-es-Do-not-reset-gpio1.patch @@ -0,0 +1,30 @@ +From: Nishanth Menon <nm@ti.com> +Date: Thu, 10 Oct 2013 11:44:41 -0500 +Subject: [PATCH] ARM: dts: omap4-panda-es: Do not reset gpio1 + +Do not reset GPIO1 at boot-up because GPIO 7 in GPIO1 block is used on +OMAP4460 PandaBoard-ES to select voltage register in TPS62361 which +supplies VDD_MPU. + +Without this, OMAP4460 PandaBoard-ES boards fail to boot-up because +MPU voltage switches over to VSET0 voltage value (boot voltage) which +is not sufficient to operate the device at OPP100. + +Signed-off-by: Nishanth Menon <nm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap4-panda-es.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts +index 56c4354..816d1c9 100644 +--- a/arch/arm/boot/dts/omap4-panda-es.dts ++++ b/arch/arm/boot/dts/omap4-panda-es.dts +@@ -62,3 +62,7 @@ + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + }; + }; ++ ++&gpio1 { ++ ti,no-reset-on-init; ++}; diff --git a/patches/linux-3.12/0264-ARM-dts-omap5-uevm-remove-always_on-boot_on-from-smp.patch b/patches/linux-3.12/0264-ARM-dts-omap5-uevm-remove-always_on-boot_on-from-smp.patch new file mode 100644 index 0000000..74d6b34 --- /dev/null +++ b/patches/linux-3.12/0264-ARM-dts-omap5-uevm-remove-always_on-boot_on-from-smp.patch @@ -0,0 +1,29 @@ +From: Kishon Vijay Abraham I <kishon@ti.com> +Date: Thu, 10 Oct 2013 16:19:53 +0530 +Subject: [PATCH] ARM: dts: omap5-uevm: remove always_on, boot_on from + smps10_out1 + +smps10 should be enabled only in the case of host mode. So stop +doing always_on, boot_on from smps10_out1. The driver will enable +it in host mode. + +Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> +Acked-by: Nishanth Menon <nm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5-uevm.dts | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts +index d784b3a..e06a04a 100644 +--- a/arch/arm/boot/dts/omap5-uevm.dts ++++ b/arch/arm/boot/dts/omap5-uevm.dts +@@ -334,8 +334,6 @@ + regulator-name = "smps10_out1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +- regulator-always-on; +- regulator-boot-on; + }; + + ldo1_reg: ldo1 { diff --git a/patches/linux-3.12/0265-ARM-dts-OMAP5-Add-dr_mode-for-dwc3.patch b/patches/linux-3.12/0265-ARM-dts-OMAP5-Add-dr_mode-for-dwc3.patch new file mode 100644 index 0000000..8c097eb --- /dev/null +++ b/patches/linux-3.12/0265-ARM-dts-OMAP5-Add-dr_mode-for-dwc3.patch @@ -0,0 +1,25 @@ +From: George Cherian <george.cherian@ti.com> +Date: Thu, 10 Oct 2013 16:19:54 +0530 +Subject: [PATCH] ARM: dts: OMAP5: Add dr_mode for dwc3 + +Added dr_mode property in dwc3 and set its default mode to device. + +Signed-off-by: George Cherian <george.cherian@ti.com> +Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi +index f518ec6..53686e4 100644 +--- a/arch/arm/boot/dts/omap5.dtsi ++++ b/arch/arm/boot/dts/omap5.dtsi +@@ -649,6 +649,7 @@ + reg = <0x4a030000 0x10000>; + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; + usb-phy = <&usb2_phy>, <&usb3_phy>; ++ dr_mode = "peripheral"; + tx-fifo-resize; + }; + }; diff --git a/patches/linux-3.12/0266-ARM-dts-AM4372-Add-L2-EDMA-mailbox-MMC-and-SHAM-node.patch b/patches/linux-3.12/0266-ARM-dts-AM4372-Add-L2-EDMA-mailbox-MMC-and-SHAM-node.patch new file mode 100644 index 0000000..b58eeb1 --- /dev/null +++ b/patches/linux-3.12/0266-ARM-dts-AM4372-Add-L2-EDMA-mailbox-MMC-and-SHAM-node.patch @@ -0,0 +1,337 @@ +From: Lokesh Vutla <lokeshvutla@ti.com> +Date: Fri, 11 Oct 2013 00:44:53 +0530 +Subject: [PATCH] ARM: dts: AM4372: Add L2, EDMA, mailbox, MMC and SHAM nodes + +Populate nodes for l2-cache-controller, EDMA, mailbox, +mmc, sham. + +Update as well DT properties for epwmss, aes, des. + +Signed-off-by: Suman Anna <s-anna@ti.com> +Signed-off-by: Balaji T K <balajitk@ti.com> +Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> +Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am4372.dtsi | 210 +++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 209 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi +index a403172..c328d5c 100644 +--- a/arch/arm/boot/dts/am4372.dtsi ++++ b/arch/arm/boot/dts/am4372.dtsi +@@ -19,6 +19,8 @@ + + aliases { + serial0 = &uart0; ++ ethernet0 = &cpsw_emac0; ++ ethernet1 = &cpsw_emac1; + }; + + cpus { +@@ -39,11 +41,42 @@ + <0x48240100 0x0100>; + }; + ++ l2-cache-controller@48242000 { ++ compatible = "arm,pl310-cache"; ++ reg = <0x48242000 0x1000>; ++ cache-unified; ++ cache-level = <2>; ++ }; ++ ++ am43xx_pinmux: pinmux@44e10800 { ++ compatible = "pinctrl-single"; ++ reg = <0x44e10800 0x31c>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-single,register-width = <32>; ++ pinctrl-single,function-mask = <0xffffffff>; ++ }; ++ + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; ++ ti,hwmods = "l3_main"; ++ ++ edma: edma@49000000 { ++ compatible = "ti,edma3"; ++ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; ++ reg = <0x49000000 0x10000>, ++ <0x44e10f90 0x10>; ++ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, ++ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; ++ #dma-cells = <1>; ++ dma-channels = <64>; ++ ti,edma-regions = <4>; ++ ti,edma-slots = <256>; ++ }; + + uart0: serial@44e09000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; +@@ -92,6 +125,18 @@ + status = "disabled"; + }; + ++ mailbox: mailbox@480C8000 { ++ compatible = "ti,omap4-mailbox"; ++ reg = <0x480C8000 0x200>; ++ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; ++ ti,hwmods = "mailbox"; ++ ti,mbox-num-users = <4>; ++ ti,mbox-num-fifos = <8>; ++ ti,mbox-names = "wkup_m3"; ++ ti,mbox-data = <0 0 0 0>; ++ status = "disabled"; ++ }; ++ + timer1: timer@44e31000 { + compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; + reg = <0x44e31000 0x400>; +@@ -203,7 +248,6 @@ + reg = <0x44e35000 0x1000>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + ti,hwmods = "wd_timer2"; +- status = "disabled"; + }; + + gpio0: gpio@44e07000 { +@@ -318,6 +362,40 @@ + status = "disabled"; + }; + ++ mmc1: mmc@48060000 { ++ compatible = "ti,omap4-hsmmc"; ++ reg = <0x48060000 0x1000>; ++ ti,hwmods = "mmc1"; ++ ti,dual-volt; ++ ti,needs-special-reset; ++ dmas = <&edma 24 ++ &edma 25>; ++ dma-names = "tx", "rx"; ++ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ mmc2: mmc@481d8000 { ++ compatible = "ti,omap4-hsmmc"; ++ reg = <0x481d8000 0x1000>; ++ ti,hwmods = "mmc2"; ++ ti,needs-special-reset; ++ dmas = <&edma 2 ++ &edma 3>; ++ dma-names = "tx", "rx"; ++ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ mmc3: mmc@47810000 { ++ compatible = "ti,omap4-hsmmc"; ++ reg = <0x47810000 0x1000>; ++ ti,hwmods = "mmc3"; ++ ti,needs-special-reset; ++ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ + spi1: spi@481a0000 { + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; + reg = <0x481a0000 0x400>; +@@ -366,50 +444,173 @@ + GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <1>; + ti,hwmods = "cpgmac0"; + status = "disabled"; ++ cpdma_channels = <8>; ++ ale_entries = <1024>; ++ bd_ram_size = <0x2000>; ++ no_bd_ram = <0>; ++ rx_descs = <64>; ++ mac_control = <0x20>; ++ slaves = <2>; ++ active_slave = <0>; ++ cpts_clock_mult = <0x80000000>; ++ cpts_clock_shift = <29>; ++ ranges; ++ ++ davinci_mdio: mdio@4a101000 { ++ compatible = "ti,am4372-mdio","ti,davinci_mdio"; ++ reg = <0x4a101000 0x100>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ti,hwmods = "davinci_mdio"; ++ bus_freq = <1000000>; ++ status = "disabled"; ++ }; ++ ++ cpsw_emac0: slave@4a100200 { ++ /* Filled in by U-Boot */ ++ mac-address = [ 00 00 00 00 00 00 ]; ++ }; ++ ++ cpsw_emac1: slave@4a100300 { ++ /* Filled in by U-Boot */ ++ mac-address = [ 00 00 00 00 00 00 ]; ++ }; + }; + + epwmss0: epwmss@48300000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x48300000 0x10>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; + ti,hwmods = "epwmss0"; + status = "disabled"; ++ ++ ecap0: ecap@48300100 { ++ compatible = "ti,am4372-ecap","ti,am33xx-ecap"; ++ reg = <0x48300100 0x80>; ++ ti,hwmods = "ecap0"; ++ status = "disabled"; ++ }; ++ ++ ehrpwm0: ehrpwm@48300200 { ++ compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; ++ reg = <0x48300200 0x80>; ++ ti,hwmods = "ehrpwm0"; ++ status = "disabled"; ++ }; + }; + + epwmss1: epwmss@48302000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x48302000 0x10>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; + ti,hwmods = "epwmss1"; + status = "disabled"; ++ ++ ecap1: ecap@48302100 { ++ compatible = "ti,am4372-ecap","ti,am33xx-ecap"; ++ reg = <0x48302100 0x80>; ++ ti,hwmods = "ecap1"; ++ status = "disabled"; ++ }; ++ ++ ehrpwm1: ehrpwm@48302200 { ++ compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; ++ reg = <0x48302200 0x80>; ++ ti,hwmods = "ehrpwm1"; ++ status = "disabled"; ++ }; + }; + + epwmss2: epwmss@48304000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x48304000 0x10>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; + ti,hwmods = "epwmss2"; + status = "disabled"; ++ ++ ecap2: ecap@48304100 { ++ compatible = "ti,am4372-ecap","ti,am33xx-ecap"; ++ reg = <0x48304100 0x80>; ++ ti,hwmods = "ecap2"; ++ status = "disabled"; ++ }; ++ ++ ehrpwm2: ehrpwm@48304200 { ++ compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; ++ reg = <0x48304200 0x80>; ++ ti,hwmods = "ehrpwm2"; ++ status = "disabled"; ++ }; + }; + + epwmss3: epwmss@48306000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x48306000 0x10>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; + ti,hwmods = "epwmss3"; + status = "disabled"; ++ ++ ehrpwm3: ehrpwm@48306200 { ++ compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; ++ reg = <0x48306200 0x80>; ++ ti,hwmods = "ehrpwm3"; ++ status = "disabled"; ++ }; + }; + + epwmss4: epwmss@48308000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x48308000 0x10>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; + ti,hwmods = "epwmss4"; + status = "disabled"; ++ ++ ehrpwm4: ehrpwm@48308200 { ++ compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; ++ reg = <0x48308200 0x80>; ++ ti,hwmods = "ehrpwm4"; ++ status = "disabled"; ++ }; + }; + + epwmss5: epwmss@4830a000 { + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + reg = <0x4830a000 0x10>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; + ti,hwmods = "epwmss5"; + status = "disabled"; ++ ++ ehrpwm5: ehrpwm@4830a200 { ++ compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; ++ reg = <0x4830a200 0x80>; ++ ti,hwmods = "ehrpwm5"; ++ status = "disabled"; ++ }; ++ }; ++ ++ sham: sham@53100000 { ++ compatible = "ti,omap5-sham"; ++ ti,hwmods = "sham"; ++ reg = <0x53100000 0x300>; ++ dmas = <&edma 36>; ++ dma-names = "rx"; ++ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + }; + + aes: aes@53501000 { +@@ -417,6 +618,9 @@ + ti,hwmods = "aes"; + reg = <0x53501000 0xa0>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; ++ dmas = <&edma 6 ++ &edma 5>; ++ dma-names = "tx", "rx"; + }; + + des: des@53701000 { +@@ -424,6 +628,10 @@ + ti,hwmods = "des"; + reg = <0x53701000 0xa0>; + interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; ++ dmas = <&edma 34 ++ &edma 33>; ++ dma-names = "tx", "rx"; + }; ++ + }; + }; diff --git a/patches/linux-3.12/0267-ARM-dts-AM4372-Update-Support-for-EPOS-EVM.patch b/patches/linux-3.12/0267-ARM-dts-AM4372-Update-Support-for-EPOS-EVM.patch new file mode 100644 index 0000000..59b5745 --- /dev/null +++ b/patches/linux-3.12/0267-ARM-dts-AM4372-Update-Support-for-EPOS-EVM.patch @@ -0,0 +1,236 @@ +From: Mugunthan V N <mugunthanvnm@ti.com> +Date: Fri, 11 Oct 2013 00:44:54 +0530 +Subject: [PATCH] ARM: dts: AM4372: Update Support for EPOS EVM + +-> Adding pinmux for cpsw, i2c0. +-> Enabling the modules that are present in AM4372 EPOS EVM +These modules are tested on AM4372 EPOS EVM. + +Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> +Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> +Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am43x-epos-evm.dts | 168 +++++++++++++++++++++++++++++++++++ + include/dt-bindings/pinctrl/am43xx.h | 31 +++++++ + 2 files changed, 199 insertions(+) + create mode 100644 include/dt-bindings/pinctrl/am43xx.h + +diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts +index 74174d4..fbf9c4c 100644 +--- a/arch/arm/boot/dts/am43x-epos-evm.dts ++++ b/arch/arm/boot/dts/am43x-epos-evm.dts +@@ -11,8 +11,176 @@ + /dts-v1/; + + #include "am4372.dtsi" ++#include <dt-bindings/pinctrl/am43xx.h> ++#include <dt-bindings/gpio/gpio.h> + + / { + model = "TI AM43x EPOS EVM"; + compatible = "ti,am43x-epos-evm","ti,am4372","ti,am43"; ++ ++ vmmcsd_fixed: fixedregulator-sd { ++ compatible = "regulator-fixed"; ++ regulator-name = "vmmcsd_fixed"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ enable-active-high; ++ }; ++ ++ am43xx_pinmux: pinmux@44e10800 { ++ cpsw_default: cpsw_default { ++ pinctrl-single,pins = < ++ /* Slave 1 */ ++ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */ ++ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ ++ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */ ++ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxdv.rmii1_rxdv */ ++ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ ++ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ ++ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ ++ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ ++ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */ ++ >; ++ }; ++ ++ cpsw_sleep: cpsw_sleep { ++ pinctrl-single,pins = < ++ /* Slave 1 reset value */ ++ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ >; ++ }; ++ ++ davinci_mdio_default: davinci_mdio_default { ++ pinctrl-single,pins = < ++ /* MDIO */ ++ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ ++ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ ++ >; ++ }; ++ ++ davinci_mdio_sleep: davinci_mdio_sleep { ++ pinctrl-single,pins = < ++ /* MDIO reset value */ ++ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) ++ >; ++ }; ++ ++ i2c0_pins: pinmux_i2c0_pins { ++ pinctrl-single,pins = < ++ 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ ++ 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ ++ >; ++ }; ++ }; ++ ++ matrix_keypad: matrix_keypad@0 { ++ compatible = "gpio-matrix-keypad"; ++ debounce-delay-ms = <5>; ++ col-scan-delay-us = <2>; ++ ++ row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */ ++ &gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */ ++ &gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */ ++ &gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */ ++ ++ col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH /* Bank3, pin9 */ ++ &gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 */ ++ &gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */ ++ &gpio2 19 GPIO_ACTIVE_HIGH>; /* Bank2, pin19 */ ++ ++ linux,keymap = <0x00000201 /* P1 */ ++ 0x01000204 /* P4 */ ++ 0x02000207 /* P7 */ ++ 0x0300020a /* NUMERIC_STAR */ ++ 0x00010202 /* P2 */ ++ 0x01010205 /* P5 */ ++ 0x02010208 /* P8 */ ++ 0x03010200 /* P0 */ ++ 0x00020203 /* P3 */ ++ 0x01020206 /* P6 */ ++ 0x02020209 /* P9 */ ++ 0x0302020b /* NUMERIC_POUND */ ++ 0x00030067 /* UP */ ++ 0x0103006a /* RIGHT */ ++ 0x0203006c /* DOWN */ ++ 0x03030069>; /* LEFT */ ++ }; ++}; ++ ++&mmc1 { ++ status = "okay"; ++ vmmc-supply = <&vmmcsd_fixed>; ++ bus-width = <4>; ++}; ++ ++&mac { ++ pinctrl-names = "default", "sleep"; ++ pinctrl-0 = <&cpsw_default>; ++ pinctrl-1 = <&cpsw_sleep>; ++ status = "okay"; ++}; ++ ++&davinci_mdio { ++ pinctrl-names = "default", "sleep"; ++ pinctrl-0 = <&davinci_mdio_default>; ++ pinctrl-1 = <&davinci_mdio_sleep>; ++ status = "okay"; ++}; ++ ++&cpsw_emac0 { ++ phy_id = <&davinci_mdio>, <16>; ++ phy-mode = "rmii"; ++}; ++ ++&cpsw_emac1 { ++ phy_id = <&davinci_mdio>, <1>; ++ phy-mode = "rmii"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ ++ at24@50 { ++ compatible = "at24,24c256"; ++ pagesize = <64>; ++ reg = <0x50>; ++ }; ++ ++ pixcir_ts@5c { ++ compatible = "pixcir,pixcir_ts"; ++ reg = <0x5c>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <17 0>; ++ ++ attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>; ++ ++ x-size = <1024>; ++ y-size = <768>; ++ }; ++}; ++ ++&gpio0 { ++ status = "okay"; ++}; ++ ++&gpio1 { ++ status = "okay"; ++}; ++ ++&gpio2 { ++ status = "okay"; ++}; ++ ++&gpio3 { ++ status = "okay"; + }; +diff --git a/include/dt-bindings/pinctrl/am43xx.h b/include/dt-bindings/pinctrl/am43xx.h +new file mode 100644 +index 0000000..eb6c366a +--- /dev/null ++++ b/include/dt-bindings/pinctrl/am43xx.h +@@ -0,0 +1,31 @@ ++/* ++ * This header provides constants specific to AM43XX pinctrl bindings. ++ */ ++ ++#ifndef _DT_BINDINGS_PINCTRL_AM43XX_H ++#define _DT_BINDINGS_PINCTRL_AM43XX_H ++ ++#define MUX_MODE0 0 ++#define MUX_MODE1 1 ++#define MUX_MODE2 2 ++#define MUX_MODE3 3 ++#define MUX_MODE4 4 ++#define MUX_MODE5 5 ++#define MUX_MODE6 6 ++#define MUX_MODE7 7 ++ ++#define PULL_DISABLE (1 << 16) ++#define PULL_UP (1 << 17) ++#define INPUT_EN (1 << 18) ++#define SLEWCTRL_FAST (1 << 19) ++#define DS0_PULL_UP_DOWN_EN (1 << 27) ++ ++#define PIN_OUTPUT (PULL_DISABLE) ++#define PIN_OUTPUT_PULLUP (PULL_UP) ++#define PIN_OUTPUT_PULLDOWN 0 ++#define PIN_INPUT (INPUT_EN | PULL_DISABLE) ++#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) ++#define PIN_INPUT_PULLDOWN (INPUT_EN) ++ ++#endif ++ diff --git a/patches/linux-3.12/0268-ARM-dts-AM33XX-Add-mcasp0-and-mcasp1-device-tree-ent.patch b/patches/linux-3.12/0268-ARM-dts-AM33XX-Add-mcasp0-and-mcasp1-device-tree-ent.patch new file mode 100644 index 0000000..beed124 --- /dev/null +++ b/patches/linux-3.12/0268-ARM-dts-AM33XX-Add-mcasp0-and-mcasp1-device-tree-ent.patch @@ -0,0 +1,48 @@ +From: Pantelis Antoniou <panto@antoniou-consulting.com> +Date: Sun, 20 Oct 2013 20:04:08 +0300 +Subject: [PATCH] ARM: dts: AM33XX: Add mcasp0 and mcasp1 device tree entries + +Add missing mcasp entries in the am33xx.dtsi include file. + +Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> +Signed-off-by: Darren Etheridge <detheridge@ti.com> +Signed-off-by: Jyri Sarha <jsarha@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am33xx.dtsi | 24 ++++++++++++++++++++++++ + 1 file changed, 24 insertions(+) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index 7947bfb..b3a665e 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -742,5 +742,29 @@ + <&edma 5>; + dma-names = "tx", "rx"; + }; ++ ++ mcasp0: mcasp@48038000 { ++ compatible = "ti,am33xx-mcasp-audio"; ++ ti,hwmods = "mcasp0"; ++ reg = <0x48038000 0x2000>; ++ interrupts = <80>, <81>; ++ interrupts-names = "tx", "rx"; ++ status = "disabled"; ++ dmas = <&edma 8>, ++ <&edma 9>; ++ dma-names = "tx", "rx"; ++ }; ++ ++ mcasp1: mcasp@4803C000 { ++ compatible = "ti,am33xx-mcasp-audio"; ++ ti,hwmods = "mcasp1"; ++ reg = <0x4803C000 0x2000>; ++ interrupts = <82>, <83>; ++ interrupts-names = "tx", "rx"; ++ status = "disabled"; ++ dmas = <&edma 10>, ++ <&edma 11>; ++ dma-names = "tx", "rx"; ++ }; + }; + }; diff --git a/patches/linux-3.12/0269-ARM-dts-AM33XX-mcasp-Add-location-for-data-port-regi.patch b/patches/linux-3.12/0269-ARM-dts-AM33XX-mcasp-Add-location-for-data-port-regi.patch new file mode 100644 index 0000000..396a8f3 --- /dev/null +++ b/patches/linux-3.12/0269-ARM-dts-AM33XX-mcasp-Add-location-for-data-port-regi.patch @@ -0,0 +1,44 @@ +From: Jyri Sarha <jsarha@ti.com> +Date: Sun, 20 Oct 2013 20:04:09 +0300 +Subject: [PATCH] ARM: dts: AM33XX: mcasp: Add location for data port registers + to reg-property + +This patch adds a second tuple to reg property. The new property tuple +describes the memory location for data port registers mapped trough +L3 bus on am33xx. The both property tuples are named accordingly in +the reg-names property. + +Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> +Signed-off-by: Darren Etheridge <detheridge@ti.com> +Signed-off-by: Jyri Sarha <jsarha@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am33xx.dtsi | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index b3a665e..c131638 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -746,7 +746,9 @@ + mcasp0: mcasp@48038000 { + compatible = "ti,am33xx-mcasp-audio"; + ti,hwmods = "mcasp0"; +- reg = <0x48038000 0x2000>; ++ reg = <0x48038000 0x2000>, ++ <0x46000000 0x400000>; ++ reg-names = "mpu", "dat"; + interrupts = <80>, <81>; + interrupts-names = "tx", "rx"; + status = "disabled"; +@@ -758,7 +760,9 @@ + mcasp1: mcasp@4803C000 { + compatible = "ti,am33xx-mcasp-audio"; + ti,hwmods = "mcasp1"; +- reg = <0x4803C000 0x2000>; ++ reg = <0x4803C000 0x2000>, ++ <0x46400000 0x400000>; ++ reg-names = "mpu", "dat"; + interrupts = <82>, <83>; + interrupts-names = "tx", "rx"; + status = "disabled"; diff --git a/patches/linux-3.12/0270-ARM-dts-am335x-evm-Add-audio-support-for-am335x-evm..patch b/patches/linux-3.12/0270-ARM-dts-am335x-evm-Add-audio-support-for-am335x-evm..patch new file mode 100644 index 0000000..fdb9cbd --- /dev/null +++ b/patches/linux-3.12/0270-ARM-dts-am335x-evm-Add-audio-support-for-am335x-evm..patch @@ -0,0 +1,96 @@ +From: Darren Etheridge <detheridge@ti.com> +Date: Sun, 20 Oct 2013 20:04:10 +0300 +Subject: [PATCH] ARM: dts: am335x-evm: Add audio support for am335x-evm.dts + +Adds sound, tlv320aic3106, mcasp1, and am335x_evm_audio_pin nodes. + +Signed-off-by: Darren Etheridge <detheridge@ti.com> +Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> +Signed-off-by: Jyri Sarha <jsarha@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-evm.dts | 50 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 50 insertions(+) + +diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts +index eabacf9..9874294 100644 +--- a/arch/arm/boot/dts/am335x-evm.dts ++++ b/arch/arm/boot/dts/am335x-evm.dts +@@ -119,6 +119,19 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "ti,da830-evm-audio"; ++ ti,model = "AM335x-EVM"; ++ ti,audio-codec = <&tlv320aic3106>; ++ ti,mcasp-controller = <&mcasp1>; ++ ti,codec-clock-rate = <12000000>; ++ ti,audio-routing = ++ "Headphone Jack", "HPLOUT", ++ "Headphone Jack", "HPROUT", ++ "LINE1L", "Line In", ++ "LINE1R", "Line In"; ++ }; + }; + + &am33xx_pinmux { +@@ -279,6 +292,15 @@ + 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */ + >; + }; ++ ++ am335x_evm_audio_pins: am335x_evm_audio_pins { ++ pinctrl-single,pins = < ++ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */ ++ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */ ++ 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ ++ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ ++ >; ++ }; + }; + + &uart0 { +@@ -373,6 +395,18 @@ + compatible = "ti,tmp275"; + reg = <0x48>; + }; ++ ++ tlv320aic3106: tlv320aic3106@1b { ++ compatible = "ti,tlv320aic3106"; ++ reg = <0x1b>; ++ status = "okay"; ++ ++ /* Regulators */ ++ AVDD-supply = <&vaux2_reg>; ++ IOVDD-supply = <&vaux2_reg>; ++ DRVDD-supply = <&vaux2_reg>; ++ DVDD-supply = <&vbat>; ++ }; + }; + + &lcdc { +@@ -476,6 +510,22 @@ + + #include "tps65910.dtsi" + ++&mcasp1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&am335x_evm_audio_pins>; ++ ++ status = "okay"; ++ ++ op-mode = <0>; /* MCASP_IIS_MODE */ ++ tdm-slots = <2>; ++ /* 4 serializers */ ++ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ ++ 0 0 1 2 ++ >; ++ tx-num-evt = <1>; ++ rx-num-evt = <1>; ++}; ++ + &tps { + vcc1-supply = <&vbat>; + vcc2-supply = <&vbat>; diff --git a/patches/linux-3.12/0271-ARM-dts-am335x-evmsk-Audio-support.patch b/patches/linux-3.12/0271-ARM-dts-am335x-evmsk-Audio-support.patch new file mode 100644 index 0000000..4ffc979 --- /dev/null +++ b/patches/linux-3.12/0271-ARM-dts-am335x-evmsk-Audio-support.patch @@ -0,0 +1,95 @@ +From: Peter Ujfalusi <peter.ujfalusi@ti.com> +Date: Sun, 20 Oct 2013 20:04:11 +0300 +Subject: [PATCH] ARM: dts: am335x-evmsk: Audio support + +AM335x EVM-SK have only support for audio playback (stereo jack on the +board) via tlv320aic3106 codec connected to McASP1. +Enable the support for audio playback on the board: +- McASP1 configuration +- tlv320aic3106 configuration +- Machine driver. + +Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> +Signed-off-by: Jyri Sarha <jsarha@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-evmsk.dts | 48 ++++++++++++++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts +index 1a7e0d9..03febf8 100644 +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -115,6 +115,17 @@ + brightness-levels = <0 58 61 66 75 90 125 170 255>; + default-brightness-level = <8>; + }; ++ ++ sound { ++ compatible = "ti,da830-evm-audio"; ++ ti,model = "AM335x-EVMSK"; ++ ti,audio-codec = <&tlv320aic3106>; ++ ti,mcasp-controller = <&mcasp1>; ++ ti,codec-clock-rate = <24576000>; ++ ti,audio-routing = ++ "Headphone Jack", "HPLOUT", ++ "Headphone Jack", "HPROUT"; ++ }; + }; + + &am33xx_pinmux { +@@ -244,6 +255,15 @@ + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; ++ ++ mcasp1_pins: mcasp1_pins { ++ pinctrl-single,pins = < ++ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ ++ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ ++ 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ ++ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ ++ >; ++ }; + }; + + &uart0 { +@@ -291,6 +311,18 @@ + st,max-limit-y = <550>; + st,max-limit-z = <750>; + }; ++ ++ tlv320aic3106: tlv320aic3106@1b { ++ compatible = "ti,tlv320aic3106"; ++ reg = <0x1b>; ++ status = "okay"; ++ ++ /* Regulators */ ++ AVDD-supply = <&vaux2_reg>; ++ IOVDD-supply = <&vaux2_reg>; ++ DRVDD-supply = <&vaux2_reg>; ++ DVDD-supply = <&vbat>; ++ }; + }; + + &usb { +@@ -437,3 +469,19 @@ + &gpio0 { + ti,no-reset-on-init; + }; ++ ++&mcasp1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcasp1_pins>; ++ ++ status = "okay"; ++ ++ op-mode = <0>; /* MCASP_IIS_MODE */ ++ tdm-slots = <2>; ++ /* 4 serializers */ ++ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ ++ 0 0 1 2 ++ >; ++ tx-num-evt = <1>; ++ rx-num-evt = <1>; ++}; diff --git a/patches/linux-3.12/0272-ARM-dts-omap3-beagle-Adapt-USB-OTG-to-generic-PHY-fr.patch b/patches/linux-3.12/0272-ARM-dts-omap3-beagle-Adapt-USB-OTG-to-generic-PHY-fr.patch new file mode 100644 index 0000000..bc09821 --- /dev/null +++ b/patches/linux-3.12/0272-ARM-dts-omap3-beagle-Adapt-USB-OTG-to-generic-PHY-fr.patch @@ -0,0 +1,33 @@ +From: Roger Quadros <rogerq@ti.com> +Date: Mon, 7 Oct 2013 13:46:50 +0300 +Subject: [PATCH] ARM: dts: omap3-beagle: Adapt USB OTG to generic PHY + framework + +The generic PHY framewrok expects different properties than the +old USB PHY framework. Supply those properties. + +Fixes USB OTG port on beagle after the Generic PHY framework was +merged in greg/usb-next. [1] + +[1] - https://lkml.org/lkml/2013/9/27/581 + +Signed-off-by: Roger Quadros <rogerq@ti.com> +Acked-by: Felipe Balbi <balbi@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-beagle.dts | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts +index 7669c16..fa532aa 100644 +--- a/arch/arm/boot/dts/omap3-beagle.dts ++++ b/arch/arm/boot/dts/omap3-beagle.dts +@@ -173,6 +173,8 @@ + &usb_otg_hs { + interface-type = <0>; + usb-phy = <&usb2_phy>; ++ phys = <&usb2_phy>; ++ phy-names = "usb2-phy"; + mode = <3>; + power = <50>; + }; diff --git a/patches/linux-3.12/0273-ARM-dts-AM4372-Add-McASP-nodes.patch b/patches/linux-3.12/0273-ARM-dts-AM4372-Add-McASP-nodes.patch new file mode 100644 index 0000000..0a6032a --- /dev/null +++ b/patches/linux-3.12/0273-ARM-dts-AM4372-Add-McASP-nodes.patch @@ -0,0 +1,49 @@ +From: Peter Ujfalusi <peter.ujfalusi@ti.com> +Date: Mon, 21 Oct 2013 12:45:58 +0300 +Subject: [PATCH] ARM: dts: AM4372: Add McASP nodes + +Add nodes for McASP0 and McASP1 for AM43xx. + +Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am4372.dtsi | 27 +++++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi +index c328d5c..defaad1 100644 +--- a/arch/arm/boot/dts/am4372.dtsi ++++ b/arch/arm/boot/dts/am4372.dtsi +@@ -633,5 +633,32 @@ + dma-names = "tx", "rx"; + }; + ++ mcasp0: mcasp@48038000 { ++ compatible = "ti,am33xx-mcasp-audio"; ++ ti,hwmods = "mcasp0"; ++ reg = <0x48038000 0x2000>, ++ <0x46000000 0x400000>; ++ reg-names = "mpu", "dat"; ++ interrupts = <80>, <81>; ++ interrupts-names = "tx", "rx"; ++ status = "disabled"; ++ dmas = <&edma 8>, ++ <&edma 9>; ++ dma-names = "tx", "rx"; ++ }; ++ ++ mcasp1: mcasp@4803C000 { ++ compatible = "ti,am33xx-mcasp-audio"; ++ ti,hwmods = "mcasp1"; ++ reg = <0x4803C000 0x2000>, ++ <0x46400000 0x400000>; ++ reg-names = "mpu", "dat"; ++ interrupts = <82>, <83>; ++ interrupts-names = "tx", "rx"; ++ status = "disabled"; ++ dmas = <&edma 10>, ++ <&edma 11>; ++ dma-names = "tx", "rx"; ++ }; + }; + }; diff --git a/patches/linux-3.12/0274-ARM-dts-igep0033-Add-mmc1-node-for-SDCARD-support.patch b/patches/linux-3.12/0274-ARM-dts-igep0033-Add-mmc1-node-for-SDCARD-support.patch new file mode 100644 index 0000000..47a6b49 --- /dev/null +++ b/patches/linux-3.12/0274-ARM-dts-igep0033-Add-mmc1-node-for-SDCARD-support.patch @@ -0,0 +1,43 @@ +From: Enric Balletbo i Serra <eballetbo@gmail.com> +Date: Sat, 19 Oct 2013 22:55:19 +0200 +Subject: [PATCH] ARM: dts: igep0033: Add mmc1 node for SDCARD support. + +Add mmc1 dt node to IGEP COM AQUILA board. + +Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am335x-igep0033.dtsi | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi +index 06eba07..6196244 100644 +--- a/arch/arm/boot/dts/am335x-igep0033.dtsi ++++ b/arch/arm/boot/dts/am335x-igep0033.dtsi +@@ -44,6 +44,13 @@ + regulator-max-microvolt = <5000000>; + regulator-boot-on; + }; ++ ++ vmmc: fixedregulator@0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vmmc"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; + }; + + &am33xx_pinmux { +@@ -180,6 +187,12 @@ + }; + }; + ++&mmc1 { ++ status = "okay"; ++ vmmc-supply = <&vmmc>; ++ bus-width = <4>; ++}; ++ + &uart0 { + status = "okay"; + pinctrl-names = "default"; diff --git a/patches/linux-3.12/0275-ARM-dts-OMAP3-Add-i2c-aliases.patch b/patches/linux-3.12/0275-ARM-dts-OMAP3-Add-i2c-aliases.patch new file mode 100644 index 0000000..687676b --- /dev/null +++ b/patches/linux-3.12/0275-ARM-dts-OMAP3-Add-i2c-aliases.patch @@ -0,0 +1,83 @@ +From: Nishanth Menon <nm@ti.com> +Date: Wed, 16 Oct 2013 15:21:03 -0500 +Subject: [PATCH] ARM: dts: OMAP3+: Add i2c aliases + +Currently, on OMAP5, i2c1 and i2c5 defer probe due to pinctrl +dependencies. This changes the i2c ID each bus is registered with in +i2c-dev interface. As a result of this, many userspace tools break and +there is no consistent manner to fix the same if the i2c dev interface +have no consistent numbering. + +Since this could happen for other OMAP derivatives, provide i2c alias +for all OMAP3+ SoCs to allow ordering the i2c devices correctly. + +Signed-off-by: Nishanth Menon <nm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/dra7.dtsi | 5 +++++ + arch/arm/boot/dts/omap3.dtsi | 3 +++ + arch/arm/boot/dts/omap4.dtsi | 4 ++++ + arch/arm/boot/dts/omap5.dtsi | 5 +++++ + 4 files changed, 17 insertions(+) + +diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi +index c01ef76..98ff655 100644 +--- a/arch/arm/boot/dts/dra7.dtsi ++++ b/arch/arm/boot/dts/dra7.dtsi +@@ -20,6 +20,11 @@ + interrupt-parent = <&gic>; + + aliases { ++ i2c0 = &i2c1; ++ i2c1 = &i2c2; ++ i2c2 = &i2c3; ++ i2c3 = &i2c4; ++ i2c4 = &i2c5; + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; +diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi +index b87d6d3..4fd4229 100644 +--- a/arch/arm/boot/dts/omap3.dtsi ++++ b/arch/arm/boot/dts/omap3.dtsi +@@ -19,6 +19,9 @@ + interrupt-parent = <&intc>; + + aliases { ++ i2c0 = &i2c1; ++ i2c1 = &i2c2; ++ i2c2 = &i2c3; + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; +diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi +index 6ca45b0..0d8fdba 100644 +--- a/arch/arm/boot/dts/omap4.dtsi ++++ b/arch/arm/boot/dts/omap4.dtsi +@@ -17,6 +17,10 @@ + interrupt-parent = <&gic>; + + aliases { ++ i2c0 = &i2c1; ++ i2c1 = &i2c2; ++ i2c2 = &i2c3; ++ i2c3 = &i2c4; + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; +diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi +index 53686e4..2cb72ba 100644 +--- a/arch/arm/boot/dts/omap5.dtsi ++++ b/arch/arm/boot/dts/omap5.dtsi +@@ -21,6 +21,11 @@ + interrupt-parent = <&gic>; + + aliases { ++ i2c0 = &i2c1; ++ i2c1 = &i2c2; ++ i2c2 = &i2c3; ++ i2c3 = &i2c4; ++ i2c4 = &i2c5; + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; diff --git a/patches/linux-3.12/0276-ARM-dts-AM33xx-Add-i2c-aliases.patch b/patches/linux-3.12/0276-ARM-dts-AM33xx-Add-i2c-aliases.patch new file mode 100644 index 0000000..02f8860 --- /dev/null +++ b/patches/linux-3.12/0276-ARM-dts-AM33xx-Add-i2c-aliases.patch @@ -0,0 +1,41 @@ +From: Nishanth Menon <nm@ti.com> +Date: Wed, 16 Oct 2013 15:21:04 -0500 +Subject: [PATCH] ARM: dts: AM33xx+: Add i2c aliases + +Provide alias to allow ordering the i2c devices correctly. + +Signed-off-by: Nishanth Menon <nm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/am33xx.dtsi | 3 +++ + arch/arm/boot/dts/am4372.dtsi | 3 +++ + 2 files changed, 6 insertions(+) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index c131638..0ca13ad 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -18,6 +18,9 @@ + interrupt-parent = <&intc>; + + aliases { ++ i2c0 = &i2c0; ++ i2c1 = &i2c1; ++ i2c2 = &i2c2; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; +diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi +index defaad1..974d103 100644 +--- a/arch/arm/boot/dts/am4372.dtsi ++++ b/arch/arm/boot/dts/am4372.dtsi +@@ -18,6 +18,9 @@ + + + aliases { ++ i2c0 = &i2c0; ++ i2c1 = &i2c1; ++ i2c2 = &i2c2; + serial0 = &uart0; + ethernet0 = &cpsw_emac0; + ethernet1 = &cpsw_emac1; diff --git a/patches/linux-3.12/0277-ARM-dts-Add-support-for-Newflow-NanoBone-board.patch b/patches/linux-3.12/0277-ARM-dts-Add-support-for-Newflow-NanoBone-board.patch new file mode 100644 index 0000000..2541afd --- /dev/null +++ b/patches/linux-3.12/0277-ARM-dts-Add-support-for-Newflow-NanoBone-board.patch @@ -0,0 +1,506 @@ +From: Mark Jackson <mpfj-list@newflow.co.uk> +Date: Fri, 4 Oct 2013 09:15:01 +0100 +Subject: [PATCH] ARM: dts: Add support for Newflow NanoBone board + +NanoBone Specification: +----------------------- +CPU: + TI AM335x + +Memory: + 256MB DDR3 + 128MB NOR flash + 128KB FRAM + +Ethernet: + 2 x 10/100 connected to SMSC LAN8710 PHY + +USB: + 1 x USB2.0 Type A + +I2C: + 2Kbit EEPROM (Microchip 24AA02) + RTC (Maxim DS1338) + GPIO Expander (Microchip MCP23017) + +Expansion connector: + 6 x UART + 1 x MMC/SD + 1 x USB2.0 + +Signed-off-by: Mark Jackson <mpfj@newflow.co.uk> +Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + MAINTAINERS | 6 + + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/am335x-nano.dts | 431 ++++++++++++++++++++++++++++++++++++++ + 3 files changed, 438 insertions(+) + create mode 100644 arch/arm/boot/dts/am335x-nano.dts + +diff --git a/MAINTAINERS b/MAINTAINERS +index ffcaf97..856030d 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -6109,6 +6109,12 @@ L: linux-omap@vger.kernel.org + S: Maintained + F: drivers/gpio/gpio-omap.c + ++OMAP/NEWFLOW NANOBONE MACHINE SUPPORT ++M: Mark Jackson <mpfj@newflow.co.uk> ++L: linux-omap@vger.kernel.org ++S: Maintained ++F: arch/arm/boot/dts/am335x-nano.dts ++ + OMFS FILESYSTEM + M: Bob Copeland <me@bobcopeland.com> + L: linux-karma-devel@lists.sourceforge.net +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 9df7d2c..37c6ec9 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ + am335x-evmsk.dtb \ + am335x-bone.dtb \ + am335x-boneblack.dtb \ ++ am335x-nano.dtb \ + am335x-base0033.dtb \ + am3517-evm.dtb \ + am3517_mt_ventoux.dtb \ +diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts +new file mode 100644 +index 0000000..9907b49 +--- /dev/null ++++ b/arch/arm/boot/dts/am335x-nano.dts +@@ -0,0 +1,431 @@ ++/* ++ * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++/dts-v1/; ++ ++#include "am33xx.dtsi" ++ ++/ { ++ model = "Newflow AM335x NanoBone"; ++ compatible = "ti,am33xx"; ++ ++ cpus { ++ cpu@0 { ++ cpu0-supply = <&dcdc2_reg>; ++ }; ++ }; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x80000000 0x10000000>; /* 256 MB */ ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led@0 { ++ label = "nanobone:green:usr1"; ++ gpios = <&gpio1 5 0>; ++ default-state = "off"; ++ }; ++ }; ++}; ++ ++&am33xx_pinmux { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&misc_pins>; ++ ++ misc_pins: misc_pins { ++ pinctrl-single,pins = < ++ 0x15c (PIN_OUTPUT | MUX_MODE7) /* spi0_cs0.gpio0_5 */ ++ >; ++ }; ++ ++ gpmc_pins: gpmc_pins { ++ pinctrl-single,pins = < ++ 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ ++ 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ ++ 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ ++ 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ ++ 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ ++ 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ ++ 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ ++ 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ ++ 0x20 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */ ++ 0x24 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */ ++ 0x28 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */ ++ 0x2c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */ ++ 0x30 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */ ++ 0x34 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */ ++ 0x38 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */ ++ 0x3c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */ ++ ++ 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ ++ 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ ++ 0x80 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */ ++ 0x84 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn2.gpmc_csn2 */ ++ 0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn3.gpmc_csn3 */ ++ ++ 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ ++ 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ ++ 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ ++ 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0_cle.gpmc_ben0_cle */ ++ ++ 0xa4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data1.gpmc_a1 */ ++ 0xa8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data2.gpmc_a2 */ ++ 0xac (PIN_OUTPUT | MUX_MODE1) /* lcd_data3.gpmc_a3 */ ++ 0xb0 (PIN_OUTPUT | MUX_MODE1) /* lcd_data4.gpmc_a4 */ ++ 0xb4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data5.gpmc_a5 */ ++ 0xb8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data6.gpmc_a6 */ ++ 0xbc (PIN_OUTPUT | MUX_MODE1) /* lcd_data7.gpmc_a7 */ ++ ++ 0xe0 (PIN_OUTPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8 */ ++ 0xe4 (PIN_OUTPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9 */ ++ 0xe8 (PIN_OUTPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10 */ ++ >; ++ }; ++ ++ i2c0_pins: i2c0_pins { ++ pinctrl-single,pins = < ++ 0x188 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_sda.i2c0_sda */ ++ 0x18c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_scl.i2c0_scl */ ++ >; ++ }; ++ ++ uart0_pins: uart0_pins { ++ pinctrl-single,pins = < ++ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ ++ 0x174 (PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */ ++ >; ++ }; ++ ++ uart1_pins: uart1_pins { ++ pinctrl-single,pins = < ++ 0x178 (PIN_OUTPUT | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */ ++ 0x17c (PIN_OUTPUT | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */ ++ 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ ++ 0x184 (PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */ ++ >; ++ }; ++ ++ uart2_pins: uart2_pins { ++ pinctrl-single,pins = < ++ 0xc0 (PIN_INPUT_PULLUP | MUX_MODE7) /* lcd_data8.gpio2[14] */ ++ 0xc4 (PIN_OUTPUT | MUX_MODE7) /* lcd_data9.gpio2[15] */ ++ 0x150 (PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */ ++ 0x154 (PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */ ++ >; ++ }; ++ ++ uart3_pins: uart3_pins { ++ pinctrl-single,pins = < ++ 0xc8 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data10.uart3_ctsn */ ++ 0xcc (PIN_OUTPUT | MUX_MODE6) /* lcd_data11.uart3_rtsn */ ++ 0x160 (PIN_INPUT | MUX_MODE1) /* spi0_cs1.uart3_rxd */ ++ 0x164 (PIN_OUTPUT | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */ ++ >; ++ }; ++ ++ uart4_pins: uart4_pins { ++ pinctrl-single,pins = < ++ 0xd0 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data12.uart4_ctsn */ ++ 0xd4 (PIN_OUTPUT | MUX_MODE6) /* lcd_data13.uart4_rtsn */ ++ 0x168 (PIN_INPUT | MUX_MODE1) /* uart0_ctsn.uart4_rxd */ ++ 0x16c (PIN_OUTPUT | MUX_MODE1) /* uart0_rtsn.uart4_txd */ ++ >; ++ }; ++ ++ uart5_pins: uart5_pins { ++ pinctrl-single,pins = < ++ 0xd8 (PIN_INPUT | MUX_MODE4) /* lcd_data14.uart5_rxd */ ++ 0x144 (PIN_OUTPUT | MUX_MODE3) /* rmiii1_refclk.uart5_txd */ ++ >; ++ }; ++ ++ mmc1_pins: mmc1_pins { ++ pinctrl-single,pins = < ++ 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ ++ 0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ ++ 0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ ++ 0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ ++ 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ ++ 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ ++ 0x1e8 (PIN_INPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */ ++ 0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18] */ ++ >; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++ status = "okay"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++ status = "okay"; ++ rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>; ++ rs485-rts-active-high; ++ rs485-rx-during-tx; ++ rs485-rts-delay = <1 1>; ++ linux,rs485-enabled-at-boot-time; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2_pins>; ++ status = "okay"; ++ rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>; ++ rs485-rts-active-high; ++ rs485-rts-delay = <1 1>; ++ linux,rs485-enabled-at-boot-time; ++}; ++ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; ++ status = "okay"; ++}; ++ ++&uart4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart4_pins>; ++ status = "okay"; ++}; ++ ++&uart5 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart5_pins>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ clock-frequency = <400000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ ++ gpio@20 { ++ compatible = "mcp,mcp23017"; ++ reg = <0x20>; ++ }; ++ ++ tps: tps@24 { ++ reg = <0x24>; ++ }; ++ ++ eeprom@53 { ++ compatible = "mcp,24c02"; ++ reg = <0x53>; ++ pagesize = <8>; ++ }; ++ ++ rtc@68 { ++ compatible = "dallas,ds1307"; ++ reg = <0x68>; ++ }; ++}; ++ ++&elm { ++ status = "okay"; ++}; ++ ++&gpmc { ++ compatible = "ti,am3352-gpmc"; ++ ti,hwmods = "gpmc"; ++ status = "okay"; ++ gpmc,num-waitpins = <2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gpmc_pins>; ++ ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ranges = <0 0 0x08000000 0x08000000>; /* CS0: NOR 128M */ ++ ++ nor@0,0 { ++ reg = <0 0x00000000 0x08000000>; ++ compatible = "cfi-flash"; ++ linux,mtd-name = "spansion,s29gl010p11t"; ++ bank-width = <2>; ++ ++ gpmc,mux-add-data = <2>; ++ ++ gpmc,sync-clk-ps = <0>; ++ gpmc,cs-on-ns = <0>; ++ gpmc,cs-rd-off-ns = <160>; ++ gpmc,cs-wr-off-ns = <160>; ++ gpmc,adv-on-ns = <10>; ++ gpmc,adv-rd-off-ns = <30>; ++ gpmc,adv-wr-off-ns = <30>; ++ gpmc,oe-on-ns = <40>; ++ gpmc,oe-off-ns = <160>; ++ gpmc,we-on-ns = <40>; ++ gpmc,we-off-ns = <160>; ++ gpmc,rd-cycle-ns = <160>; ++ gpmc,wr-cycle-ns = <160>; ++ gpmc,access-ns = <150>; ++ gpmc,page-burst-access-ns = <10>; ++ gpmc,cycle2cycle-samecsen; ++ gpmc,cycle2cycle-delay-ns = <20>; ++ gpmc,wr-data-mux-bus-ns = <70>; ++ gpmc,wr-access-ns = <80>; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ /* ++ MTD partition table ++ =================== ++ +------------+-->0x00000000-> U-Boot start ++ | | ++ | |-->0x000BFFFF-> U-Boot end ++ | |-->0x000C0000-> ENV1 start ++ | | ++ | |-->0x000DFFFF-> ENV1 end ++ | |-->0x000E0000-> ENV2 start ++ | | ++ | |-->0x000FFFFF-> ENV2 end ++ | |-->0x00100000-> Kernel start ++ | | ++ | |-->0x004FFFFF-> Kernel end ++ | |-->0x00500000-> File system start ++ | | ++ | |-->0x014FFFFF-> File system end ++ | |-->0x01500000-> User data start ++ | | ++ | |-->0x03FFFFFF-> User data end ++ | |-->0x04000000-> Data storage start ++ | | ++ +------------+-->0x08000000-> NOR end (Free end) ++ */ ++ partition@0 { ++ label = "boot"; ++ reg = <0x00000000 0x000c0000>; /* 768KB */ ++ }; ++ ++ partition@1 { ++ label = "env1"; ++ reg = <0x000c0000 0x00020000>; /* 128KB */ ++ }; ++ ++ partition@2 { ++ label = "env2"; ++ reg = <0x000e0000 0x00020000>; /* 128KB */ ++ }; ++ ++ partition@3 { ++ label = "kernel"; ++ reg = <0x00100000 0x00400000>; /* 4MB */ ++ }; ++ ++ partition@4 { ++ label = "rootfs"; ++ reg = <0x00500000 0x01000000>; /* 16MB */ ++ }; ++ ++ partition@5 { ++ label = "user"; ++ reg = <0x01500000 0x02b00000>; /* 43MB */ ++ }; ++ ++ partition@6 { ++ label = "data"; ++ reg = <0x04000000 0x04000000>; /* 64MB */ ++ }; ++ }; ++}; ++ ++&mac { ++ dual_emac = <1>; ++}; ++ ++&cpsw_emac0 { ++ phy_id = <&davinci_mdio>, <0>; ++ dual_emac_res_vlan = <1>; ++}; ++ ++&cpsw_emac1 { ++ phy_id = <&davinci_mdio>, <1>; ++ dual_emac_res_vlan = <2>; ++}; ++ ++&mmc1 { ++ status = "okay"; ++ vmmc-supply = <&ldo4_reg>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ bus-width = <4>; ++ cd-gpios = <&gpio3 8 0>; ++ wp-gpios = <&gpio3 18 0>; ++}; ++ ++#include "tps65217.dtsi" ++ ++&tps { ++ regulators { ++ dcdc1_reg: regulator@0 { ++ /* +1.5V voltage with ±4% tolerance */ ++ regulator-min-microvolt = <1450000>; ++ regulator-max-microvolt = <1550000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ dcdc2_reg: regulator@1 { ++ /* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */ ++ regulator-name = "vdd_mpu"; ++ regulator-min-microvolt = <915000>; ++ regulator-max-microvolt = <1140000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ dcdc3_reg: regulator@2 { ++ /* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */ ++ regulator-name = "vdd_core"; ++ regulator-min-microvolt = <915000>; ++ regulator-max-microvolt = <1140000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ ldo1_reg: regulator@3 { ++ /* +1.8V voltage with ±4% tolerance */ ++ regulator-min-microvolt = <1750000>; ++ regulator-max-microvolt = <1870000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ ldo2_reg: regulator@4 { ++ /* +3.3V voltage with ±4% tolerance */ ++ regulator-min-microvolt = <3175000>; ++ regulator-max-microvolt = <3430000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ ldo3_reg: regulator@5 { ++ /* +1.8V voltage with ±4% tolerance */ ++ regulator-min-microvolt = <1750000>; ++ regulator-max-microvolt = <1870000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ ldo4_reg: regulator@6 { ++ /* +3.3V voltage with ±4% tolerance */ ++ regulator-min-microvolt = <3175000>; ++ regulator-max-microvolt = <3430000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ }; ++}; diff --git a/patches/linux-3.12/0278-ARM-dts-omap5-uevm-fix-mcspi-node-pin-descriptions.patch b/patches/linux-3.12/0278-ARM-dts-omap5-uevm-fix-mcspi-node-pin-descriptions.patch new file mode 100644 index 0000000..94fadd8 --- /dev/null +++ b/patches/linux-3.12/0278-ARM-dts-omap5-uevm-fix-mcspi-node-pin-descriptions.patch @@ -0,0 +1,52 @@ +From: Eric Witcher <ewitcher@mindspring.com> +Date: Fri, 18 Oct 2013 02:42:34 -0400 +Subject: [PATCH] ARM: dts: omap5-uevm: fix mcspi node pin descriptions + +Correct mcspi pin descriptions to match corresponding node name and +add chip select number to be consistent with OMAP5 TRM. + +Signed-off-by: Eric Witcher <ewitcher@mindspring.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5-uevm.dts | 18 +++++++++--------- + 1 file changed, 9 insertions(+), 9 deletions(-) + +diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts +index e06a04a..8d80305 100644 +--- a/arch/arm/boot/dts/omap5-uevm.dts ++++ b/arch/arm/boot/dts/omap5-uevm.dts +@@ -131,25 +131,25 @@ + 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */ + 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */ + 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */ +- 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */ ++ 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */ + >; + }; + + mcspi3_pins: pinmux_mcspi3_pins { + pinctrl-single,pins = < +- 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ +- 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ +- 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ +- 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ ++ 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */ ++ 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */ ++ 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */ ++ 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */ + >; + }; + + mcspi4_pins: pinmux_mcspi4_pins { + pinctrl-single,pins = < +- 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ +- 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ +- 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ +- 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ ++ 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi4_clk */ ++ 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi4_simo */ ++ 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi4_somi */ ++ 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi4_cs0 */ + >; + }; + diff --git a/patches/linux-3.12/0279-ARM-dts-omap5-uevm-add-smps123-supply-for-CPU.patch b/patches/linux-3.12/0279-ARM-dts-omap5-uevm-add-smps123-supply-for-CPU.patch new file mode 100644 index 0000000..ea8e863 --- /dev/null +++ b/patches/linux-3.12/0279-ARM-dts-omap5-uevm-add-smps123-supply-for-CPU.patch @@ -0,0 +1,40 @@ +From: Nishanth Menon <nm@ti.com> +Date: Wed, 16 Oct 2013 10:39:04 -0500 +Subject: [PATCH] ARM: dts: omap5-uevm: add smps123 supply for CPU + +regulator smps123 supply from Palmas PMIC powers CPU0 on OMAP5uEVM. + +Based on a patch by J Keerthy <j-keerthy@ti.com> + +Signed-off-by: Nishanth Menon <nm@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5-uevm.dts | 4 ++++ + arch/arm/boot/dts/omap5.dtsi | 2 +- + 2 files changed, 5 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts +index 8d80305..22d9b51 100644 +--- a/arch/arm/boot/dts/omap5-uevm.dts ++++ b/arch/arm/boot/dts/omap5-uevm.dts +@@ -501,3 +501,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pins>; + }; ++ ++&cpu0 { ++ cpu0-supply = <&smps123_reg>; ++}; +diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi +index 2cb72ba..b315873 100644 +--- a/arch/arm/boot/dts/omap5.dtsi ++++ b/arch/arm/boot/dts/omap5.dtsi +@@ -38,7 +38,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- cpu@0 { ++ cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; diff --git a/patches/linux-3.12/0280-ARM-dts-dra7-evm-add-smps123-supply-for-CPU.patch b/patches/linux-3.12/0280-ARM-dts-dra7-evm-add-smps123-supply-for-CPU.patch new file mode 100644 index 0000000..9e4e55c --- /dev/null +++ b/patches/linux-3.12/0280-ARM-dts-dra7-evm-add-smps123-supply-for-CPU.patch @@ -0,0 +1,40 @@ +From: J Keerthy <j-keerthy@ti.com> +Date: Wed, 16 Oct 2013 10:39:05 -0500 +Subject: [PATCH] ARM: dts: dra7-evm: add smps123 supply for CPU + +regulator smps123 supply from Palmas PMIC powers CPU0 on DRA7 EVM. + +[nm@ti.com: rebase to latest] +Signed-off-by: Nishanth Menon <nm@ti.com> +Signed-off-by: J Keerthy <j-keerthy@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/dra7-evm.dts | 4 ++++ + arch/arm/boot/dts/dra7.dtsi | 2 +- + 2 files changed, 5 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts +index 3abf5f4..5babba0 100644 +--- a/arch/arm/boot/dts/dra7-evm.dts ++++ b/arch/arm/boot/dts/dra7-evm.dts +@@ -269,3 +269,7 @@ + vmmc-supply = <&mmc2_3v3>; + bus-width = <8>; + }; ++ ++&cpu0 { ++ cpu0-supply = <&smps123_reg>; ++}; +diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi +index 98ff655..c4fb401 100644 +--- a/arch/arm/boot/dts/dra7.dtsi ++++ b/arch/arm/boot/dts/dra7.dtsi +@@ -37,7 +37,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- cpu@0 { ++ cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; diff --git a/patches/linux-3.12/0281-ARM-dts-OMAP5-Add-CPU-OPP-table.patch b/patches/linux-3.12/0281-ARM-dts-OMAP5-Add-CPU-OPP-table.patch new file mode 100644 index 0000000..997be5e --- /dev/null +++ b/patches/linux-3.12/0281-ARM-dts-OMAP5-Add-CPU-OPP-table.patch @@ -0,0 +1,43 @@ +From: J Keerthy <j-keerthy@ti.com> +Date: Wed, 16 Oct 2013 10:39:06 -0500 +Subject: [PATCH] ARM: dts: OMAP5: Add CPU OPP table + +Add DT OPP table for OMAP54xx family of devices. This data is +decoded by OF with of_init_opp_table() helper function. + +The data is based on OMAP543x ES2.0 DM Operating Condition Addendum +Version 0.6(April 2013) + +NOTE: The voltage and frequency values work well only on NOM samples +and are supposed to work properly only with ABB/AVS for ALL OPPs. + +TODO: Add SPEED BIN OPP after ABB and AVS support so the cpufreq works +on all samples seamlessly. Clock node is pending alignment for clock +dts conversion + +[nm@ti.com: sync to latest and fixes] +Signed-off-by: Nishanth Menon <nm@ti.com> +Signed-off-by: J Keerthy <j-keerthy@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi +index b315873..154d92f 100644 +--- a/arch/arm/boot/dts/omap5.dtsi ++++ b/arch/arm/boot/dts/omap5.dtsi +@@ -42,6 +42,13 @@ + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; ++ ++ operating-points = < ++ /* kHz uV */ ++ 500000 880000 ++ 1000000 1060000 ++ 1500000 1250000 ++ >; + }; + cpu@1 { + device_type = "cpu"; diff --git a/patches/linux-3.12/0282-ARM-dts-DRA7-Add-CPU-OPP-table.patch b/patches/linux-3.12/0282-ARM-dts-DRA7-Add-CPU-OPP-table.patch new file mode 100644 index 0000000..04a31e7 --- /dev/null +++ b/patches/linux-3.12/0282-ARM-dts-DRA7-Add-CPU-OPP-table.patch @@ -0,0 +1,40 @@ +From: J Keerthy <j-keerthy@ti.com> +Date: Wed, 16 Oct 2013 10:39:07 -0500 +Subject: [PATCH] ARM: dts: DRA7: Add CPU OPP table + +Add DT OPP table for DRA7xx family of devices. This data is decoded by +OF with of_init_opp_table() helper function. + +The data is based on DRA75x, DRA74x Data Manual revision F (Sept 2013). + +TODO: add OPP_HIGH after AVS-Class0 is functional +NOTE: The voltage and frequency values work well only on NOM samples +and it is mandatory to use ABB/AVS Class 0 support for all OPPs. + +Clock nodes are pending clock node alignment. + +[nm@ti.com: cleanups and rebase to latest] +Signed-off-by: Nishanth Menon <nm@ti.com> +Signed-off-by: J Keerthy <j-keerthy@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/dra7.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi +index c4fb401..d0df4c4 100644 +--- a/arch/arm/boot/dts/dra7.dtsi ++++ b/arch/arm/boot/dts/dra7.dtsi +@@ -41,6 +41,12 @@ + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; ++ ++ operating-points = < ++ /* kHz uV */ ++ 1000000 1060000 ++ 1176000 1160000 ++ >; + }; + cpu@1 { + device_type = "cpu"; diff --git a/patches/linux-3.12/0283-ARM-dts-omap3-n900-Add-pinctrl-for-i2c-devices.patch b/patches/linux-3.12/0283-ARM-dts-omap3-n900-Add-pinctrl-for-i2c-devices.patch new file mode 100644 index 0000000..bc555dc --- /dev/null +++ b/patches/linux-3.12/0283-ARM-dts-omap3-n900-Add-pinctrl-for-i2c-devices.patch @@ -0,0 +1,77 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:30 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: Add pinctrl for i2c devices + +Add pin muxing support for the Nokia N900 i2c controllers. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 35 +++++++++++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index e13b697..ad4edd9 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -28,7 +28,35 @@ + + }; + ++&omap3_pmx_core { ++ pinctrl-names = "default"; ++ ++ i2c1_pins: pinmux_i2c1_pins { ++ pinctrl-single,pins = < ++ 0x18a (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ ++ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ ++ >; ++ }; ++ ++ i2c2_pins: pinmux_i2c2_pins { ++ pinctrl-single,pins = < ++ 0x18e (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ ++ 0x190 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ ++ >; ++ }; ++ ++ i2c3_pins: pinmux_i2c3_pins { ++ pinctrl-single,pins = < ++ 0x192 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ ++ 0x194 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ ++ >; ++ }; ++}; ++ + &i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ + clock-frequency = <2200000>; + + twl: twl@48 { +@@ -39,6 +67,7 @@ + }; + + #include "twl4030.dtsi" ++#include "twl4030_omap3.dtsi" + + &twl_gpio { + ti,pullups = <0x0>; +@@ -46,10 +75,16 @@ + }; + + &i2c2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; ++ + clock-frequency = <400000>; + }; + + &i2c3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c3_pins>; ++ + clock-frequency = <100000>; + }; + diff --git a/patches/linux-3.12/0284-ARM-dts-omap3-n900-Fix-i2c-bus-speed.patch b/patches/linux-3.12/0284-ARM-dts-omap3-n900-Fix-i2c-bus-speed.patch new file mode 100644 index 0000000..e8a26a3 --- /dev/null +++ b/patches/linux-3.12/0284-ARM-dts-omap3-n900-Fix-i2c-bus-speed.patch @@ -0,0 +1,33 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:31 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: Fix i2c bus speed + +Fix the bus speed of i2c bus 2 and 3. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index ad4edd9..7dd6fb6 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -78,14 +78,14 @@ + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + +- clock-frequency = <400000>; ++ clock-frequency = <100000>; + }; + + &i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + +- clock-frequency = <100000>; ++ clock-frequency = <400000>; + }; + + &mmc1 { diff --git a/patches/linux-3.12/0285-ARM-dts-omap3-n900-Add-UART-support.patch b/patches/linux-3.12/0285-ARM-dts-omap3-n900-Add-UART-support.patch new file mode 100644 index 0000000..fede0d9 --- /dev/null +++ b/patches/linux-3.12/0285-ARM-dts-omap3-n900-Add-UART-support.patch @@ -0,0 +1,55 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:32 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: Add UART support + +Add UART support to Nokia N900. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index 7dd6fb6..9226268 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -31,6 +31,20 @@ + &omap3_pmx_core { + pinctrl-names = "default"; + ++ uart2_pins: pinmux_uart2_pins { ++ pinctrl-single,pins = < ++ 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx */ ++ 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx */ ++ >; ++ }; ++ ++ uart3_pins: pinmux_uart3_pins { ++ pinctrl-single,pins = < ++ 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx */ ++ 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx */ ++ >; ++ }; ++ + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x18a (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ +@@ -127,3 +141,17 @@ + mode = <2>; + power = <50>; + }; ++ ++&uart1 { ++ status = "disabled"; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2_pins>; ++}; ++ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; ++}; diff --git a/patches/linux-3.12/0286-ARM-dts-omap3-n900-Add-support-for-SD-cards.patch b/patches/linux-3.12/0286-ARM-dts-omap3-n900-Add-support-for-SD-cards.patch new file mode 100644 index 0000000..446d35e --- /dev/null +++ b/patches/linux-3.12/0286-ARM-dts-omap3-n900-Add-support-for-SD-cards.patch @@ -0,0 +1,47 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:33 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: Add support for SD cards + +Add support for external SD card slot. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index 9226268..01a437e 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -65,6 +65,17 @@ + 0x194 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ + >; + }; ++ ++ mmc1_pins: pinmux_mmc1_pins { ++ pinctrl-single,pins = < ++ 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */ ++ 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */ ++ 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */ ++ 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */ ++ 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */ ++ 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */ ++ >; ++ }; + }; + + &i2c1 { +@@ -103,7 +114,11 @@ + }; + + &mmc1 { +- status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ vmmc-supply = <&vmmc1>; ++ bus-width = <4>; ++ cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */ + }; + + &mmc2 { diff --git a/patches/linux-3.12/0287-ARM-dts-omap3-n900-GPIO-key-definitions.patch b/patches/linux-3.12/0287-ARM-dts-omap3-n900-GPIO-key-definitions.patch new file mode 100644 index 0000000..ecad6fc --- /dev/null +++ b/patches/linux-3.12/0287-ARM-dts-omap3-n900-GPIO-key-definitions.patch @@ -0,0 +1,73 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:34 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: GPIO key definitions + +Add device tree node for the GPIO keys provided by the +N900 board. This is a simple conversion of the existing +board code. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 48 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index 01a437e..5082cb6 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -26,6 +26,54 @@ + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + ++ gpio_keys { ++ compatible = "gpio-keys"; ++ ++ camera_lens_cover { ++ label = "Camera Lens Cover"; ++ gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */ ++ linux,input-type = <5>; /* EV_SW */ ++ linux,code = <0x09>; /* SW_CAMERA_LENS_COVER */ ++ gpio-key,wakeup; ++ }; ++ ++ camera_focus { ++ label = "Camera Focus"; ++ gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */ ++ linux,code = <0x210>; /* KEY_CAMERA_FOCUS */ ++ gpio-key,wakeup; ++ }; ++ ++ camera_capture { ++ label = "Camera Capture"; ++ gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */ ++ linux,code = <0xd4>; /* KEY_CAMERA */ ++ gpio-key,wakeup; ++ }; ++ ++ lock_button { ++ label = "Lock Button"; ++ gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */ ++ linux,code = <0x98>; /* KEY_SCREENLOCK */ ++ gpio-key,wakeup; ++ }; ++ ++ keypad_slide { ++ label = "Keypad Slide"; ++ gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */ ++ linux,input-type = <5>; /* EV_SW */ ++ linux,code = <0x0a>; /* SW_KEYPAD_SLIDE */ ++ gpio-key,wakeup; ++ }; ++ ++ proximity_sensor { ++ label = "Proximity Sensor"; ++ gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */ ++ linux,input-type = <5>; /* EV_SW */ ++ linux,code = <0x0b>; /* SW_FRONT_PROXIMITY */ ++ }; ++ }; ++ + }; + + &omap3_pmx_core { diff --git a/patches/linux-3.12/0288-ARM-dts-omap3-n900-Add-vibrator-device.patch b/patches/linux-3.12/0288-ARM-dts-omap3-n900-Add-vibrator-device.patch new file mode 100644 index 0000000..90a3e78 --- /dev/null +++ b/patches/linux-3.12/0288-ARM-dts-omap3-n900-Add-vibrator-device.patch @@ -0,0 +1,30 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:35 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: Add vibrator device + +Add support for Nokia N900's vibrator. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index 5082cb6..a02f64f 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -142,6 +142,13 @@ + #include "twl4030.dtsi" + #include "twl4030_omap3.dtsi" + ++&twl { ++ twl_audio: audio { ++ compatible = "ti,twl4030-audio"; ++ ti,enable-vibra = <1>; ++ }; ++}; ++ + &twl_gpio { + ti,pullups = <0x0>; + ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */ diff --git a/patches/linux-3.12/0289-ARM-dts-omap3-n900-Add-LP5523-support.patch b/patches/linux-3.12/0289-ARM-dts-omap3-n900-Add-LP5523-support.patch new file mode 100644 index 0000000..e38fcbe --- /dev/null +++ b/patches/linux-3.12/0289-ARM-dts-omap3-n900-Add-LP5523-support.patch @@ -0,0 +1,28 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:36 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: Add LP5523 support + +Add support for LP5523 device. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index a02f64f..c7e0d2d 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -159,6 +159,11 @@ + pinctrl-0 = <&i2c2_pins>; + + clock-frequency = <100000>; ++ ++ bq27200: bq27200@55 { ++ compatible = "ti,bq27200"; ++ reg = <0x55>; ++ }; + }; + + &i2c3 { diff --git a/patches/linux-3.12/0290-ARM-dts-TWL4030-Add-missing-regulators.patch b/patches/linux-3.12/0290-ARM-dts-TWL4030-Add-missing-regulators.patch new file mode 100644 index 0000000..7203426 --- /dev/null +++ b/patches/linux-3.12/0290-ARM-dts-TWL4030-Add-missing-regulators.patch @@ -0,0 +1,82 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:37 +0200 +Subject: [PATCH] ARM: dts: TWL4030: Add missing regulators + +The twl4030.dtsi is missing some regulators. This patch adds +the missing ones and orders the regulators alphabetically. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/twl4030.dtsi | 44 ++++++++++++++++++++++++++++++++++++++---- + 1 file changed, 40 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi +index ae6a17a..cb5afcd 100644 +--- a/arch/arm/boot/dts/twl4030.dtsi ++++ b/arch/arm/boot/dts/twl4030.dtsi +@@ -23,6 +23,22 @@ + compatible = "ti,twl4030-wdt"; + }; + ++ vaux1: regulator-vaux1 { ++ compatible = "ti,twl4030-vaux1"; ++ }; ++ ++ vaux2: regulator-vaux2 { ++ compatible = "ti,twl4030-vaux2"; ++ }; ++ ++ vaux3: regulator-vaux3 { ++ compatible = "ti,twl4030-vaux3"; ++ }; ++ ++ vaux4: regulator-vaux4 { ++ compatible = "ti,twl4030-vaux4"; ++ }; ++ + vcc: regulator-vdd1 { + compatible = "ti,twl4030-vdd1"; + regulator-min-microvolt = <600000>; +@@ -35,10 +51,20 @@ + regulator-max-microvolt = <1800000>; + }; + +- vpll2: regulator-vpll2 { +- compatible = "ti,twl4030-vpll2"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; ++ vio: regulator-vio { ++ compatible = "ti,twl4030-vio"; ++ }; ++ ++ vintana1: regulator-vintana1 { ++ compatible = "ti,twl4030-vintana1"; ++ }; ++ ++ vintana2: regulator-vintana2 { ++ compatible = "ti,twl4030-vintana2"; ++ }; ++ ++ vintdig: regulator-vintdig { ++ compatible = "ti,twl4030-vintdig"; + }; + + vmmc1: regulator-vmmc1 { +@@ -65,6 +91,16 @@ + compatible = "ti,twl4030-vusb3v1"; + }; + ++ vpll1: regulator-vpll1 { ++ compatible = "ti,twl4030-vpll1"; ++ }; ++ ++ vpll2: regulator-vpll2 { ++ compatible = "ti,twl4030-vpll2"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ + vsim: regulator-vsim { + compatible = "ti,twl4030-vsim"; + regulator-min-microvolt = <1800000>; diff --git a/patches/linux-3.12/0291-ARM-dts-omap3-n900-Specify-regulator-info.patch b/patches/linux-3.12/0291-ARM-dts-omap3-n900-Specify-regulator-info.patch new file mode 100644 index 0000000..e635f1a --- /dev/null +++ b/patches/linux-3.12/0291-ARM-dts-omap3-n900-Specify-regulator-info.patch @@ -0,0 +1,108 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:38 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: Specify regulator info + +Add regulator names and voltage information to +the Nokia N900 DTS file. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 84 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 84 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index c7e0d2d..0a45af3 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -142,6 +142,90 @@ + #include "twl4030.dtsi" + #include "twl4030_omap3.dtsi" + ++&vaux1 { ++ regulator-name = "V28"; ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-always-on; /* due battery cover sensor */ ++}; ++ ++&vaux2 { ++ regulator-name = "VCSI"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++}; ++ ++&vaux3 { ++ regulator-name = "VMMC2_30"; ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3000000>; ++}; ++ ++&vaux4 { ++ regulator-name = "VCAM_ANA_28"; ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++}; ++ ++&vmmc1 { ++ regulator-name = "VMMC1"; ++ regulator-min-microvolt = <1850000>; ++ regulator-max-microvolt = <3150000>; ++}; ++ ++&vmmc2 { ++ regulator-name = "V28_A"; ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-always-on; /* due VIO leak to AIC34 VDDs */ ++}; ++ ++&vpll1 { ++ regulator-name = "VPLL"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++}; ++ ++&vpll2 { ++ regulator-name = "VSDI_CSI"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++}; ++ ++&vsim { ++ regulator-name = "VMMC2_IO_18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++}; ++ ++&vio { ++ regulator-name = "VIO"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++}; ++ ++&vintana1 { ++ regulator-name = "VINTANA1"; ++ /* fixed to 1500000 */ ++ regulator-always-on; ++}; ++ ++&vintana2 { ++ regulator-name = "VINTANA2"; ++ regulator-min-microvolt = <2750000>; ++ regulator-max-microvolt = <2750000>; ++ regulator-always-on; ++}; ++ ++&vintdig { ++ regulator-name = "VINTDIG"; ++ /* fixed to 1500000 */ ++ regulator-always-on; ++}; ++ + &twl { + twl_audio: audio { + compatible = "ti,twl4030-audio"; diff --git a/patches/linux-3.12/0292-ARM-dts-omap3-n900-Add-NAND-support.patch b/patches/linux-3.12/0292-ARM-dts-omap3-n900-Add-NAND-support.patch new file mode 100644 index 0000000..e0bcb4b --- /dev/null +++ b/patches/linux-3.12/0292-ARM-dts-omap3-n900-Add-NAND-support.patch @@ -0,0 +1,95 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:39 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: Add NAND support + +This patch adds supports for Nokia N900 NAND memory. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 72 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 72 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index 0a45af3..999a80c 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -273,6 +273,78 @@ + status = "disabled"; + }; + ++&gpmc { ++ ranges = <0 0 0x04000000 0x10000000>; /* 256MB */ ++ ++ /* gpio-irq for dma: 65 */ ++ ++ onenand@0,0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ reg = <0 0 0x10000000>; ++ ++ gpmc,sync-read; ++ gpmc,sync-write; ++ gpmc,burst-length = <16>; ++ gpmc,burst-read; ++ gpmc,burst-wrap; ++ gpmc,burst-write; ++ gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */ ++ gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */ ++ gpmc,cs-on-ns = <0>; ++ gpmc,cs-rd-off-ns = <87>; ++ gpmc,cs-wr-off-ns = <87>; ++ gpmc,adv-on-ns = <0>; ++ gpmc,adv-rd-off-ns = <10>; ++ gpmc,adv-wr-off-ns = <10>; ++ gpmc,oe-on-ns = <15>; ++ gpmc,oe-off-ns = <87>; ++ gpmc,we-on-ns = <0>; ++ gpmc,we-off-ns = <87>; ++ gpmc,rd-cycle-ns = <112>; ++ gpmc,wr-cycle-ns = <112>; ++ gpmc,access-ns = <81>; ++ gpmc,page-burst-access-ns = <15>; ++ gpmc,bus-turnaround-ns = <0>; ++ gpmc,cycle2cycle-delay-ns = <0>; ++ gpmc,wait-monitoring-ns = <0>; ++ gpmc,clk-activation-ns = <5>; ++ gpmc,wr-data-mux-bus-ns = <30>; ++ gpmc,wr-access-ns = <81>; ++ gpmc,sync-clk-ps = <15000>; ++ ++ /* ++ * MTD partition table corresponding to Nokia's ++ * Maemo 5 (Fremantle) release. ++ */ ++ partition@0 { ++ label = "bootloader"; ++ reg = <0x00000000 0x00020000>; ++ read-only; ++ }; ++ partition@1 { ++ label = "config"; ++ reg = <0x00020000 0x00060000>; ++ }; ++ partition@2 { ++ label = "log"; ++ reg = <0x00080000 0x00040000>; ++ }; ++ partition@3 { ++ label = "kernel"; ++ reg = <0x000c0000 0x00200000>; ++ }; ++ partition@4 { ++ label = "initfs"; ++ reg = <0x002c0000 0x00200000>; ++ }; ++ partition@5 { ++ label = "rootfs"; ++ reg = <0x004c0000 0x0fb40000>; ++ }; ++ }; ++}; ++ + &mcspi1 { + /* + * For some reason, touchscreen is necessary for screen to work at diff --git a/patches/linux-3.12/0293-ARM-dts-omap3-n900-Mux-RX51_LCD_RESET_GPIO-in-DTS.patch b/patches/linux-3.12/0293-ARM-dts-omap3-n900-Mux-RX51_LCD_RESET_GPIO-in-DTS.patch new file mode 100644 index 0000000..44e68ec --- /dev/null +++ b/patches/linux-3.12/0293-ARM-dts-omap3-n900-Mux-RX51_LCD_RESET_GPIO-in-DTS.patch @@ -0,0 +1,40 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:40 +0200 +Subject: [PATCH] ARM: dts: omap3-n900:: Mux RX51_LCD_RESET_GPIO in DTS + +Add RX51_LCD_RESET_GPIO pin mux information to +display. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index 999a80c..5afbd28 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -124,6 +124,12 @@ + 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */ + >; + }; ++ ++ display_pins: pinmux_display_pins { ++ pinctrl-single,pins = < ++ 0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */ ++ >; ++ }; + }; + + &i2c1 { +@@ -361,6 +367,9 @@ + compatible = "acx565akm"; + spi-max-frequency = <6000000>; + reg = <2>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&display_pins>; + }; + }; + diff --git a/patches/linux-3.12/0294-ARM-dts-omap3-n900-Add-TLV320AIC3X-support.patch b/patches/linux-3.12/0294-ARM-dts-omap3-n900-Add-TLV320AIC3X-support.patch new file mode 100644 index 0000000..6a589e5 --- /dev/null +++ b/patches/linux-3.12/0294-ARM-dts-omap3-n900-Add-TLV320AIC3X-support.patch @@ -0,0 +1,49 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:41 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: Add TLV320AIC3X support + +This patch adds support for Nokia N900 TLV320AIC3X chips. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index 5afbd28..98797e5 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -250,6 +250,32 @@ + + clock-frequency = <100000>; + ++ tlv320aic3x: tlv320aic3x@18 { ++ compatible = "ti,tlv320aic3x"; ++ reg = <0x18>; ++ gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */ ++ ai3x-gpio-func = < ++ 0 /* AIC3X_GPIO1_FUNC_DISABLED */ ++ 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */ ++ >; ++ ++ AVDD-supply = <&vmmc2>; ++ DRVDD-supply = <&vmmc2>; ++ IOVDD-supply = <&vio>; ++ DVDD-supply = <&vio>; ++ }; ++ ++ tlv320aic3x_aux: tlv320aic3x@19 { ++ compatible = "ti,tlv320aic3x"; ++ reg = <0x19>; ++ gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */ ++ ++ AVDD-supply = <&vmmc2>; ++ DRVDD-supply = <&vmmc2>; ++ IOVDD-supply = <&vio>; ++ DVDD-supply = <&vio>; ++ }; ++ + bq27200: bq27200@55 { + compatible = "ti,bq27200"; + reg = <0x55>; diff --git a/patches/linux-3.12/0295-ARM-dts-omap3-n900-Add-LP5523-support.patch b/patches/linux-3.12/0295-ARM-dts-omap3-n900-Add-LP5523-support.patch new file mode 100644 index 0000000..647fecb --- /dev/null +++ b/patches/linux-3.12/0295-ARM-dts-omap3-n900-Add-LP5523-support.patch @@ -0,0 +1,84 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:42 +0200 +Subject: [PATCH] ARM: dts: omap3-n900: Add LP5523 support + +Add support for LP5523 device. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap3-n900.dts | 61 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 61 insertions(+) + +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index 98797e5..c4f20bf 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -276,6 +276,67 @@ + DVDD-supply = <&vio>; + }; + ++ lp5523: lp5523@32 { ++ compatible = "national,lp5523"; ++ reg = <0x32>; ++ clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */ ++ enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */ ++ ++ chan0 { ++ chan-name = "lp5523:kb1"; ++ led-cur = /bits/ 8 <50>; ++ max-cur = /bits/ 8 <100>; ++ }; ++ ++ chan1 { ++ chan-name = "lp5523:kb2"; ++ led-cur = /bits/ 8 <50>; ++ max-cur = /bits/ 8 <100>; ++ }; ++ ++ chan2 { ++ chan-name = "lp5523:kb3"; ++ led-cur = /bits/ 8 <50>; ++ max-cur = /bits/ 8 <100>; ++ }; ++ ++ chan3 { ++ chan-name = "lp5523:kb4"; ++ led-cur = /bits/ 8 <50>; ++ max-cur = /bits/ 8 <100>; ++ }; ++ ++ chan4 { ++ chan-name = "lp5523:b"; ++ led-cur = /bits/ 8 <50>; ++ max-cur = /bits/ 8 <100>; ++ }; ++ ++ chan5 { ++ chan-name = "lp5523:g"; ++ led-cur = /bits/ 8 <50>; ++ max-cur = /bits/ 8 <100>; ++ }; ++ ++ chan6 { ++ chan-name = "lp5523:r"; ++ led-cur = /bits/ 8 <50>; ++ max-cur = /bits/ 8 <100>; ++ }; ++ ++ chan7 { ++ chan-name = "lp5523:kb5"; ++ led-cur = /bits/ 8 <50>; ++ max-cur = /bits/ 8 <100>; ++ }; ++ ++ chan8 { ++ chan-name = "lp5523:kb6"; ++ led-cur = /bits/ 8 <50>; ++ max-cur = /bits/ 8 <100>; ++ }; ++ }; ++ + bq27200: bq27200@55 { + compatible = "ti,bq27200"; + reg = <0x55>; diff --git a/patches/linux-3.12/0296-ARM-dts-TWL4030-Add-power-button-support.patch b/patches/linux-3.12/0296-ARM-dts-TWL4030-Add-power-button-support.patch new file mode 100644 index 0000000..c8946b6 --- /dev/null +++ b/patches/linux-3.12/0296-ARM-dts-TWL4030-Add-power-button-support.patch @@ -0,0 +1,26 @@ +From: Sebastian Reichel <sre@debian.org> +Date: Wed, 23 Oct 2013 00:49:43 +0200 +Subject: [PATCH] ARM: dts: TWL4030: Add power button support + +Enable support for the power button. + +Signed-off-by: Sebastian Reichel <sre@debian.org> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/twl4030.dtsi | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi +index cb5afcd..af7fa40 100644 +--- a/arch/arm/boot/dts/twl4030.dtsi ++++ b/arch/arm/boot/dts/twl4030.dtsi +@@ -133,4 +133,9 @@ + compatible = "ti,twl4030-pwmled"; + #pwm-cells = <2>; + }; ++ ++ twl_pwrbutton: pwrbutton { ++ compatible = "ti,twl4030-pwrbutton"; ++ interrupts = <8>; ++ }; + }; diff --git a/patches/linux-3.12/0297-ARM-dts-omap5-uevm-Correct-twl6040-reset-GPIO-pinmux.patch b/patches/linux-3.12/0297-ARM-dts-omap5-uevm-Correct-twl6040-reset-GPIO-pinmux.patch new file mode 100644 index 0000000..879da4f --- /dev/null +++ b/patches/linux-3.12/0297-ARM-dts-omap5-uevm-Correct-twl6040-reset-GPIO-pinmux.patch @@ -0,0 +1,29 @@ +From: Peter Ujfalusi <peter.ujfalusi@ti.com> +Date: Wed, 23 Oct 2013 12:32:19 +0300 +Subject: [PATCH] ARM: dts: omap5-uevm: Correct twl6040 reset GPIO pinmux + +When the omap5-evm.dts file has been renamed to omap5-uevm.dts and the sEVM +support got deprecated in favor of uEVM (or Panda5) the content was not +validated. +On uEVM the twl6040 reset GPIO is from gpio5_141 and not via gpio5_145, which +was the case in sEVM. + +Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5-uevm.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts +index 22d9b51..4d79c7b 100644 +--- a/arch/arm/boot/dts/omap5-uevm.dts ++++ b/arch/arm/boot/dts/omap5-uevm.dts +@@ -71,7 +71,7 @@ + + twl6040_pins: pinmux_twl6040_pins { + pinctrl-single,pins = < +- 0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */ ++ 0x17e (PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */ + >; + }; + diff --git a/patches/linux-3.12/0298-ARM-dts-omap5-uevm-Remove-pinmux-for-dmic-pins.patch b/patches/linux-3.12/0298-ARM-dts-omap5-uevm-Remove-pinmux-for-dmic-pins.patch new file mode 100644 index 0000000..ac143f3 --- /dev/null +++ b/patches/linux-3.12/0298-ARM-dts-omap5-uevm-Remove-pinmux-for-dmic-pins.patch @@ -0,0 +1,44 @@ +From: Peter Ujfalusi <peter.ujfalusi@ti.com> +Date: Wed, 23 Oct 2013 12:32:20 +0300 +Subject: [PATCH] ARM: dts: omap5-uevm: Remove pinmux for dmic pins + +When the omap5-evm.dts file has been renamed to omap5-uevm.dts and the sEVM +support got deprecated in favor of uEVM (or Panda5) the content was not +validated. +Panda5 does not have support for digital microphones so remove the pinmux +section for it. + +Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> +Signed-off-by: Benoit Cousson <bcousson@baylibre.com> +--- + arch/arm/boot/dts/omap5-uevm.dts | 10 ---------- + 1 file changed, 10 deletions(-) + +diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts +index 4d79c7b..002fa70 100644 +--- a/arch/arm/boot/dts/omap5-uevm.dts ++++ b/arch/arm/boot/dts/omap5-uevm.dts +@@ -62,7 +62,6 @@ + pinctrl-0 = < + &twl6040_pins + &mcpdm_pins +- &dmic_pins + &mcbsp1_pins + &mcbsp2_pins + &usbhost_pins +@@ -85,15 +84,6 @@ + >; + }; + +- dmic_pins: pinmux_dmic_pins { +- pinctrl-single,pins = < +- 0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */ +- 0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */ +- 0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */ +- 0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */ +- >; +- }; +- + mcbsp1_pins: pinmux_mcbsp1_pins { + pinctrl-single,pins = < + 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */ diff --git a/patches/linux-3.12/0301-Release-3.12-customers-ptx-bbb-20131120-1.patch b/patches/linux-3.12/0301-Release-3.12-customers-ptx-bbb-20131120-1.patch new file mode 100644 index 0000000..e1b2e8c --- /dev/null +++ b/patches/linux-3.12/0301-Release-3.12-customers-ptx-bbb-20131120-1.patch @@ -0,0 +1,22 @@ +From: Michael Grzeschik <m.grzeschik@pengutronix.de> +Date: Wed, 20 Nov 2013 12:14:45 +0100 +Subject: [PATCH] Release 3.12/customers/ptx/bbb/20131120-1 + +Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> +--- + Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/Makefile b/Makefile +index 67077ad..3d9beb5 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + VERSION = 3 + PATCHLEVEL = 12 + SUBLEVEL = 0 +-EXTRAVERSION = ++EXTRAVERSION =-20131120-1 + NAME = One Giant Leap for Frogkind + + # *DOCUMENTATION* diff --git a/patches/linux-3.12/series b/patches/linux-3.12/series new file mode 100644 index 0000000..5df408c --- /dev/null +++ b/patches/linux-3.12/series @@ -0,0 +1,131 @@ +# umpf-base: v3.12 +# umpf-name: 3.12/customers/ptx/bbb +# umpf-version: 3.12/customers/ptx/bbb/20131120-1 +# umpf-topic: v3.12/topic/w1-gpio-fixes +# umpf-hashinfo: 0ad843b12fa8dabff7e9947f22139340e9769d1e +# umpf-topic-range: 5e01dc7b26d9f24f39abace5da98ccbd6a5ceb52..0ad843b12fa8dabff7e9947f22139340e9769d1e +0001-w1-gpio-Detect-of_gpio_error-for-first-gpio.patch +0002-w1-gpio-Use-devm_-functions.patch +# umpf-topic: v3.12/topic/tps-regulator +# umpf-hashinfo: 3e0d99ae5dfb1542ce75067ae870c00cba9c7b67 +# umpf-topic-range: 0ad843b12fa8dabff7e9947f22139340e9769d1e..8a567145f64f5def122d4a80273ebd9f2ca5eb00 +0051-regulator-tps65910-Add-backup-battery-regulator.patch +0052-ARM-dts-regulator-tps65910-node.patch +# umpf-topic: v3.12/topic/musb_dsps +# umpf-hashinfo: f057882b7daf959011ec143bcd5b0fbdee73a57b +# umpf-topic-range: 8a567145f64f5def122d4a80273ebd9f2ca5eb00..6259f13b26e49b6f0c468a4b33db2d5a8bda1e26 +0101-usb-musb-gadget-stay-IDLE-without-gadget-driver.patch +0102-usb-musb-Bugfix-of_node-assignment.patch +0103-usb-musb-dsps-debugfs-files.patch +0104-usb-musb-dsps-use-devm_kzalloc.patch +0105-usb-musb-dsps-OTG-detection.patch +0106-ARM-dts-am33xx-change-usb-ctrl-module-label.patch +# umpf-topic: v3.12/topic/am335x-mmc +# umpf-hashinfo: f3c88c3fb805b1c6d548be16afcabb377c410c14 +# umpf-topic-range: 6259f13b26e49b6f0c468a4b33db2d5a8bda1e26..6ef5aad03a56787c08f0c0c0bb5bab93b8be36be +0151-omap-hsmmc-Correct-usage-of-of_find_node_by_name.patch +# umpf-topic: v3.12/topic/omap-dts-for-3.13 +# umpf-hashinfo: b306e7b819edd0515e18f5ca7e0d1cb4b0e4e58a +# umpf-topic-range: 6ef5aad03a56787c08f0c0c0bb5bab93b8be36be..53ada0ea98ca5da6cbdb57f38421332780c864ad +0201-ARM-dts-N900-Add-device-tree.patch +0202-ARM-dts-omap3-igep-add-pinmux-node-for-GPIO-LED-conf.patch +0203-ARM-dts-omap3-igep0020-add-mux-conf-for-GPIO-LEDs.patch +0204-ARM-dts-omap3-igep0030-add-mux-conf-for-GPIO-LED.patch +0205-ARM-dts-AM33XX-Add-PMU-support.patch +0206-ARM-dts-AM33xx-Correct-gpio-interrupt-cells-property.patch +0207-ARM-dts-omap5-uevm-Split-SMPS10-in-two-nodes.patch +0208-ARM-dts-Remove-0x-s-from-OMAP2420-H4-DTS-file.patch +0209-ARM-dts-Remove-0x-s-from-OMAP3-IGEP0020-DTS-file.patch +0210-ARM-dts-Remove-0x-s-from-OMAP3-IGEP0030-DTS-file.patch +0211-ARM-dts-Remove-0x-s-from-OMAP3-DTS-file.patch +0212-ARM-dts-Remove-0x-s-from-OMAP3430-SDP-DTS-file.patch +0213-ARM-dts-Remove-0x-s-from-OMAP4-DTS-file.patch +0214-ARM-dts-Remove-0x-s-from-OMAP5-DTS-file.patch +0215-ARM-dts-twl6030-Move-common-configuration-for-OMAP4-.patch +0216-ARM-dts-DRA7-Add-the-dts-files-for-dra7-SoC-and-dra7.patch +0217-ARM-dts-AM4372-cpu-s-node-per-latest-binding.patch +0218-ARM-dts-AM4372-add-few-nodes.patch +0219-ARM-dts-Add-devicetree-for-gta04-board.patch +0220-ARM-dts-omap3-beagle-Make-USB-host-pin-naming-consis.patch +0221-ARM-dts-OMAP5-add-palmas-usb-node.patch +0222-ARM-dts-AM33XX-Add-EDMA-support.patch +0223-ARM-dts-AM33XX-Add-SPI-DMA-support.patch +0224-ARM-dts-AM33XX-Add-MMC-support-and-documentation.patch +0225-ARM-dts-am335x-bone-add-CD-for-mmc1.patch +0226-ARM-dts-am335x-boneblack-add-eMMC-DT-entry.patch +0227-ARM-dts-am335x-bone-common-switch-mmc1-to-4-bit-mode.patch +0228-ARM-dts-am335x-bone-common-add-cpu0-and-mmc1-trigger.patch +0229-ARM-dts-AM33XX-use-pinmux-node-defined-in-included-f.patch +0230-ARM-dts-AM33XX-don-t-redefine-OCP-bus-and-device-nod.patch +0231-ARM-dts-omap3-devkit8000-fix-a-typo-in-GMPC-node.patch +0232-ARM-dts-DRA7-Add-TPS659038-PMIC-nodes.patch +0233-ARM-dts-AM33XX-add-ethernet-alias-s-for-am33xx.patch +0234-ARM-dts-omap3-beagle-Use-reset-gpios-for-hsusb2_rese.patch +0235-ARM-dts-omap4-panda-Use-reset-gpios-for-hsusb1_reset.patch +0236-ARM-dts-omap5-uevm-Use-reset-gpios-for-hsusb2-3_rese.patch +0237-ARM-dts-omap3-beagle-xm-Add-USB-Host-support.patch +0238-ARM-dts-omap3-beagle-Add-USB-OTG-PHY-details.patch +0239-ARM-dts-am335x-boneblack-move-fixed-regulator-to-boa.patch +0240-ARM-dts-AM33XX-Add-support-for-IGEP-COM-AQUILA.patch +0241-ARM-dts-AM33XX-Add-support-for-IGEP-AQUILA-EXPANSION.patch +0242-ARM-dts-am335x-bone-common-correct-mux-mode-for-cmd-.patch +0243-ARM-dts-am335x-evm-sdk-switch-mmc1-to-4-bit-mode.patch +0244-ARM-dts-OMAP4-Add-AES-node.patch +0245-ARM-dts-OMAP4-Add-DES3DES-node.patch +0246-ARM-dts-AM33XX-Add-SHAM-data-and-documentation.patch +0247-ARM-dts-AM33XX-Add-AES-data-and-documentation.patch +0248-ARM-dts-AM33XX-Fix-AES-interrupt-number.patch +0249-ARM-dts-AM437X-Add-AES-node.patch +0250-ARM-dts-AM437X-Add-DES-node.patch +0251-ARM-dts-AM33XX-Add-LCDC-info-into-am335x-evm.patch +0252-ARM-dts-AM33XX-beagle-black-add-pinmux-and-hdmi-node.patch +0253-ARM-dts-omap3-igep-Add-USB-OTG-support.patch +0254-ARM-dts-omap3-igep0020-Add-HS-USB-Host-support.patch +0255-ARM-dts-omap3-igep0020-use-standard-constant-for-IRQ.patch +0256-ARM-dts-omap5-uevm-mark-TWL6037-as-system-power-cont.patch +0257-ARM-dts-dra7-evm-Add-mmc1-node-for-micro-sd-support.patch +0258-ARM-dts-dra7-evm-Add-mmc2-node-for-eMMC-support.patch +0259-ARM-dts-OMAP5-Remove-clock-frequency-field-for-cpu-t.patch +0260-ARM-dts-omap3-Adapt-USB-OTG-to-generic-PHY-framework.patch +0261-ARM-dts-omap-Add-reset-idle-on-init-bindings-for-OMA.patch +0262-ARM-dts-am335x-evmsk-Do-not-reset-gpio0.patch +0263-ARM-dts-omap4-panda-es-Do-not-reset-gpio1.patch +0264-ARM-dts-omap5-uevm-remove-always_on-boot_on-from-smp.patch +0265-ARM-dts-OMAP5-Add-dr_mode-for-dwc3.patch +0266-ARM-dts-AM4372-Add-L2-EDMA-mailbox-MMC-and-SHAM-node.patch +0267-ARM-dts-AM4372-Update-Support-for-EPOS-EVM.patch +0268-ARM-dts-AM33XX-Add-mcasp0-and-mcasp1-device-tree-ent.patch +0269-ARM-dts-AM33XX-mcasp-Add-location-for-data-port-regi.patch +0270-ARM-dts-am335x-evm-Add-audio-support-for-am335x-evm..patch +0271-ARM-dts-am335x-evmsk-Audio-support.patch +0272-ARM-dts-omap3-beagle-Adapt-USB-OTG-to-generic-PHY-fr.patch +0273-ARM-dts-AM4372-Add-McASP-nodes.patch +0274-ARM-dts-igep0033-Add-mmc1-node-for-SDCARD-support.patch +0275-ARM-dts-OMAP3-Add-i2c-aliases.patch +0276-ARM-dts-AM33xx-Add-i2c-aliases.patch +0277-ARM-dts-Add-support-for-Newflow-NanoBone-board.patch +0278-ARM-dts-omap5-uevm-fix-mcspi-node-pin-descriptions.patch +0279-ARM-dts-omap5-uevm-add-smps123-supply-for-CPU.patch +0280-ARM-dts-dra7-evm-add-smps123-supply-for-CPU.patch +0281-ARM-dts-OMAP5-Add-CPU-OPP-table.patch +0282-ARM-dts-DRA7-Add-CPU-OPP-table.patch +0283-ARM-dts-omap3-n900-Add-pinctrl-for-i2c-devices.patch +0284-ARM-dts-omap3-n900-Fix-i2c-bus-speed.patch +0285-ARM-dts-omap3-n900-Add-UART-support.patch +0286-ARM-dts-omap3-n900-Add-support-for-SD-cards.patch +0287-ARM-dts-omap3-n900-GPIO-key-definitions.patch +0288-ARM-dts-omap3-n900-Add-vibrator-device.patch +0289-ARM-dts-omap3-n900-Add-LP5523-support.patch +0290-ARM-dts-TWL4030-Add-missing-regulators.patch +0291-ARM-dts-omap3-n900-Specify-regulator-info.patch +0292-ARM-dts-omap3-n900-Add-NAND-support.patch +0293-ARM-dts-omap3-n900-Mux-RX51_LCD_RESET_GPIO-in-DTS.patch +0294-ARM-dts-omap3-n900-Add-TLV320AIC3X-support.patch +0295-ARM-dts-omap3-n900-Add-LP5523-support.patch +0296-ARM-dts-TWL4030-Add-power-button-support.patch +0297-ARM-dts-omap5-uevm-Correct-twl6040-reset-GPIO-pinmux.patch +0298-ARM-dts-omap5-uevm-Remove-pinmux-for-dmic-pins.patch +# umpf-release: 3.12/customers/ptx/bbb/20131120-1 +# umpf-topic-range: 53ada0ea98ca5da6cbdb57f38421332780c864ad..e68af31756fc1739f159d98756b7dd13a6214b13 +0301-Release-3.12-customers-ptx-bbb-20131120-1.patch +# umpf-end diff --git a/platformconfig b/platformconfig index 5368907..e39244b 100644 --- a/platformconfig +++ b/platformconfig @@ -101,14 +101,14 @@ PTXCONF_KERNEL_VERSION="3.8.13" PTXCONF_KERNEL_MD5="2af19d06cd47ec459519159cdd10542d" PTXCONF_KERNEL_ARCH_STRING="arm" # PTXCONF_KERNEL_IMAGE_BZ is not set -# PTXCONF_KERNEL_IMAGE_Z is not set +PTXCONF_KERNEL_IMAGE_Z=y # PTXCONF_KERNEL_IMAGE_XIP is not set -PTXCONF_KERNEL_IMAGE_U=y +# PTXCONF_KERNEL_IMAGE_U is not set # PTXCONF_KERNEL_IMAGE_VM is not set # PTXCONF_KERNEL_IMAGE_VMLINUX is not set # PTXCONF_KERNEL_IMAGE_RAW is not set # PTXCONF_KERNEL_IMAGE_SIMPLE is not set -PTXCONF_KERNEL_IMAGE="uImage" +PTXCONF_KERNEL_IMAGE="zImage" PTXCONF_KERNEL_XZ=y PTXCONF_KERNEL_LZOP=y @@ -116,7 +116,7 @@ PTXCONF_KERNEL_LZOP=y # patching & configuration # PTXCONF_KERNEL_SERIES="series" -PTXCONF_KERNEL_CONFIG="kernelconfig" +PTXCONF_KERNEL_CONFIG="kernelconfig-${PTXCONF_KERNEL_VERSION}" # # Development features @@ -240,7 +240,7 @@ PTXCONF_HOST_LZOP=y PTXCONF_HOST_MTOOLS=y # PTXCONF_HOST_OPENSSL is not set # PTXCONF_HOST_SQUASHFS_TOOLS is not set -PTXCONF_HOST_U_BOOT_TOOLS=y +# PTXCONF_HOST_U_BOOT_TOOLS is not set # PTXCONF_HOST_UTIL_LINUX_NG is not set # PTXCONF_HOST_XL_TOOLS is not set PTXCONF_HOST_XZ=y |