examples: fix typo and remove duplicate file in root-dir

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>

2 files changed, 1 insertions, 314 deletions

diff --git a/examples/pxa-regs b/examples/pxa-regs
index 41f2a9b..7336334 100644
--- a/examples/pxa-regs
+++ b/examples/pxa-regs
@@ -307,7 +307,7 @@ MCIO1	 = 0x800003C  # Card interface I/O Space Socket 1 Timing Configuration
 MDMRS	 = 0x8000040  # MRS value to be written to SDRAM
 BOOT_DEF = 0x8000044  # Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL
 
-# FIXME: shlashes are not recognized
+# FIXME: slashes are not recognized
 # open /dev/mem
 # map 0x0 0x10000000
 
diff --git a/pxa-regs b/pxa-regs
deleted file mode 100644
index 41f2a9b..0000000
--- a/pxa-regs
+++ /dev/null
@@ -1,313 +0,0 @@
-PXAIO = 0x40000000
-
-PXA_CS0_PHYS = 0x00000000
-PXA_CS1_PHYS = 0x04000000
-PXA_CS2_PHYS = 0x08000000
-PXA_CS3_PHYS = 0x0C000000
-PXA_CS4_PHYS = 0x10000000
-PXA_CS5_PHYS = 0x14000000
-
-#
-# DMA Controller
-#
-DCSR0 = 0x0   # DMA Control / Status Register for Channel 0
-DCSR1 = 0x04  # DMA Control / Status Register for Channel 1
-DCSR2 = 0x08  # DMA Control / Status Register for Channel 2
-DCSR3 = 0x0c  # DMA Control / Status Register for Channel 3
-DCSR4 = 0x10  # DMA Control / Status Register for Channel 4
-DCSR5 = 0x14  # DMA Control / Status Register for Channel 5
-DCSR6 = 0x18  # DMA Control / Status Register for Channel 6
-DCSR7 = 0x1c  # DMA Control / Status Register for Channel 7
-DCSR8 = 0x20  # DMA Control / Status Register for Channel 8
-DCSR9 = 0x24  # DMA Control / Status Register for Channel 9
-DCSR0 = 0x28  # DMA Control / Status Register for Channel 10
-DCSR11 = 0x2c # DMA Control / Status Register for Channel 11
-DCSR12 = 0x30 # DMA Control / Status Register for Channel 12
-DCSR13 = 0x34 # DMA Control / Status Register for Channel 13
-DCSR14 = 0x38 # DMA Control / Status Register for Channel 14
-DCSR15 = 0x3c # DMA Control / Status Register for Channel 15
-
-DINT = 0xf0 # DMA Interrupt Register
-
-DRCMR0   = 0x100 # Request to Channel Map Register for DREQ 0
-DRCMR1	 = 0x104 # Request to Channel Map Register for DREQ 1
-DRCMR2	 = 0x108 # Request to Channel Map Register for I2S receive Request
-DRCMR3	 = 0x10c # Request to Channel Map Register for I2S transmit Request
-DRCMR4	 = 0x110 # Request to Channel Map Register for BTUART receive Request
-DRCMR5	 = 0x114 # Request to Channel Map Register for BTUART transmit Request.
-DRCMR6	 = 0x118 # Request to Channel Map Register for FFUART receive Request
-DRCMR7	 = 0x11c # Request to Channel Map Register for FFUART transmit Request
-DRCMR8	 = 0x120 # Request to Channel Map Register for AC97 microphone Request
-DRCMR9	 = 0x124 # Request to Channel Map Register for AC97 modem receive Request
-DRCMR10  = 0x128 # Request to Channel Map Register for AC97 modem transmit Request
-DRCMR11  = 0x12c # Request to Channel Map Register for AC97 audio receive Request
-DRCMR12  = 0x130 # Request to Channel Map Register for AC97 audio transmit Request
-DRCMR13  = 0x134 # Request to Channel Map Register for SSP receive Request
-DRCMR14  = 0x138 # Request to Channel Map Register for SSP transmit Request
-DRCMR15  = 0x13c # Reserved
-DRCMR16  = 0x140 # Reserved
-DRCMR17  = 0x144 # Request to Channel Map Register for ICP receive Request
-DRCMR18  = 0x148 # Request to Channel Map Register for ICP transmit Request
-DRCMR19  = 0x14c # Request to Channel Map Register for STUART receive Request
-DRCMR20  = 0x150 # Request to Channel Map Register for STUART transmit Request
-DRCMR21  = 0x154 # Request to Channel Map Register for MMC receive Request
-DRCMR22  = 0x158 # Request to Channel Map Register for MMC transmit Request
-DRCMR23  = 0x15c # Reserved
-DRCMR24  = 0x160 # Reserved
-DRCMR25  = 0x164 # Request to Channel Map Register for USB endpoint 1 Request
-DRCMR26  = 0x168 # Request to Channel Map Register for USB endpoint 2 Request
-DRCMR27  = 0x16C # Request to Channel Map Register for USB endpoint 3 Request
-DRCMR28  = 0x170 # Request to Channel Map Register for USB endpoint 4 Request
-DRCMR29  = 0x174 # Reserved
-DRCMR30  = 0x178 # Request to Channel Map Register for USB endpoint 6 Request
-DRCMR31  = 0x17C # Request to Channel Map Register for USB endpoint 7 Request
-DRCMR32  = 0x180 # Request to Channel Map Register for USB endpoint 8 Request
-DRCMR33  = 0x184 # Request to Channel Map Register for USB endpoint 9 Request
-DRCMR34  = 0x188 # Reserved
-DRCMR35  = 0x18C # Request to Channel Map Register for USB endpoint 11 Request
-DRCMR36  = 0x190 # Request to Channel Map Register for USB endpoint 12 Request
-DRCMR37  = 0x194 # Request to Channel Map Register for USB endpoint 13 Request
-DRCMR38  = 0x198 # Request to Channel Map Register for USB endpoint 14 Request
-DRCMR39  = 0x19C # Reserved
-
-DDADR0  = 0x200 # DMA Descriptor Address Register Channel 0
-DSADR0	= 0x204 # DMA Source Address Register Channel 0
-DTADR0	= 0x208 # DMA Target Address Register Channel 0
-DCMD0	= 0x20c # DMA Command Address Register Channel 0
-DDADR1	= 0x210 # DMA Descriptor Address Register Channel 1
-DSADR1	= 0x214 # DMA Source Address Register Channel 1
-DTADR1	= 0x218 # DMA Target Address Register Channel 1
-DCMD1	= 0x21c # DMA Command Address Register Channel 1
-DDADR2	= 0x220 # DMA Descriptor Address Register Channel 2
-DSADR2	= 0x224 # DMA Source Address Register Channel 2
-DTADR2	= 0x228 # DMA Target Address Register Channel 2
-DCMD2	= 0x22c # DMA Command Address Register Channel 2
-DDADR3	= 0x230 # DMA Descriptor Address Register Channel 3
-DSADR3	= 0x234 # DMA Source Address Register Channel 3
-DTADR3	= 0x238 # DMA Target Address Register Channel 3
-DCMD3	= 0x23c # DMA Command Address Register Channel 3
-DDADR4	= 0x240 # DMA Descriptor Address Register Channel 4
-DSADR4	= 0x244 # DMA Source Address Register Channel 4
-DTADR4	= 0x248 # DMA Target Address Register Channel 4
-DCMD4	= 0x24c # DMA Command Address Register Channel 4
-DDADR5	= 0x250 # DMA Descriptor Address Register Channel 5
-DSADR5	= 0x254 # DMA Source Address Register Channel 5
-DTADR5	= 0x258 # DMA Target Address Register Channel 5
-DCMD5	= 0x25c # DMA Command Address Register Channel 5
-DDADR6	= 0x260 # DMA Descriptor Address Register Channel 6
-DSADR6	= 0x264 # DMA Source Address Register Channel 6
-DTADR6	= 0x268 # DMA Target Address Register Channel 6
-DCMD6	= 0x26c # DMA Command Address Register Channel 6
-DDADR7	= 0x270 # DMA Descriptor Address Register Channel 7
-DSADR7	= 0x274 # DMA Source Address Register Channel 7
-DTADR7	= 0x278 # DMA Target Address Register Channel 7
-DCMD7	= 0x27c # DMA Command Address Register Channel 7
-DDADR8	= 0x280 # DMA Descriptor Address Register Channel 8
-DSADR8	= 0x284 # DMA Source Address Register Channel 8
-DTADR8	= 0x288 # DMA Target Address Register Channel 8
-DCMD8	= 0x28c # DMA Command Address Register Channel 8
-DDADR9	= 0x290 # DMA Descriptor Address Register Channel 9
-DSADR9	= 0x294 # DMA Source Address Register Channel 9
-DTADR9	= 0x298 # DMA Target Address Register Channel 9
-DCMD9	= 0x29c # DMA Command Address Register Channel 9
-DDADR10 = 0x2a0 # DMA Descriptor Address Register Channel 10
-DSADR10 = 0x2a4 # DMA Source Address Register Channel 10
-DTADR10 = 0x2a8 # DMA Target Address Register Channel 10
-DCMD10	= 0x2ac # DMA Command Address Register Channel 10
-DDADR11 = 0x2b0 # DMA Descriptor Address Register Channel 11
-DSADR11 = 0x2b4 # DMA Source Address Register Channel 11
-DTADR11 = 0x2b8 # DMA Target Address Register Channel 11
-DCMD11	= 0x2bc # DMA Command Address Register Channel 11
-DDADR12 = 0x2c0 # DMA Descriptor Address Register Channel 12
-DSADR12 = 0x2c4 # DMA Source Address Register Channel 12
-DTADR12 = 0x2c8 # DMA Target Address Register Channel 12
-DCMD12	= 0x2cc # DMA Command Address Register Channel 12
-DDADR13 = 0x2d0 # DMA Descriptor Address Register Channel 13
-DSADR13 = 0x2d4 # DMA Source Address Register Channel 13
-DTADR13 = 0x2d8 # DMA Target Address Register Channel 13
-DCMD13	= 0x2dc # DMA Command Address Register Channel 13
-DDADR14 = 0x2e0 # DMA Descriptor Address Register Channel 14
-DSADR14 = 0x2e4 # DMA Source Address Register Channel 14
-DTADR14 = 0x2e8 # DMA Target Address Register Channel 14
-DCMD14	= 0x2ec # DMA Command Address Register Channel 14
-DDADR15 = 0x2f0 # DMA Descriptor Address Register Channel 15
-DSADR15 = 0x2f4 # DMA Source Address Register Channel 15
-DTADR15 = 0x2f8 # DMA Target Address Register Channel 15
-DCMD15	= 0x2fc # DMA Command Address Register Channel 15
-
-#
-# UARTs
-#
-FFRBR = 0x100000  # Receive Buffer Register (read only)
-FFTHR = 0x100000  # Transmit Holding Register (write only)
-FFIER = 0x100004  # Interrupt Enable Register (read/write)
-FFIIR = 0x100008  # Interrupt ID Register (read only)
-FFFCR = 0x100008  # FIFO Control Register (write only)
-FFLCR = 0x10000C  # Line Control Register (read/write)
-FFMCR = 0x100010  # Modem Control Register (read/write)
-FFLSR = 0x100014  # Line Status Register (read only)
-FFMSR = 0x100018  # Modem Status Register (read only)
-FFSPR = 0x10001C  # Scratch Pad Register (read/write)
-FFISR = 0x100020  # Infrared Selection Register (read/write)
-FFDLL = 0x100000  # Divisor Latch Low Register (DLAB = 1) (read/write)
-FFDLH = 0x100004  # Divisor Latch High Register (DLAB = 1) (read/write)
-
-BTRBR = 0x200000  # Receive Buffer Register (read only)
-BTTHR = 0x200000  # Transmit Holding Register (write only)
-BTIER = 0x200004  # Interrupt Enable Register (read/write)
-BTIIR = 0x200008  # Interrupt ID Register (read only)
-BTFCR = 0x200008  # FIFO Control Register (write only)
-BTLCR = 0x20000C  # Line Control Register (read/write)
-BTMCR = 0x200010  # Modem Control Register (read/write)
-BTLSR = 0x200014  # Line Status Register (read only)
-BTMSR = 0x200018  # Modem Status Register (read only)
-BTSPR = 0x20001C  # Scratch Pad Register (read/write)
-BTISR = 0x200020  # Infrared Selection Register (read/write)
-BTDLL = 0x200000  # Divisor Latch Low Register (DLAB = 1) (read/write)
-BTDLH = 0x200004  # Divisor Latch High Register (DLAB = 1) (read/write)
-
-STRBR = 0x700000  # Receive Buffer Register (read only)
-STTHR = 0x700000  # Transmit Holding Register (write only)
-STIER = 0x700004  # Interrupt Enable Register (read/write)
-STIIR = 0x700008  # Interrupt ID Register (read only)
-STFCR = 0x700008  # FIFO Control Register (write only)
-STLCR = 0x70000C  # Line Control Register (read/write)
-STMCR = 0x700010  # Modem Control Register (read/write)
-STLSR = 0x700014  # Line Status Register (read only)
-STMSR = 0x700018  # Reserved
-STSPR = 0x70001C  # Scratch Pad Register (read/write)
-STISR = 0x700020  # Infrared Selection Register (read/write)
-STDLL = 0x700000  # Divisor Latch Low Register (DLAB = 1) (read/write)
-STDLH = 0x700004  # Divisor Latch High Register (DLAB = 1) (read/write)
-
-#
-# I2C registers
-#
-IBMR  = 0x301680  # I2C Bus Monitor Register - IBMR
-IDBR  = 0x301688  # I2C Data Buffer Register - IDBR
-ICR   = 0x301690  # I2C Control Register - ICR
-ISR   = 0x301698  # I2C Status Register - ISR
-ISAR  = 0x3016A0  # I2C Slave Address Register - ISAR
-
-#
-# Real Time Clock
-#
-RCNR = 0x900000  # RTC Count Register
-RTAR = 0x900004  # RTC Alarm Register
-RTSR = 0x900008  # RTC Status Register
-RTTR = 0x90000C  # RTC Timer Trim Register
-PIAR = 0x900038  # Periodic Interrupt Alarm Register
-
-#
-# OS Timer & Match Registers
-#
-OSMR0 = 0xA00000 #
-OSMR1 = 0xA00004 #
-OSMR2 = 0xA00008 #
-OSMR3 = 0xA0000C #
-OSMR4 = 0xA00080 #
-OSCR  = 0xA00010 # OS Timer Counter Register
-OSCR4 = 0xA00040 # OS Timer Counter Register
-OMCR4 = 0xA000C0 #
-OSSR  = 0xA00014 # OS Timer Status Register
-OWER  = 0xA00018 # OS Timer Watchdog Enable Register
-OIER  = 0xA0001C # OS Timer Interrupt Enable Register
-
-#
-# Pulse Width Modulator
-#
-PWM_CTRL0   = 0xB00000# PWM 0 Control Register
-PWM_PWDUTY0 = 0xB00004# PWM 0 Duty Cycle Register
-PWM_PERVAL0 = 0xB00008# PWM 0 Period Control Register
-PWM_CTRL1   = 0xC00000# PWM 1 Control Register
-PWM_PWDUTY1 = 0xC00004# PWM 1 Duty Cycle Register
-PWM_PERVAL1 = 0xC00008# PWM 1 Period Control Register
-
-#
-# Interrupt Controller
-#
-ICIP = 0xD00000  # Interrupt Controller IRQ Pending Register
-ICMR = 0xD00004  # Interrupt Controller Mask Register
-ICLR = 0xD00008  # Interrupt Controller Level Register
-ICFP = 0xD0000C  # Interrupt Controller FIQ Pending Register
-ICPR = 0xD00010  # Interrupt Controller Pending Register
-ICCR = 0xD00014  # Interrupt Controller Control Register
-
-#
-# General Purpose I/O
-#
-GPLR0   = 0xE00000  # GPIO Pin-Level Register GPIO<31:0>
-GPLR1   = 0xE00004  # GPIO Pin-Level Register GPIO<63:32>
-GPLR2   = 0xE00008  # GPIO Pin-Level Register GPIO<80:64>
-
-GPDR0   = 0xE0000C  # GPIO Pin Direction Register GPIO<31:0>
-GPDR1   = 0xE00010  # GPIO Pin Direction Register GPIO<63:32>
-GPDR2   = 0xE00014  # GPIO Pin Direction Register GPIO<80:64>
-
-GPSR0   = 0xE00018  # GPIO Pin Output Set Register GPIO<31:0>
-GPSR1   = 0xE0001C  # GPIO Pin Output Set Register GPIO<63:32>
-GPSR2   = 0xE00020  # GPIO Pin Output Set Register GPIO<80:64>
-
-GPCR0   = 0xE00024  # GPIO Pin Output Clear Register GPIO<31:0>
-GPCR1   = 0xE00028  # GPIO Pin Output Clear Register GPIO <63:32>
-GPCR2   = 0xE0002C  # GPIO Pin Output Clear Register GPIO <80:64>
-
-GRER0   = 0xE00030  # GPIO Rising-Edge Detect Register GPIO<31:0>
-GRER1   = 0xE00034  # GPIO Rising-Edge Detect Register GPIO<63:32>
-GRER2   = 0xE00038  # GPIO Rising-Edge Detect Register GPIO<80:64>
-
-GFER0   = 0xE0003C  # GPIO Falling-Edge Detect Register GPIO<31:0>
-GFER1   = 0xE00040  # GPIO Falling-Edge Detect Register GPIO<63:32>
-GFER2   = 0xE00044  # GPIO Falling-Edge Detect Register GPIO<80:64>
-
-GEDR0   = 0xE00048  # GPIO Edge Detect Status Register GPIO<31:0>
-GEDR1   = 0xE0004C  # GPIO Edge Detect Status Register GPIO<63:32>
-GEDR2   = 0xE00050  # GPIO Edge Detect Status Register GPIO<80:64>
-
-GAFR0_L = 0xE00054  # GPIO Alternate Function Select Register GPIO<15:0>
-GAFR0_U = 0xE00058  # GPIO Alternate Function Select Register GPIO<31:16>
-GAFR1_L = 0xE0005C  # GPIO Alternate Function Select Register GPIO<47:32>
-GAFR1_U = 0xE00060  # GPIO Alternate Function Select Register GPIO<63:48>
-GAFR2_L = 0xE00064  # GPIO Alternate Function Select Register GPIO<79:64>
-GAFR2_U = 0xE00068  # GPIO Alternate Function Select Register GPIO<95-80>
-GAFR3_L = 0xE0006C  # GPIO Alternate Function Select Register GPIO<111:96>
-GAFR3_U = 0xE00070  # GPIO Alternate Function Select Register GPIO<127:112>
-
-GPLR3   = 0xE00100  # GPIO Pin-Level Register GPIO<127:96>
-GPDR3   = 0xE0010C  # GPIO Pin Direction Register GPIO<127:96>
-GPSR3   = 0xE00118  # GPIO Pin Output Set Register GPIO<127:96>
-GPCR3   = 0xE00124  # GPIO Pin Output Clear Register GPIO<127:96>
-GRER3   = 0xE00130  # GPIO Rising-Edge Detect Register GPIO<127:96>
-GFER3   = 0xE0013C  # GPIO Falling-Edge Detect Register GPIO<127:96>
-GEDR3   = 0xE00148  # GPIO Edge Detect Status Register GPIO<127:96>
-
-#
-# Core Clock
-#
-CCCR = 0x1300000  # Core Clock Configuration Register
-CKEN = 0x1300004  # Clock Enable Register
-OSCC = 0x1300008  # Oscillator Configuration Register
-CCSR = 0x130000C  # Core Clock Status Register
-
-MDCNFG	 = 0x8000000  # SDRAM Configuration Register 0
-MDREFR	 = 0x8000004  # SDRAM Refresh Control Register
-MSC0	 = 0x8000008  # Static Memory Control Register 0
-MSC1	 = 0x800000C  # Static Memory Control Register 1
-MSC2	 = 0x8000010  # Static Memory Control Register 2
-MECR	 = 0x8000014  # Expansion Memory (PCMCIA/Compact Flash) Bus Configuration
-SXLCR	 = 0x8000018  # LCR value to be written to SDRAM-Timing Synchronous Flash
-SXCNFG	 = 0x800001C  # Synchronous Static Memory Control Register
-SXMRS	 = 0x8000024  # MRS value to be written to Synchronous Flash or SMROM
-MCMEM0	 = 0x8000028  # Card interface Common Memory Space Socket 0 Timing
-MCMEM1	 = 0x800002C  # Card interface Common Memory Space Socket 1 Timing
-MCATT0	 = 0x8000030  # Card interface Attribute Space Socket 0 Timing Configuration
-MCATT1	 = 0x8000034  # Card interface Attribute Space Socket 1 Timing Configuration
-MCIO0	 = 0x8000038  # Card interface I/O Space Socket 0 Timing Configuration
-MCIO1	 = 0x800003C  # Card interface I/O Space Socket 1 Timing Configuration
-MDMRS	 = 0x8000040  # MRS value to be written to SDRAM
-BOOT_DEF = 0x8000044  # Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL
-
-# FIXME: shlashes are not recognized
-# open /dev/mem
-# map 0x0 0x10000000
-