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authorSascha Hauer <s.hauer@pengutronix.de>2021-06-11 10:39:04 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2021-06-11 10:39:04 +0200
commit3cf1342db2dd7333937918cd052f85d738499646 (patch)
tree935d510ce3df9e13424bdf5a7146749c93904dbb
parent83d7f81686745eb8a7db0dea7bd680bc579091e9 (diff)
parent61da1fea5d3c516d7f2609daebfc19e035a4c485 (diff)
downloadbarebox-next.tar.gz
barebox-next.tar.xz
Merge branch 'for-next/clk' into nextnext
-rw-r--r--drivers/clk/sifive/sifive-prci.c42
-rw-r--r--drivers/clk/sifive/sifive-prci.h18
2 files changed, 32 insertions, 28 deletions
diff --git a/drivers/clk/sifive/sifive-prci.c b/drivers/clk/sifive/sifive-prci.c
index b452bbf8c..1701a2c5a 100644
--- a/drivers/clk/sifive/sifive-prci.c
+++ b/drivers/clk/sifive/sifive-prci.c
@@ -185,7 +185,7 @@ static void __prci_wrpll_write_cfg1(struct __prci_data *pd,
* these functions.
*/
-unsigned long sifive_prci_wrpll_recalc_rate(struct clk *hw,
+unsigned long sifive_prci_wrpll_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
@@ -194,7 +194,7 @@ unsigned long sifive_prci_wrpll_recalc_rate(struct clk *hw,
return wrpll_calc_output_rate(&pwd->c, parent_rate);
}
-long sifive_prci_wrpll_round_rate(struct clk *hw,
+long sifive_prci_wrpll_round_rate(struct clk_hw *hw,
unsigned long rate,
unsigned long *parent_rate)
{
@@ -209,7 +209,7 @@ long sifive_prci_wrpll_round_rate(struct clk *hw,
return wrpll_calc_output_rate(&c, *parent_rate);
}
-int sifive_prci_wrpll_set_rate(struct clk *hw,
+int sifive_prci_wrpll_set_rate(struct clk_hw *hw,
unsigned long rate, unsigned long parent_rate)
{
struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
@@ -231,7 +231,7 @@ int sifive_prci_wrpll_set_rate(struct clk *hw,
return 0;
}
-int sifive_clk_is_enabled(struct clk *hw)
+int sifive_clk_is_enabled(struct clk_hw *hw)
{
struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
struct __prci_wrpll_data *pwd = pc->pwd;
@@ -246,7 +246,7 @@ int sifive_clk_is_enabled(struct clk *hw)
return 0;
}
-int sifive_prci_clock_enable(struct clk *hw)
+int sifive_prci_clock_enable(struct clk_hw *hw)
{
struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
struct __prci_wrpll_data *pwd = pc->pwd;
@@ -263,7 +263,7 @@ int sifive_prci_clock_enable(struct clk *hw)
return 0;
}
-void sifive_prci_clock_disable(struct clk *hw)
+void sifive_prci_clock_disable(struct clk_hw *hw)
{
struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
struct __prci_wrpll_data *pwd = pc->pwd;
@@ -281,7 +281,7 @@ void sifive_prci_clock_disable(struct clk *hw)
/* TLCLKSEL clock integration */
-unsigned long sifive_prci_tlclksel_recalc_rate(struct clk *hw,
+unsigned long sifive_prci_tlclksel_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
@@ -298,7 +298,7 @@ unsigned long sifive_prci_tlclksel_recalc_rate(struct clk *hw,
/* HFPCLK clock integration */
-unsigned long sifive_prci_hfpclkplldiv_recalc_rate(struct clk *hw,
+unsigned long sifive_prci_hfpclkplldiv_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
@@ -473,6 +473,7 @@ void sifive_prci_hfpclkpllsel_use_hfpclkpll(struct __prci_data *pd)
static int __prci_register_clocks(struct device_d *dev, struct __prci_data *pd,
const struct prci_clk_desc *desc)
{
+ struct clk_init_data init = { };
struct __prci_clock *pic;
int parent_count, i, r;
@@ -485,33 +486,36 @@ static int __prci_register_clocks(struct device_d *dev, struct __prci_data *pd,
/* Register PLLs */
for (i = 0; i < desc->num_clks; ++i) {
+ struct clk *clk;
+
pic = &(desc->clks[i]);
- pic->hw.name = pic->name;
- pic->hw.parent_names = &pic->parent_name;
- pic->hw.num_parents = 1;
- pic->hw.ops = pic->ops;
+ init.name = pic->name;
+ init.parent_names = &pic->parent_name;
+ init.num_parents = 1;
+ init.ops = pic->ops;
+ pic->hw.init = &init;
pic->pd = pd;
if (pic->pwd)
__prci_wrpll_read_cfg0(pd, pic->pwd);
- r = clk_register(&pic->hw);
- if (r) {
+ clk = clk_register(dev, &pic->hw);
+ if (IS_ERR(clk)) {
dev_warn(dev, "Failed to register clock %s: %d\n",
- pic->hw.name, r);
- return r;
+ clk_hw_get_name(&pic->hw), r);
+ return PTR_ERR(clk);
}
- r = clk_register_clkdev(&pic->hw, pic->name, dev_name(dev));
+ r = clk_register_clkdev(clk, pic->name, dev_name(dev));
if (r) {
dev_warn(dev, "Failed to register clkdev for %s: %d\n",
- pic->hw.name, r);
+ clk_hw_get_name(&pic->hw), r);
return r;
}
- pd->hw_clks.clks[i] = &pic->hw;
+ pd->hw_clks.clks[i] = clk;
}
pd->hw_clks.clk_num = i;
diff --git a/drivers/clk/sifive/sifive-prci.h b/drivers/clk/sifive/sifive-prci.h
index d85155381..e7a04ae79 100644
--- a/drivers/clk/sifive/sifive-prci.h
+++ b/drivers/clk/sifive/sifive-prci.h
@@ -254,7 +254,7 @@ struct __prci_clock {
const char *name;
const char *parent_name;
const struct clk_ops *ops;
- struct clk hw;
+ struct clk_hw hw;
struct __prci_wrpll_data *pwd;
struct __prci_data *pd;
};
@@ -281,18 +281,18 @@ void sifive_prci_hfpclkpllsel_use_hfclk(struct __prci_data *pd);
void sifive_prci_hfpclkpllsel_use_hfpclkpll(struct __prci_data *pd);
/* Linux clock framework integration */
-long sifive_prci_wrpll_round_rate(struct clk *hw, unsigned long rate,
+long sifive_prci_wrpll_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate);
-int sifive_prci_wrpll_set_rate(struct clk *hw, unsigned long rate,
+int sifive_prci_wrpll_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate);
-int sifive_clk_is_enabled(struct clk *hw);
-int sifive_prci_clock_enable(struct clk *hw);
-void sifive_prci_clock_disable(struct clk *hw);
-unsigned long sifive_prci_wrpll_recalc_rate(struct clk *hw,
+int sifive_clk_is_enabled(struct clk_hw *hw);
+int sifive_prci_clock_enable(struct clk_hw *hw);
+void sifive_prci_clock_disable(struct clk_hw *hw);
+unsigned long sifive_prci_wrpll_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate);
-unsigned long sifive_prci_tlclksel_recalc_rate(struct clk *hw,
+unsigned long sifive_prci_tlclksel_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate);
-unsigned long sifive_prci_hfpclkplldiv_recalc_rate(struct clk *hw,
+unsigned long sifive_prci_hfpclkplldiv_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate);
#endif /* __SIFIVE_CLK_SIFIVE_PRCI_H */