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| author | Jan Weitzel <j.weitzel@phytec.de> | 2013-06-24 14:08:42 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-06-24 21:45:05 +0200 |
| commit | 0cbb2155193ae04b4b9be501d22339ab80c03fee (patch) | |
| tree | bdc71364c367e26f967bf0e609695b83077bce8d | |
| parent | fc01f5db567a4f423be2dac6e14e468cd78d79dc (diff) | |
| download | barebox-0cbb2155193ae04b4b9be501d22339ab80c03fee.tar.gz barebox-0cbb2155193ae04b4b9be501d22339ab80c03fee.tar.xz | |
nand_base: fix chipsize for multi LUN nands
Chipsize didn't take number of LUNs into account. Sync chipsize calculation
to kernel commit 63795755
Tested with MT29F8G16ADBDAH4 on OMAP4
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | drivers/mtd/nand/nand_base.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 8c14112fe8..1969afff12 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -1117,7 +1117,8 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, mtd->writesize = le32_to_cpu(p->byte_per_page); mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); - chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize; + chip->chipsize = le32_to_cpu(p->blocks_per_lun); + chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; *busw = 0; if (le16_to_cpu(p->features) & 1) *busw = NAND_BUSWIDTH_16; |