summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2019-09-12 10:25:16 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2019-09-12 10:38:33 +0200
commit47338967d2cc00b37f887e2eef52af52e3943fce (patch)
tree0aaad59a5bb48c6dc3385e89cb962adf2ff58ce9
parentfc45db983faa9b6731c2c57d117339c0063778b4 (diff)
downloadbarebox-47338967d2cc00b37f887e2eef52af52e3943fce.tar.gz
clk: i.MX6qp: Fix location of the enfc_sel mux
On the i.MX6qp the enfc_sel mux is at bits 15-17, not on 16-17. Fix this. During clock tree initialization we reparented the enfc_sel to: clk_set_parent(clks[IMX6QDL_CLK_ENFC_SEL], clks[IMX6QDL_CLK_PLL2_PFD2_396M]); This resulted in a register setting 0b110 for the enfc_sel mux which is reserved. Apparently this reserved setting resulted in the enfc clock being driven from pll3_pfd3_454m. This means our enfc clock was the factor 454/396 too high. With b534f79112f0 ("clk: imx6: Fix procedure to switch the parent of LDB_DI_CLK") we happened to disable pll3_pfd3_454m during init, so with this commit NAND stopped working entirely on i.MX6qp. Both issues are fixed with this patch Fixes: b534f79112f0 ("clk: imx6: Fix procedure to switch the parent of LDB_DI_CLK") Fixes: 92fd61d12723 ("clk: i.MX6: Fix enfc_sel for i.MX6dqp") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--drivers/clk/imx/clk-imx6.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c
index c47281b..ed29e8c 100644
--- a/drivers/clk/imx/clk-imx6.c
+++ b/drivers/clk/imx/clk-imx6.c
@@ -708,7 +708,7 @@ static int imx6_ccm_probe(struct device_d *dev)
clks[IMX6QDL_CLK_USDHC3_SEL] = imx_clk_mux("usdhc3_sel", base + 0x1c, 18, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels));
clks[IMX6QDL_CLK_USDHC4_SEL] = imx_clk_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels));
if (cpu_mx6_is_plus())
- clks[IMX6QDL_CLK_ENFC_SEL] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels_plus, ARRAY_SIZE(enfc_sels_plus));
+ clks[IMX6QDL_CLK_ENFC_SEL] = imx_clk_mux("enfc_sel", base + 0x2c, 15, 3, enfc_sels_plus, ARRAY_SIZE(enfc_sels_plus));
else
clks[IMX6QDL_CLK_ENFC_SEL] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels, ARRAY_SIZE(enfc_sels));
clks[IMX6QDL_CLK_EIM_SEL] = imx_clk_mux("eim_sel", base + 0x1c, 27, 2, eim_sels, ARRAY_SIZE(eim_sels));