RISC-V: add cacheless HAS_DMA support

Define some stubs, so we can get virtio MMIO working on RISC-V
in QEMU. As we don't yet have MMU support, this is sufficient.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

3 files changed, 46 insertions, 0 deletions

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index c8d63f99bb..a7f362d8e8 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -8,6 +8,7 @@ config RISCV
 	select COMMON_CLK
 	select COMMON_CLK_OF_PROVIDER
 	select CLKDEV_LOOKUP
+	select HAS_DMA
 
 config ARCH_TEXT_BASE
 	hex
diff --git a/arch/riscv/include/asm/dma.h b/arch/riscv/include/asm/dma.h
new file mode 100644
index 0000000000..4204653984
--- /dev/null
+++ b/arch/riscv/include/asm/dma.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_DMA_MAPPING_H
+#define _ASM_DMA_MAPPING_H
+
+#include <common.h>
+#include <xfuncs.h>
+#include <linux/build_bug.h>
+#include <malloc.h>
+
+#ifdef CONFIG_MMU
+#error DMA stubs need be replaced when using MMU and caches
+#endif
+
+static inline void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle)
+{
+	void *ret;
+
+	ret = xmemalign(PAGE_SIZE, size);
+
+	memset(ret, 0, size);
+
+	if (dma_handle)
+		*dma_handle = (dma_addr_t)ret;
+
+	return ret;
+}
+
+static inline void dma_free_coherent(void *vaddr, dma_addr_t dma_handle,
+				     size_t size)
+{
+	free(vaddr);
+}
+
+static inline void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
+					   enum dma_data_direction dir)
+{
+}
+
+static inline void dma_sync_single_for_device(dma_addr_t address, size_t size,
+					      enum dma_data_direction dir)
+{
+}
+
+#endif /* _ASM_DMA_MAPPING_H */
diff --git a/include/dma.h b/include/dma.h
index 07b79cd918..1b1cb3a407 100644
--- a/include/dma.h
+++ b/include/dma.h
@@ -11,6 +11,7 @@
 
 #include <dma-dir.h>
 #include <asm/dma.h>
+#include <driver.h>
 
 #define DMA_ADDRESS_BROKEN	NULL