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authorSascha Hauer <s.hauer@pengutronix.de>2018-07-10 16:12:12 +0200
committerLucas Stach <l.stach@pengutronix.de>2018-07-27 10:43:51 +0200
commit4996ed5efbb2d7cd38a17fe456f8da820f1a1ef3 (patch)
treeb4a65216ba90a41d56f4668c592663e30bb2ced4
parent1c1121f0c2414780c804707cc852f8b73cd4daec (diff)
downloadbarebox-4996ed5efbb2d7cd38a17fe456f8da820f1a1ef3.tar.gz
barebox-4996ed5efbb2d7cd38a17fe456f8da820f1a1ef3.tar.xz
ARM: MMU: fix arch_remap_range() across section boundaries
Fixes: e3e54c6441 ARM: mmu: Implement on-demand PTE allocation PGD_FLAGS_WC_V7 lacks the PMD_TYPE_SECT and PMD_SECT_BUFFERABLE flags. Without them a dma_alloc_writecombine() creates an invalid section when it crosses a section boundary. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
-rw-r--r--arch/arm/cpu/mmu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 7e2e5bf7e0..ae189ecdeb 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -61,7 +61,7 @@ static inline void tlb_invalidate(void)
#define PTE_FLAGS_UNCACHED_V7 (0)
#define PTE_FLAGS_CACHED_V4 (PTE_SMALL_AP_UNO_SRW | PTE_BUFFERABLE | PTE_CACHEABLE)
#define PTE_FLAGS_UNCACHED_V4 PTE_SMALL_AP_UNO_SRW
-#define PGD_FLAGS_WC_V7 PMD_SECT_TEX(1)
+#define PGD_FLAGS_WC_V7 (PMD_SECT_TEX(1) | PMD_TYPE_SECT | PMD_SECT_BUFFERABLE)
/*
* PTE flags to set cached and uncached areas.