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| author | Denis Orlov <denorl2009@gmail.com> | 2023-06-05 23:10:47 +0300 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-06-09 08:43:23 +0200 |
| commit | 89149adf197a278e07b7f60e13bb3135df9bb671 (patch) | |
| tree | 2513d2e0a061d1095e3cb2dc6f891d9004d30527 | |
| parent | 5c8c0bbdfdb9b353503309de58a2294fa9c2e9d7 (diff) | |
| download | barebox-89149adf197a278e07b7f60e13bb3135df9bb671.tar.gz barebox-89149adf197a278e07b7f60e13bb3135df9bb671.tar.xz | |
MIPS: make setjmp/longjmp/initjmp available in 64BIT builds
Make the code compatible with 64-bit configurations by storing saved
register values with unsigned long type and using generic macros in
assembly code.
Signed-off-by: Denis Orlov <denorl2009@gmail.com>
Link: https://lore.barebox.org/20230605202634.42175-17-denorl2009@gmail.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/mips/Kconfig | 2 | ||||
| -rw-r--r-- | arch/mips/include/asm/setjmp.h | 2 | ||||
| -rw-r--r-- | arch/mips/lib/setjmp.S | 48 |
3 files changed, 26 insertions, 26 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index de2f539cc1..e05ee2d7f1 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -10,6 +10,7 @@ config MIPS select HAVE_PBL_MULTI_IMAGES select HAS_DMA select ARCH_HAS_DATA_ABORT_MASK + select ARCH_HAS_SJLJ select ELF default y @@ -305,7 +306,6 @@ choice config 32BIT bool "32-bit barebox" depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL - select ARCH_HAS_SJLJ help Select this option if you want to build a 32-bit barebox. diff --git a/arch/mips/include/asm/setjmp.h b/arch/mips/include/asm/setjmp.h index 81f4d4c15f..39e01e27df 100644 --- a/arch/mips/include/asm/setjmp.h +++ b/arch/mips/include/asm/setjmp.h @@ -19,7 +19,7 @@ typedef struct __jmp_buf_internal_tag { void *__sp; /* Callee-saved registers s0 through s7. */ - int __regs[8]; + unsigned long __regs[8]; /* The frame pointer. */ void *__fp; diff --git a/arch/mips/lib/setjmp.S b/arch/mips/lib/setjmp.S index b09a7c5529..42a2ec15a9 100644 --- a/arch/mips/lib/setjmp.S +++ b/arch/mips/lib/setjmp.S @@ -6,34 +6,34 @@ /* int setjmp (jmp_buf); */ LEAF(setjmp) - sw ra, (0 * 4)(a0) - sw sp, (1 * 4)(a0) - sw s0, (2 * 4)(a0) - sw s1, (3 * 4)(a0) - sw s2, (4 * 4)(a0) - sw s3, (5 * 4)(a0) - sw s4, (6 * 4)(a0) - sw s5, (7 * 4)(a0) - sw s6, (8 * 4)(a0) - sw s7, (9 * 4)(a0) - sw fp, (10 * 4)(a0) + REG_S ra, (0 * SZREG)(a0) + REG_S sp, (1 * SZREG)(a0) + REG_S s0, (2 * SZREG)(a0) + REG_S s1, (3 * SZREG)(a0) + REG_S s2, (4 * SZREG)(a0) + REG_S s3, (5 * SZREG)(a0) + REG_S s4, (6 * SZREG)(a0) + REG_S s5, (7 * SZREG)(a0) + REG_S s6, (8 * SZREG)(a0) + REG_S s7, (9 * SZREG)(a0) + REG_S fp, (10 * SZREG)(a0) move v0, zero j ra END(setjmp) /* volatile void longjmp (jmp_buf, int); */ LEAF(longjmp) - lw ra, (0 * 4)(a0) - lw sp, (1 * 4)(a0) - lw s0, (2 * 4)(a0) - lw s1, (3 * 4)(a0) - lw s2, (4 * 4)(a0) - lw s3, (5 * 4)(a0) - lw s4, (6 * 4)(a0) - lw s5, (7 * 4)(a0) - lw s6, (8 * 4)(a0) - lw s7, (9 * 4)(a0) - lw fp, (10 * 4)(a0) + REG_L ra, (0 * SZREG)(a0) + REG_L sp, (1 * SZREG)(a0) + REG_L s0, (2 * SZREG)(a0) + REG_L s1, (3 * SZREG)(a0) + REG_L s2, (4 * SZREG)(a0) + REG_L s3, (5 * SZREG)(a0) + REG_L s4, (6 * SZREG)(a0) + REG_L s5, (7 * SZREG)(a0) + REG_L s6, (8 * SZREG)(a0) + REG_L s7, (9 * SZREG)(a0) + REG_L fp, (10 * SZREG)(a0) bne a1, zero, 1f li a1, 1 1: @@ -43,8 +43,8 @@ END(longjmp) /* int initjmp(jmp_buf jmp, void __noreturn (*func)(void), void *stack_top); */ LEAF(initjmp) - sw a1, (0 * 4)(a0) - sw a2, (1 * 4)(a0) + REG_S a1, (0 * SZREG)(a0) + REG_S a2, (1 * SZREG)(a0) move v0, zero j ra END(initjmp) |