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authorSascha Hauer <s.hauer@pengutronix.de>2022-10-19 16:54:53 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2022-10-27 11:13:29 +0200
commit8fbeaa3b30d68d39add6b0fb1e2ae6b01af950b7 (patch)
tree0b2b5923bfae1e342dc01b433d169cc6c380c388
parent8b9f1325bedb2f364907b6b7f9a91a8c37e176af (diff)
downloadbarebox-8fbeaa3b30d68d39add6b0fb1e2ae6b01af950b7.tar.gz
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ARM: imx8mm-evk: Add missing fsp_table
The fsp_table is needed for TF-A binaries that support DDR frequency changing. On upstream TF-A this was introduced for i.MX8MM with: | commit 9c336f6118a94970f4045641a971fd1e24dba462 | Author: Jacky Bai <ping.bai@nxp.com> | Date: Mon Nov 25 13:19:37 2019 +0800 | | feat(imx8m): add the ddr frequency change support for imx8m family | | Add the DDR frequency change support. | | Signed-off-by: Jacky Bai <ping.bai@nxp.com> | Change-Id: If1167785796b8678c351569b83d2922c66f6e530 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c b/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c
index e7c01f9cc9..4b31d2803c 100644
--- a/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c
+++ b/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c
@@ -1975,4 +1975,5 @@ struct dram_timing_info imx8mm_evk_dram_timing = {
.ddrphy_trained_csr_num = ARRAY_SIZE(lpddr4_ddrphy_trained_csr),
.ddrphy_pie = lpddr4_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(lpddr4_phy_pie),
+ .fsp_table = { 4000, 400, 100, },
};