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authorAhmad Fatoum <a.fatoum@pengutronix.de>2020-09-28 16:45:10 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2020-09-29 10:25:02 +0200
commit8fd88065c342c9ca68da9316aa816bc298a4f605 (patch)
treee51c27a1ac90bcad77a6b71391e1e4746dccc8e3
parent071eecf8c040782515512777b02573c79a3e9899 (diff)
downloadbarebox-8fd88065c342c9ca68da9316aa816bc298a4f605.tar.gz
barebox-8fd88065c342c9ca68da9316aa816bc298a4f605.tar.xz
ARM: dts: stm32mp: setup syscon-reboot-mode on TAMP general purpose register
With the reboot mode infrastructure in place, lets add the first in-tree user. The STM32MP1 SoCs have general purpose registers in the TAMP peripheral. Register 20 there is used by the vendor's U-Boot for storing a forced boot mode. We will use the same location for our reboot mode. Consistency between barebox and OS is maintained by having barebox fixup the device tree with the same reboot mode information it used itself, so we are free to choose our own mode identifiers. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/dts/stm32mp151.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
index cc25400475..ca11492de5 100644
--- a/arch/arm/dts/stm32mp151.dtsi
+++ b/arch/arm/dts/stm32mp151.dtsi
@@ -28,6 +28,7 @@
pwm15 = &{/soc/timer@44006000/pwm};
pwm16 = &{/soc/timer@44007000/pwm};
pwm17 = &{/soc/timer@44008000/pwm};
+ tamp.reboot_mode = &reboot_mode_tamp;
};
};
@@ -42,6 +43,20 @@
compatible = "st,stm32mp1-ddr";
reg = <0x5a003000 0x1000>;
};
+
+ tamp@5c00a000 {
+ compatible = "simple-bus", "syscon", "simple-mfd";
+ reg = <0x5c00a000 0x400>;
+
+ reboot_mode_tamp: reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x150>; /* reg20 */
+ mask = <0xff>;
+ mode-normal = <0>;
+ mode-loader = <0xBB>;
+ mode-recovery = <0xBC>;
+ };
+ };
};
&bsec {