Merge branch 'for-next/socfpga'

5 files changed, 94 insertions, 266 deletions

diff --git a/arch/arm/boards/altera-socdk/lowlevel.c b/arch/arm/boards/altera-socdk/lowlevel.c
index 08e70a0fc6..822c3d8ee6 100644
--- a/arch/arm/boards/altera-socdk/lowlevel.c
+++ b/arch/arm/boards/altera-socdk/lowlevel.c
@@ -1,76 +1,13 @@
-#include <common.h>
-#include <linux/sizes.h>
-#include <io.h>
-#include <asm/barebox-arm-head.h>
-#include <asm/barebox-arm.h>
-#include <mach/generic.h>
-#include <debug_ll.h>
-#include <asm/cache.h>
 #include "sdram_config.h"
-#include <mach/cyclone5-sdram-config.h>
 #include "pinmux_config.c"
 #include "pll_config.h"
-#include <mach/pll_config.h>
 #include "sequencer_defines.h"
 #include "sequencer_auto.h"
-#include <mach/cyclone5-sequencer.c>
 #include "sequencer_auto_inst_init.c"
 #include "sequencer_auto_ac_init.c"
 #include "iocsr_config_cyclone5.c"
 
-extern char __dtb_socfpga_cyclone5_socdk_start[];
+#include <mach/lowlevel.h>
 
-ENTRY_FUNCTION(start_socfpga_socdk, r0, r1, r2)
-{
-	void *fdt;
-
-	arm_cpu_lowlevel_init();
-
-	fdt = __dtb_socfpga_cyclone5_socdk_start + get_runtime_offset();
-
-	barebox_arm_entry(0x0, SZ_1G, fdt);
-}
-
-static noinline void socdk_entry(void)
-{
-	struct socfpga_io_config io_config;
-	int ret;
-
-	arm_early_mmu_cache_invalidate();
-
-	relocate_to_current_adr();
-	setup_c();
-
-	io_config.pinmux = sys_mgr_init_table;
-	io_config.num_pin = ARRAY_SIZE(sys_mgr_init_table);
-	io_config.iocsr_emac_mixed2 = iocsr_scan_chain0_table;
-	io_config.iocsr_mixed1_flash = iocsr_scan_chain1_table;
-	io_config.iocsr_general = iocsr_scan_chain2_table;
-	io_config.iocsr_ddr = iocsr_scan_chain3_table;
-
-	socfpga_lowlevel_init(&cm_default_cfg, &io_config);
-
-	puts_ll("lowlevel init done\n");
-	puts_ll("SDRAM setup...\n");
-
-	socfpga_sdram_mmr_init();
-
-	puts_ll("SDRAM calibration...\n");
-
-	ret = socfpga_mem_calibration();
-	if (!ret)
-		hang();
-
-	puts_ll("done\n");
-
-	barebox_arm_entry(0x0, SZ_1G, NULL);
-}
-
-ENTRY_FUNCTION(start_socfpga_socdk_xload, r0, r1, r2)
-{
-	arm_cpu_lowlevel_init();
-
-	arm_setup_stack(0xffff0000 + SZ_64K - SZ_4K - 16);
-
-	socdk_entry();
-}
+SOCFPGA_C5_ENTRY(start_socfpga_socdk, socfpga_cyclone5_socdk, SZ_1G);
+SOCFPGA_C5_XLOAD_ENTRY(start_socfpga_socdk_xload, SZ_1G);
diff --git a/arch/arm/boards/ebv-socrates/lowlevel.c b/arch/arm/boards/ebv-socrates/lowlevel.c
index ef9f4535f6..3f12ae806f 100644
--- a/arch/arm/boards/ebv-socrates/lowlevel.c
+++ b/arch/arm/boards/ebv-socrates/lowlevel.c
@@ -1,23 +1,14 @@
-#include <common.h>
-#include <linux/sizes.h>
-#include <io.h>
-#include <asm/barebox-arm-head.h>
-#include <asm/barebox-arm.h>
-#include <asm/cache.h>
-#include <mach/generic.h>
-#include <debug_ll.h>
 #include "sdram_config.h"
-#include <mach/cyclone5-sdram-config.h>
 #include "pinmux_config.c"
 #include "pll_config.h"
-#include <mach/pll_config.h>
 #include "sequencer_defines.h"
 #include "sequencer_auto.h"
-#include <mach/cyclone5-sequencer.c>
 #include "sequencer_auto_inst_init.c"
 #include "sequencer_auto_ac_init.c"
 #include "iocsr_config_cyclone5.c"
 
+#include <mach/lowlevel.h>
+
 static inline void ledon(void)
 {
 	u32 val;
@@ -44,59 +35,5 @@ static inline void ledoff(void)
 	writel(val, 0xFF708004);
 }
 
-extern char __dtb_socfpga_cyclone5_socrates_start[];
-
-ENTRY_FUNCTION(start_socfpga_socrates, r0, r1, r2)
-{
-	void *fdt;
-
-	arm_cpu_lowlevel_init();
-
-	fdt = __dtb_socfpga_cyclone5_socrates_start + get_runtime_offset();
-
-	barebox_arm_entry(0x0, SZ_1G, fdt);
-}
-
-static noinline void socrates_entry(void)
-{
-	struct socfpga_io_config io_config;
-	int ret;
-
-	arm_early_mmu_cache_invalidate();
-
-	relocate_to_current_adr();
-	setup_c();
-
-	io_config.pinmux = sys_mgr_init_table;
-	io_config.num_pin = ARRAY_SIZE(sys_mgr_init_table);
-	io_config.iocsr_emac_mixed2 = iocsr_scan_chain0_table;
-	io_config.iocsr_mixed1_flash = iocsr_scan_chain1_table;
-	io_config.iocsr_general = iocsr_scan_chain2_table;
-	io_config.iocsr_ddr = iocsr_scan_chain3_table;
-
-	socfpga_lowlevel_init(&cm_default_cfg, &io_config);
-
-	puts_ll("lowlevel init done\n");
-	puts_ll("SDRAM setup...\n");
-
-	socfpga_sdram_mmr_init();
-
-	puts_ll("SDRAM calibration...\n");
-
-	ret = socfpga_mem_calibration();
-	if (!ret)
-		hang();
-
-	puts_ll("done\n");
-
-	barebox_arm_entry(0x0, SZ_1G, NULL);
-}
-
-ENTRY_FUNCTION(start_socfpga_socrates_xload, r0, r1, r2)
-{
-	arm_cpu_lowlevel_init();
-
-	arm_setup_stack(0xffff0000 + SZ_64K - SZ_4K - 16);
-
-	socrates_entry();
-}
+SOCFPGA_C5_ENTRY(start_socfpga_socrates, socfpga_cyclone5_socrates, SZ_1G);
+SOCFPGA_C5_XLOAD_ENTRY(start_socfpga_socrates_xload, SZ_1G);
diff --git a/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c b/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
index dfb8271724..deac0e9cb2 100644
--- a/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
+++ b/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c
@@ -1,76 +1,13 @@
-#include <common.h>
-#include <linux/sizes.h>
-#include <io.h>
-#include <asm/barebox-arm-head.h>
-#include <asm/barebox-arm.h>
-#include <mach/generic.h>
-#include <debug_ll.h>
-#include <asm/cache.h>
 #include "sdram_config.h"
-#include <mach/cyclone5-sdram-config.h>
 #include "pinmux_config.c"
 #include "pll_config.h"
-#include <mach/pll_config.h>
 #include "sequencer_defines.h"
 #include "sequencer_auto.h"
-#include <mach/cyclone5-sequencer.c>
 #include "sequencer_auto_inst_init.c"
 #include "sequencer_auto_ac_init.c"
 #include "iocsr_config_cyclone5.c"
 
-extern char __dtb_socfpga_cyclone5_de0_nano_soc_start[];
+#include <mach/lowlevel.h>
 
-ENTRY_FUNCTION(start_socfpga_de0_nano_soc, r0, r1, r2)
-{
-	void *fdt;
-
-	arm_cpu_lowlevel_init();
-
-	fdt = __dtb_socfpga_cyclone5_de0_nano_soc_start + get_runtime_offset();
-
-	barebox_arm_entry(0x0, SZ_1G, fdt);
-}
-
-static noinline void de0_nano_soc_entry(void)
-{
-	struct socfpga_io_config io_config;
-	int ret;
-
-	arm_early_mmu_cache_invalidate();
-
-	relocate_to_current_adr();
-	setup_c();
-
-	io_config.pinmux = sys_mgr_init_table;
-	io_config.num_pin = ARRAY_SIZE(sys_mgr_init_table);
-	io_config.iocsr_emac_mixed2 = iocsr_scan_chain0_table;
-	io_config.iocsr_mixed1_flash = iocsr_scan_chain1_table;
-	io_config.iocsr_general = iocsr_scan_chain2_table;
-	io_config.iocsr_ddr = iocsr_scan_chain3_table;
-
-	socfpga_lowlevel_init(&cm_default_cfg, &io_config);
-
-	puts_ll("lowlevel init done\n");
-	puts_ll("SDRAM setup...\n");
-
-	socfpga_sdram_mmr_init();
-
-	puts_ll("SDRAM calibration...\n");
-
-	ret = socfpga_mem_calibration();
-	if (!ret)
-		hang();
-
-	puts_ll("done\n");
-
-	barebox_arm_entry(0x0, SZ_1G, NULL);
-}
-
-ENTRY_FUNCTION(start_socfpga_de0_nano_soc_xload, r0, r1, r2)
-{
-	arm_cpu_lowlevel_init();
-
-	arm_setup_stack(0xffff0000 + SZ_64K - SZ_4K - 16);
-
-	de0_nano_soc_entry();
-}
+SOCFPGA_C5_ENTRY(start_socfpga_de0_nano_soc, socfpga_cyclone5_de0_nano_soc, SZ_1G);
+SOCFPGA_C5_XLOAD_ENTRY(start_socfpga_de0_nano_soc_xload, SZ_1G);
diff --git a/arch/arm/boards/terasic-sockit/lowlevel.c b/arch/arm/boards/terasic-sockit/lowlevel.c
index 05b7d800a2..1dd7940aeb 100644
--- a/arch/arm/boards/terasic-sockit/lowlevel.c
+++ b/arch/arm/boards/terasic-sockit/lowlevel.c
@@ -1,23 +1,14 @@
-#include <common.h>
-#include <linux/sizes.h>
-#include <io.h>
-#include <asm/barebox-arm-head.h>
-#include <asm/barebox-arm.h>
-#include <mach/generic.h>
-#include <debug_ll.h>
-#include <asm/cache.h>
 #include "sdram_config.h"
-#include <mach/cyclone5-sdram-config.h>
 #include "pinmux_config.c"
 #include "pll_config.h"
-#include <mach/pll_config.h>
 #include "sequencer_defines.h"
 #include "sequencer_auto.h"
-#include <mach/cyclone5-sequencer.c>
 #include "sequencer_auto_inst_init.c"
 #include "sequencer_auto_ac_init.c"
 #include "iocsr_config_cyclone5.c"
 
+#include <mach/lowlevel.h>
+
 static inline void ledon(int led)
 {
 	u32 val;
@@ -44,59 +35,5 @@ static inline void ledoff(int led)
 	writel(val, 0xFF709004);
 }
 
-extern char __dtb_socfpga_cyclone5_sockit_start[];
-
-ENTRY_FUNCTION(start_socfpga_sockit, r0, r1, r2)
-{
-	void *fdt;
-
-	arm_cpu_lowlevel_init();
-
-	fdt = __dtb_socfpga_cyclone5_sockit_start + get_runtime_offset();
-
-	barebox_arm_entry(0x0, SZ_1G, fdt);
-}
-
-static noinline void sockit_entry(void)
-{
-	struct socfpga_io_config io_config;
-	int ret;
-
-	arm_early_mmu_cache_invalidate();
-
-	relocate_to_current_adr();
-	setup_c();
-
-	io_config.pinmux = sys_mgr_init_table;
-	io_config.num_pin = ARRAY_SIZE(sys_mgr_init_table);
-	io_config.iocsr_emac_mixed2 = iocsr_scan_chain0_table;
-	io_config.iocsr_mixed1_flash = iocsr_scan_chain1_table;
-	io_config.iocsr_general = iocsr_scan_chain2_table;
-	io_config.iocsr_ddr = iocsr_scan_chain3_table;
-
-	socfpga_lowlevel_init(&cm_default_cfg, &io_config);
-
-	puts_ll("lowlevel init done\n");
-	puts_ll("SDRAM setup...\n");
-
-	socfpga_sdram_mmr_init();
-
-	puts_ll("SDRAM calibration...\n");
-
-	ret = socfpga_mem_calibration();
-	if (!ret)
-		hang();
-
-	puts_ll("done\n");
-
-	barebox_arm_entry(0x0, SZ_1G, NULL);
-}
-
-ENTRY_FUNCTION(start_socfpga_sockit_xload, r0, r1, r2)
-{
-	arm_cpu_lowlevel_init();
-
-	arm_setup_stack(0xffff0000 + SZ_64K - SZ_4K - 16);
-
-	sockit_entry();
-}
+SOCFPGA_C5_ENTRY(start_socfpga_sockit, socfpga_cyclone5_sockit, SZ_1G);
+SOCFPGA_C5_XLOAD_ENTRY(start_socfpga_sockit_xload, SZ_1G);
diff --git a/arch/arm/mach-socfpga/include/mach/lowlevel.h b/arch/arm/mach-socfpga/include/mach/lowlevel.h
new file mode 100644
index 0000000000..01463bb877
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/lowlevel.h
@@ -0,0 +1,80 @@
+#ifndef __MACH_SOCFPGA_LOWLEVEL_H
+#define __MACH_SOCFPGA_LOWLEVEL_H
+
+#include <common.h>
+#include <linux/sizes.h>
+#include <io.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/generic.h>
+#include <debug_ll.h>
+#include <asm/cache.h>
+#include <mach/cyclone5-sdram-config.h>
+#include <mach/pll_config.h>
+#include <mach/cyclone5-sequencer.c>
+
+static void __noreturn start_socfpga_c5_common(uint32_t size, void *fdt_blob)
+{
+	void *fdt;
+
+	arm_cpu_lowlevel_init();
+
+	fdt = fdt_blob + get_runtime_offset();
+
+	barebox_arm_entry(0x0, size, fdt);
+}
+
+#define SOCFPGA_C5_ENTRY(name, fdt_name, memory_size)			\
+	ENTRY_FUNCTION(name, r0, r1, r2)				\
+	{								\
+		extern char __dtb_##fdt_name##_start[];			\
+									\
+		start_socfpga_c5_common(memory_size, __dtb_##fdt_name##_start); \
+	}
+
+static noinline void start_socfpga_c5_xload_common(uint32_t size)
+{
+	struct socfpga_io_config io_config;
+	int ret;
+
+	arm_early_mmu_cache_invalidate();
+
+	relocate_to_current_adr();
+	setup_c();
+
+	io_config.pinmux = sys_mgr_init_table;
+	io_config.num_pin = ARRAY_SIZE(sys_mgr_init_table);
+	io_config.iocsr_emac_mixed2 = iocsr_scan_chain0_table;
+	io_config.iocsr_mixed1_flash = iocsr_scan_chain1_table;
+	io_config.iocsr_general = iocsr_scan_chain2_table;
+	io_config.iocsr_ddr = iocsr_scan_chain3_table;
+
+	socfpga_lowlevel_init(&cm_default_cfg, &io_config);
+
+	puts_ll("lowlevel init done\n");
+	puts_ll("SDRAM setup...\n");
+
+	socfpga_sdram_mmr_init();
+
+	puts_ll("SDRAM calibration...\n");
+
+	ret = socfpga_mem_calibration();
+	if (!ret)
+		hang();
+
+	puts_ll("done\n");
+
+	barebox_arm_entry(0x0, size, NULL);
+}
+
+#define SOCFPGA_C5_XLOAD_ENTRY(name, memory_size)				\
+	ENTRY_FUNCTION(name, r0, r1, r2)				\
+	{								\
+		arm_cpu_lowlevel_init();				\
+									\
+		arm_setup_stack(0xffff0000 + SZ_64K - SZ_4K - 16);	\
+									\
+		start_socfpga_c5_xload_common(memory_size);		\
+	}
+
+#endif