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| author | Oleksij Rempel <o.rempel@pengutronix.de> | 2021-11-29 11:52:44 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-11-30 11:16:00 +0100 |
| commit | b173730e2d0b2fb8843054b01dc5e59d5c1e2e3e (patch) | |
| tree | 03b96b22d1ea366c120c32eb71492744289280ef | |
| parent | 362ffd8492e4b8662ead765e8270f835ef90c778 (diff) | |
| download | barebox-b173730e2d0b2fb8843054b01dc5e59d5c1e2e3e.tar.gz barebox-b173730e2d0b2fb8843054b01dc5e59d5c1e2e3e.tar.xz | |
nvmem: bsec.c: add optional permanent write support
To be able to fuze MAC address we need to be able to use BSEC_SMC_PROG_OTP
instead of BSEC_SMC_WRITE_SHADOW.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | drivers/nvmem/Kconfig | 14 | ||||
| -rw-r--r-- | drivers/nvmem/bsec.c | 22 |
2 files changed, 31 insertions, 5 deletions
diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index d809fb6eab..7b1ebe1d68 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -63,8 +63,18 @@ config STM32_BSEC depends on ARCH_STM32MP depends on OFDEVICE help - This adds support for the STM32 OTP controller. Reads and writes - to will go to the shadow RAM, not the OTP fuses themselvers. + This adds support for the STM32 OTP controller. + +config STM32_BSEC_WRITE + bool + prompt "Enable write support of STM32 CPUs OTP fuses" + depends on STM32_BSEC + help + This adds write support to STM32 On-Chip OTP registers. Example of set + MAC to 12:34:56:78:9A:BC: + bsec0.permanent_write_enable=1 + mw -l -d /dev/stm32-bsec 0x000000e4+4 0x78563412 + mw -l -d /dev/stm32-bsec 0x000000e8+4 0x0000bc9a config STARFIVE_OTP tristate "Starfive OTP Supprot" diff --git a/drivers/nvmem/bsec.c b/drivers/nvmem/bsec.c index acb5732079..33a3121820 100644 --- a/drivers/nvmem/bsec.c +++ b/drivers/nvmem/bsec.c @@ -21,8 +21,10 @@ #define BSEC_OTP_SERIAL 13 struct bsec_priv { + struct device_d dev; u32 svc_id; struct regmap_config map_config; + int permanent_write_enable; }; struct stm32_bsec_data { @@ -59,13 +61,18 @@ static int stm32_bsec_read_shadow(void *ctx, unsigned reg, unsigned *val) return bsec_smc(ctx, BSEC_SMC_READ_SHADOW, reg, 0, val); } -static int stm32_bsec_reg_write_shadow(void *ctx, unsigned reg, unsigned val) +static int stm32_bsec_reg_write(void *ctx, unsigned reg, unsigned val) { - return bsec_smc(ctx, BSEC_SMC_WRITE_SHADOW, reg, val, NULL); + struct bsec_priv *priv = ctx; + + if (priv->permanent_write_enable) + return bsec_smc(ctx, BSEC_SMC_PROG_OTP, reg, val, NULL); + else + return bsec_smc(ctx, BSEC_SMC_WRITE_SHADOW, reg, val, NULL); } static struct regmap_bus stm32_bsec_regmap_bus = { - .reg_write = stm32_bsec_reg_write_shadow, + .reg_write = stm32_bsec_reg_write, .reg_read = stm32_bsec_read_shadow, }; @@ -143,6 +150,10 @@ static int stm32_bsec_probe(struct device_d *dev) priv->svc_id = data->svc_id; + dev_set_name(&priv->dev, "bsec"); + priv->dev.parent = dev; + register_device(&priv->dev); + priv->map_config.reg_bits = 32; priv->map_config.val_bits = 32; priv->map_config.reg_stride = 4; @@ -152,6 +163,11 @@ static int stm32_bsec_probe(struct device_d *dev) if (IS_ERR(map)) return PTR_ERR(map); + if (IS_ENABLED(CONFIG_STM32_BSEC_WRITE)) { + dev_add_param_bool(&priv->dev, "permanent_write_enable", + NULL, NULL, &priv->permanent_write_enable, NULL); + } + nvmem = nvmem_regmap_register(map, "stm32-bsec"); if (IS_ERR(nvmem)) return PTR_ERR(nvmem); |