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| author | Christoph Fritz <chf.fritz@googlemail.com> | 2018-06-17 15:28:41 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-06-19 15:22:47 +0200 |
| commit | b6c18763e5302c6023c01271763084a89ba5f475 (patch) | |
| tree | 4fda0c9a98672e59bba33f8b402f6ef5ad83c77e | |
| parent | 642f45633c65f070088ecf0cf2c86a62e8fcfc49 (diff) | |
| download | barebox-b6c18763e5302c6023c01271763084a89ba5f475.tar.gz barebox-b6c18763e5302c6023c01271763084a89ba5f475.tar.xz | |
ARM: dts: advantech-rom-7421: add hog pinctrl node
The Advantech ROM-7421 has a custom watchdog reset i2c chip that has
some control gpios. This watchdog is currently not used, therefore mux
its control pins as pull-downs to be sure that the watchdog is disabled
after e.g. a reboot.
For debug purposes this patch also adds i2c1 node.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rwxr-xr-x | arch/arm/dts/imx6dl-advantech-rom-7421.dts | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6dl-advantech-rom-7421.dts b/arch/arm/dts/imx6dl-advantech-rom-7421.dts index 1d5fd89264..cdf378114a 100755 --- a/arch/arm/dts/imx6dl-advantech-rom-7421.dts +++ b/arch/arm/dts/imx6dl-advantech-rom-7421.dts @@ -79,6 +79,13 @@ status = "okay"; }; +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clock-frequency = <100000>; + status = "okay"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; @@ -144,6 +151,17 @@ &iomuxc { pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_hog: hoggrp { + fsl,pins = < + /* custom watchdog controls disabled */ + MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x130b0 + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x130b0 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0 + + >; + }; pinctrl_ecspi1: ecspi1grp { fsl,pins = < @@ -175,6 +193,13 @@ >; }; + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 |