ARM: dts: add minimal К1879ХБ1Я devicetree file

К1879ХБ1Я (AKA K1879HB1YA) is a SoC that combines
a NeuroMatrix(r) family DSP core
with an ARM architecture CPU ARM1176JZF-S core.

See http://www.module.ru/en/catalog/micro/mikroshema_dekodera_cifrovogo_televizionnogo_signala_sbis_k1879hb1ya/ for details.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 37 insertions, 0 deletions

diff --git a/arch/arm/dts/k1879hb1ya.dtsi b/arch/arm/dts/k1879hb1ya.dtsi
new file mode 100644
index 0000000000..83ba7fb399
--- /dev/null
+++ b/arch/arm/dts/k1879hb1ya.dtsi
@@ -0,0 +1,37 @@
+#include "skeleton.dtsi"
+
+/ {
+	soc {
+		compatible = "simple-bus";
+		model = "RC Module K1879HB1YA";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		/*
+		 * Actually clk_apb is not a fixed-clock at all.
+		 * clk_apb is a derivated clock, but for the moment
+		 * there is no public documentation on k1879hb1ya
+		 * so we can't describe it correctly.
+		 */
+		clk_apb: clock@0 {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+		};
+
+		serial0: serial@2002b000 {
+			compatible = "ns16550a";
+			reg = <0x2002b000 0x1000>;
+			reg-shift = <2>;
+			clocks = <&clk_apb 0>;
+			status = "disabled";
+		};
+
+		timer0: timer@20024000 {
+			compatible = "module,uemd-timer";
+			reg = <0x20024000 0x20>;
+			clocks = <&clk_apb 0>;
+			status = "disabled";
+		};
+	};
+};